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bdk: clock: refactor common PLL defines

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This commit is contained in:
CTCaer
2025-06-22 12:47:26 +03:00
parent 5e8b01f727
commit d851c16ce7
3 changed files with 23 additions and 27 deletions
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14
bdk/soc/clock.h
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@@ -172,18 +172,14 @@
#define CLK_NOT_USED 0x0
/*! PLL control and status bits */
#define PLLX_BASE_LOCK BIT(27)
#define PLLX_BASE_REF_DIS BIT(29)
#define PLLX_BASE_ENABLE BIT(30)
#define PLLX_BASE_BYPASS BIT(31)
#define PLL_BASE_LOCK BIT(27)
#define PLL_BASE_REF_DIS BIT(29)
#define PLL_BASE_ENABLE BIT(30)
#define PLL_BASE_BYPASS BIT(31)
#define PLLX_MISC_LOCK_EN BIT(18)
#define PLLX_MISC3_IDDQ BIT(3)
#define PLLCX_BASE_LOCK BIT(27)
#define PLLCX_BASE_REF_DIS BIT(29)
#define PLLCX_BASE_ENABLE BIT(30)
#define PLLCX_BASE_BYPASS BIT(31)
#define PLLA_OUT0_RSTN_CLR BIT(0)
#define PLLA_OUT0_CLKEN BIT(1)
#define PLLA_BASE_IDDQ BIT(25)