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bdk: display: simplify macros

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Expand register index in parent macro and remove _DI/_DSIREG macros.
This commit is contained in:
CTCaer
2025-12-18 11:17:43 +02:00
parent 8faa1a6690
commit b5a6c8eb64
4 changed files with 146 additions and 148 deletions
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4
bdk/soc/hw_init.c
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@@ -194,7 +194,7 @@ static void _mbist_workaround_bl()
I2S(I2S_CG + (i2s_idx << 8u)) = I2S_CG_SLCG_DISABLE;
}
// Set SLCG overrides for DISPA and VIC.
DISPLAY_A(_DIREG(DC_COM_DSC_TOP_CTL)) |= BIT(2); // DSC_SLCG_OVERRIDE.
DISPLAY_A(DC_COM_DSC_TOP_CTL) |= BIT(2); // DSC_SLCG_OVERRIDE.
VIC(VIC_THI_SLCG_OVERRIDE_LOW_A) = 0xFFFFFFFF;
// Wait a bit for MBIST_EN to get unstuck (1 cycle min).
@@ -203,7 +203,7 @@ static void _mbist_workaround_bl()
// Reset SLCG to automatic mode.
// for (u32 i2s_idx = 0; i2s_idx < 5; i2s_idx++)
// I2S(I2S_CG + (i2s_idx << 8u)) = I2S_CG_SLCG_ENABLE;
// DISPLAY_A(_DIREG(DC_COM_DSC_TOP_CTL)) &= ~BIT(2); // DSC_SLCG_OVERRIDE.
// DISPLAY_A(DC_COM_DSC_TOP_CTL) &= ~BIT(2); // DSC_SLCG_OVERRIDE.
// VIC(VIC_THI_SLCG_OVERRIDE_LOW_A) = 0;
// Set per-clock reset for APE/VIC/HOST1X/DISP1.

8
bdk/soc/t210.h
View File

@@ -106,9 +106,9 @@
#define MSELECT(off) MMIO_REG32(MSELECT_BASE, off)
#define DPAUX1(off) MMIO_REG32(DPAUX1_BASE, off)
#define TSEC2(off) MMIO_REG32(TSEC2_BASE, off)
#define DISPLAY_A(off) MMIO_REG32(DISPLAY_A_BASE, off)
#define DISPLAY_B(off) MMIO_REG32(DISPLAY_B_BASE, off)
#define DSI(off) MMIO_REG32(DSI_BASE, off)
#define DISPLAY_A(off) MMIO_REG32(DISPLAY_A_BASE, (off) << 2u)
#define DISPLAY_B(off) MMIO_REG32(DISPLAY_B_BASE, (off) << 2u)
#define DSI(off) MMIO_REG32(DSI_BASE, (off) << 2u)
#define VIC(off) MMIO_REG32(VIC_BASE, off)
#define NVJPG(off) MMIO_REG32(NVJPG_BASE, off)
#define NVDEC(off) MMIO_REG32(NVDEC_BASE, off)
@@ -154,7 +154,7 @@
#define XUSB_DEV_XHCI(off) MMIO_REG32(XUSB_DEV_BASE, off)
#define XUSB_DEV_PCI(off) MMIO_REG32(XUSB_DEV_BASE + 0x8000, off)
#define XUSB_DEV_DEV(off) MMIO_REG32(XUSB_DEV_BASE + 0x9000, off)
#define MIPI_CAL(off) MMIO_REG32(MIPI_CAL_BASE, off)
#define MIPI_CAL(off) MMIO_REG32(MIPI_CAL_BASE, (off) << 2u)
#define CL_DVFS(off) MMIO_REG32(CL_DVFS_BASE, off)
#define I2S(off) MMIO_REG32(I2S_BASE, off)
#define ADMA(off) MMIO_REG32(ADMA_BASE, off)