Refactoring and comment adding

bootloader/soc/bpmp.c

@@ -149,7 +149,7 @@ void bpmp_mmu_disable()
 	// Clean and invalidate cache.
 	bpmp_mmu_maintenance(BPMP_MMU_MAINT_CLN_INV_WAY);
 
-	// Enable cache.
+	// Disable cache.
 	BPMP_CACHE_CTRL(BPMP_CACHE_CONFIG) = 0;
 
 	// HW bug. Invalidate cache again.

bootloader/soc/clock.c

@@ -366,7 +366,6 @@ static void _clock_sdmmc_clear_enable(u32 id)
 static u32 _clock_sdmmc_table[8] = { 0 };
 
 #define PLLP_OUT0      0x0
-
 static int _clock_sdmmc_config_clock_source_inner(u32 *pout, u32 id, u32 val)
 {
 	u32 divisor = 0;

bootloader/soc/clock.h

@@ -123,7 +123,7 @@
 #define CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP 0x620
 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C6 0x65C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL 0x664
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIP_CAL 0x66C
+#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694
 #define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0
 #define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704