bdk: clock: update some defines

This commit is contained in:
CTCaer
2025-12-17 04:33:40 +02:00
parent 4797b42e76
commit 8d6bb5f427

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@@ -212,8 +212,8 @@
#define PTO_DIV_SEL_MASK (3 << 23)
#define PTO_DIV_SEL_GATED (0 << 23)
#define PTO_DIV_SEL_DIV1 (1 << 23)
#define PTO_DIV_SEL_DIV2_RISING (2 << 23)
#define PTO_DIV_SEL_DIV2_FALLING (3 << 23)
#define PTO_DIV_SEL_DIV4_RISING (2 << 23)
#define PTO_DIV_SEL_DIV4_FALLING (3 << 23)
#define PTO_DIV_SEL_CPU_EARLY (0 << 23)
#define PTO_DIV_SEL_CPU_LATE (1 << 23)
@@ -380,17 +380,17 @@ typedef enum _clock_pto_id_t
CLK_PTO_HDMI = 0xC2,
CLK_PTO_DISP2 = 0xC4,
CLK_PTO_DISP1 = 0xC5,
CLK_PTO_DISP1 = 0xC5, // Branches: 0xD5, 0xE5, 0xF5.
CLK_PTO_PLLD_OBS = 0xCA,
CLK_PTO_PLLD_OBS = 0xCA, // Branches: 0xDA, 0xEA, 0xFA.
CLK_PTO_PLLD2_PTO_OBS = 0xCC,
CLK_PTO_PLLDP_OBS = 0xCE,
CLK_PTO_PLLE_OBS = 0x10A,
CLK_PTO_PLLU_OBS = 0x10C,
CLK_PTO_PLLU_OBS = 0x10C, // Branches: 0x14C 0x18C 0x1CC.
CLK_PTO_PLLREFE_OBS = 0x10E,
CLK_PTO_XUSB_FALCON = 0x110,
CLK_PTO_XUSB_CLK480M_HSIC = 0x111,
CLK_PTO_XUSB_FALCON = 0x110, // Branches: 0x150 0x190 0x1D0.
CLK_PTO_XUSB_CLK480M_HSIC = 0x111, // Branches: 0x151 0x191 0x1D1.
CLK_PTO_USB_L0_RX = 0x112,
CLK_PTO_USB_L3_RX = 0x113,
CLK_PTO_USB_RX = 0x114,
@@ -417,12 +417,12 @@ typedef enum _clock_pto_id_t
CLK_PTO_USB3_L7_TXCLKREF = 0x12A,
CLK_PTO_USB3_L7_RX = 0x12B,
CLK_PTO_USB3_TX = 0x12C,
CLK_PTO_UTMIP_PLL_PAD = 0x12D,
CLK_PTO_UTMIP_PLL_PAD = 0x12D, // Branches: 0x16D 0x1AD 0x1ED.
CLK_PTO_XUSB_FS = 0x136,
CLK_PTO_XUSB_SS_HOST_DEV = 0x137,
CLK_PTO_XUSB_CORE_HOST = 0x138,
CLK_PTO_XUSB_CORE_DEV = 0x139,
CLK_PTO_XUSB_FS = 0x136, // Branches: 0x176 0x1B6 0x1F6.
CLK_PTO_XUSB_SS_HOST_DEV = 0x137, // Branches: 0x177 0x1B7 0x1F7.
CLK_PTO_XUSB_CORE_HOST = 0x138, // Branches: 0x178 0x1B8 0x1F8.
CLK_PTO_XUSB_CORE_DEV = 0x139, // Branches: 0x179 0x1B9 0x1F9.
CLK_PTO_USB3_L2_TXCLKREF = 0x13C,
CLK_PTO_USB3_L3_TXCLKREF = 0x13D,
@@ -447,13 +447,13 @@ typedef enum _clock_pto_id_t
CLK_PTO_PLLC2_DIV2 = 0x58,
CLK_PTO_PLLC3_DIV2 = 0x5A,
CLK_PTO_PLLD_DIV2 = 0xCB,
CLK_PTO_PLLD_DIV2 = 0xCB, // Branches: 0xDB, 0xEB, 0xFB.
CLK_PTO_PLLD2_DIV2 = 0xCD,
CLK_PTO_PLLDP_DIV2 = 0xCF,
CLK_PTO_PLLE_DIV2 = 0x10B,
CLK_PTO_PLLU_DIV2 = 0x10D,
CLK_PTO_PLLU_DIV2 = 0x10D, // Branches: 0x14D 0x18D 0x1CD.
CLK_PTO_PLLREFE_DIV2 = 0x10F,
} clock_pto_id_t;