From 727d37c99189487bef039b0601d1b76232feba05 Mon Sep 17 00:00:00 2001
From: CTCaer <ctcaer@gmail.com>
Date: Thu, 27 Nov 2025 11:25:08 +0200
Subject: [PATCH] bdl: minerva: add deinit function

Removes dependency to Nyx storage for hw init too.
---
 bdk/mem/minerva.c |  9 +++++++++
 bdk/mem/minerva.h |  1 +
 bdk/soc/hw_init.c | 10 +++-------
 3 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/bdk/mem/minerva.c b/bdk/mem/minerva.c
index 62e887be..c406bb2c 100644
--- a/bdk/mem/minerva.c
+++ b/bdk/mem/minerva.c
@@ -141,6 +141,15 @@ void minerva_change_freq(minerva_freq_t freq)
 	}
 }
 
+void minerva_deinit()
+{
+	if (!mtc_cfg)
+		return;
+
+	minerva_change_freq(FREQ_204);
+	mtc_cfg->init_done = 0;
+}
+
 void minerva_sdmmc_la_program(void *table, bool t210b01)
 {
 	u32 freq = *(u32 *)(table + TABLE_FREQ_KHZ_OFFSET);
diff --git a/bdk/mem/minerva.h b/bdk/mem/minerva.h
index 81799b36..1ef2aaa3 100644
--- a/bdk/mem/minerva.h
+++ b/bdk/mem/minerva.h
@@ -67,6 +67,7 @@ typedef enum
 
 extern void (*minerva_cfg)(mtc_config_t *mtc_cfg, void *);
 u32  minerva_init(minerva_str_t *mtc_str);
+void minerva_deinit();
 void minerva_change_freq(minerva_freq_t freq);
 void minerva_sdmmc_la_program(void *table, bool t210b01);
 void minerva_prep_boot_freq();
diff --git a/bdk/soc/hw_init.c b/bdk/soc/hw_init.c
index b69809b1..0b72e823 100644
--- a/bdk/soc/hw_init.c
+++ b/bdk/soc/hw_init.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2024 CTCaer
+ * Copyright (c) 2018-2025 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -47,9 +47,6 @@
 #include <thermal/tmp451.h>
 #include <utils/util.h>
 
-extern boot_cfg_t b_cfg;
-extern volatile nyx_storage_t *nyx_str;
-
 u32 hw_rst_status;
 u32 hw_rst_reason;
 
@@ -488,9 +485,8 @@ void hw_deinit(bool coreboot, u32 bl_magic)
 	regulator_5v_disable(REGULATOR_5V_ALL);
 #endif
 
-	// set DRAM clock to 204MHz.
-	minerva_change_freq(FREQ_204);
-	nyx_str->mtc_cfg.init_done = 0;
+	// Set DRAM clock to 204MHz.
+	minerva_deinit();
 
 	// Flush/disable MMU cache.
 	bpmp_mmu_disable();