From 1edb18a2177d8270faf6815e3824a7afc88a5343 Mon Sep 17 00:00:00 2001
From: CTCaer <ctcaer@gmail.com>
Date: Thu, 29 Jan 2026 08:38:16 +0200
Subject: [PATCH] modules: lp0: refactor t210b01 to use the macros

This actually makes it faster too.
Additionally, remove support for DDR in T210 function.
---
 modules/hekate_libsys_lp0/pmc_lp0_t210.h      |  564 -------
 modules/hekate_libsys_lp0/pmc_t210.h          |  671 ++++++++
 .../hekate_libsys_lp0/sdram_lp0_param_t210.h  |    4 +-
 .../sdram_lp0_param_t210b01.h                 |    4 +-
 modules/hekate_libsys_lp0/sys_sdramlp0.c      | 1495 ++++++++++++-----
 5 files changed, 1734 insertions(+), 1004 deletions(-)
 delete mode 100644 modules/hekate_libsys_lp0/pmc_lp0_t210.h
 create mode 100644 modules/hekate_libsys_lp0/pmc_t210.h

diff --git a/modules/hekate_libsys_lp0/pmc_lp0_t210.h b/modules/hekate_libsys_lp0/pmc_lp0_t210.h
deleted file mode 100644
index c8a259ab..00000000
--- a/modules/hekate_libsys_lp0/pmc_lp0_t210.h
+++ /dev/null
@@ -1,564 +0,0 @@
-/*
- * Copyright (c) 2010-2015, NVIDIA CORPORATION.  All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms and conditions of the GNU General Public License,
- * version 2, as published by the Free Software Foundation.
- *
- * This program is distributed in the hope it will be useful, but WITHOUT
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
- * more details.
- */
-
-#ifndef _TEGRA210_PMC_H_
-#define _TEGRA210_PMC_H_
-
-#include "types.h"
-
-struct tegra_pmc_regs
-{
-	u32 cntrl;
-	u32 sec_disable;
-	u32 pmc_swrst;
-	u32 wake_mask;
-	u32 wake_lvl;
-	u32 wake_status;
-	u32 sw_wake_status;
-	u32 dpd_pads_oride;
-	u32 dpd_sample;
-	u32 dpd_enable;
-	u32 pwrgate_timer_off;
-	u32 clamp_status;
-	u32 pwrgate_toggle;
-	u32 remove_clamping_cmd;
-	u32 pwrgate_status;
-	u32 pwrgood_timer;
-	u32 blink_timer;
-	u32 no_iopower;
-	u32 pwr_det;
-	u32 pwr_det_latch;
-	u32 scratch0;
-	u32 scratch1;
-	u32 scratch2;
-	u32 scratch3;
-	u32 scratch4;
-	u32 scratch5;
-	u32 scratch6;
-	u32 scratch7;
-	u32 scratch8;
-	u32 scratch9;
-	u32 scratch10;
-	u32 scratch11;
-	u32 scratch12;
-	u32 scratch13;
-	u32 scratch14;
-	u32 scratch15;
-	u32 scratch16;
-	u32 scratch17;
-	u32 scratch18;
-	u32 scratch19;
-	u32 odmdata;
-	u32 scratch21;
-	u32 scratch22;
-	u32 scratch23;
-	u32 secure_scratch0;
-	u32 secure_scratch1;
-	u32 secure_scratch2;
-	u32 secure_scratch3;
-	u32 secure_scratch4;
-	u32 secure_scratch5;
-	u32 cpupwrgood_timer;
-	u32 cpupwroff_timer;
-	u32 pg_mask;
-	u32 pg_mask_1;
-	u32 auto_wake_lvl;
-	u32 auto_wake_lvl_mask;
-	u32 wake_delay;
-	u32 pwr_det_val;
-	u32 ddr_pwr;
-	u32 usb_debounce_del;
-	u32 usb_a0;
-	u32 crypto_op;
-	u32 pllp_wb0_override;
-	u32 scratch24;
-	u32 scratch25;
-	u32 scratch26;
-	u32 scratch27;
-	u32 scratch28;
-	u32 scratch29;
-	u32 scratch30;
-	u32 scratch31;
-	u32 scratch32;
-	u32 scratch33;
-	u32 scratch34;
-	u32 scratch35;
-	u32 scratch36;
-	u32 scratch37;
-	u32 scratch38;
-	u32 scratch39;
-	u32 scratch40;
-	u32 scratch41;
-	u32 scratch42;
-	u32 bondout_mirror[3];
-	u32 sys_33v_en;
-	u32 bondout_mirror_access;
-	u32 gate;
-	u32 wake2_mask;
-	u32 wake2_lvl;
-	u32 wake2_status;
-	u32 sw_wake2_status;
-	u32 auto_wake2_lvl_mask;
-	u32 pg_mask_2;
-	u32 pg_mask_ce1;
-	u32 pg_mask_ce2;
-	u32 pg_mask_ce3;
-	u32 pwrgate_timer_ce[7];
-	u32 pcx_edpd_cntrl;
-	u32 osc_edpd_over;
-	u32 clk_out_cntrl;
-	u32 sata_pwrgt;
-	u32 sensor_ctrl;
-	u32 rst_status;
-	u32 io_dpd_req;
-	u32 io_dpd_status;
-	u32 io_dpd2_req;
-	u32 io_dpd2_status;
-	u32 sel_dpd_tim;
-	u32 vddp_sel;
-	u32 ddr_cfg;
-	u32 e_no_vttgen;
-	u8 _rsv0[4];
-	u32 pllm_wb0_override_freq;
-	u32 test_pwrgate;
-	u32 pwrgate_timer_mult;
-	u32 dis_sel_dpd;
-	u32 utmip_uhsic_triggers;
-	u32 utmip_uhsic_saved_state;
-	u32 utmip_pad_cfg;
-	u32 utmip_term_pad_cfg;
-	u32 utmip_uhsic_sleep_cfg;
-	u32 utmip_uhsic_sleepwalk_cfg;
-	u32 utmip_sleepwalk_p[3];
-	u32 uhsic_sleepwalk_p0;
-	u32 utmip_uhsic_status;
-	u32 utmip_uhsic_fake;
-	u32 bondout_mirror3[5 - 3];
-	u32 secure_scratch6;
-	u32 secure_scratch7;
-	u32 scratch43;
-	u32 scratch44;
-	u32 scratch45;
-	u32 scratch46;
-	u32 scratch47;
-	u32 scratch48;
-	u32 scratch49;
-	u32 scratch50;
-	u32 scratch51;
-	u32 scratch52;
-	u32 scratch53;
-	u32 scratch54;
-	u32 scratch55;
-	u32 scratch0_eco;
-	u32 por_dpd_ctrl;
-	u32 scratch2_eco;
-	u32 utmip_uhsic_line_wakeup;
-	u32 utmip_bias_master_cntrl;
-	u32 utmip_master_config;
-	u32 td_pwrgate_inter_part_timer;
-	u32 utmip_uhsic2_triggers;
-	u32 utmip_uhsic2_saved_state;
-	u32 utmip_uhsic2_sleep_cfg;
-	u32 utmip_uhsic2_sleepwalk_cfg;
-	u32 uhsic2_sleepwalk_p1;
-	u32 utmip_uhsic2_status;
-	u32 utmip_uhsic2_fake;
-	u32 utmip_uhsic2_line_wakeup;
-	u32 utmip_master2_config;
-	u32 utmip_uhsic_rpd_cfg;
-	u32 pg_mask_ce0;
-	u32 pg_mask3[5 - 3];
-	u32 pllm_wb0_override2;
-	u32 tsc_mult;
-	u32 cpu_vsense_override;
-	u32 glb_amap_cfg;
-	u32 sticky_bits;
-	u32 sec_disable2;
-	u32 weak_bias;
-	u32 reg_short;
-	u32 pg_mask_andor;
-	u8 _rsv1[0x2c];
-	u32 secure_scratch8;	/* offset 0x300 */
-	u32 secure_scratch9;
-	u32 secure_scratch10;
-	u32 secure_scratch11;
-	u32 secure_scratch12;
-	u32 secure_scratch13;
-	u32 secure_scratch14;
-	u32 secure_scratch15;
-	u32 secure_scratch16;
-	u32 secure_scratch17;
-	u32 secure_scratch18;
-	u32 secure_scratch19;
-	u32 secure_scratch20;
-	u32 secure_scratch21;
-	u32 secure_scratch22;
-	u32 secure_scratch23;
-	u32 secure_scratch24;
-	u32 secure_scratch25;
-	u32 secure_scratch26;
-	u32 secure_scratch27;
-	u32 secure_scratch28;
-	u32 secure_scratch29;
-	u32 secure_scratch30;
-	u32 secure_scratch31;
-	u32 secure_scratch32;
-	u32 secure_scratch33;
-	u32 secure_scratch34;
-	u32 secure_scratch35;
-	u32 secure_scratch36;
-	u32 secure_scratch37;
-	u32 secure_scratch38;
-	u32 secure_scratch39;
-	u32 secure_scratch40;
-	u32 secure_scratch41;
-	u32 secure_scratch42;
-	u32 secure_scratch43;
-	u32 secure_scratch44;
-	u32 secure_scratch45;
-	u32 secure_scratch46;
-	u32 secure_scratch47;
-	u32 secure_scratch48;
-	u32 secure_scratch49;
-	u32 secure_scratch50;
-	u32 secure_scratch51;
-	u32 secure_scratch52;
-	u32 secure_scratch53;
-	u32 secure_scratch54;
-	u32 secure_scratch55;
-	u32 secure_scratch56;
-	u32 secure_scratch57;
-	u32 secure_scratch58;
-	u32 secure_scratch59;
-	u32 secure_scratch60;
-	u32 secure_scratch61;
-	u32 secure_scratch62;
-	u32 secure_scratch63;
-	u32 secure_scratch64;
-	u32 secure_scratch65;
-	u32 secure_scratch66;
-	u32 secure_scratch67;
-	u32 secure_scratch68;
-	u32 secure_scratch69;
-	u32 secure_scratch70;
-	u32 secure_scratch71;
-	u32 secure_scratch72;
-	u32 secure_scratch73;
-	u32 secure_scratch74;
-	u32 secure_scratch75;
-	u32 secure_scratch76;
-	u32 secure_scratch77;
-	u32 secure_scratch78;
-	u32 secure_scratch79;
-	u32 _rsv0x420[8];
-	u32 cntrl2;			/* 0x440 */
-	u32 _rsv0x444[2];
-	u32 event_counter;	/* 0x44C */
-	u32 fuse_control;
-	u32 scratch1_eco;
-	u32 _rsv0x458[1];
-	u32 io_dpd3_req;	/* 0x45C */
-	u32 io_dpd3_status;
-	u32 io_dpd4_req;
-	u32 io_dpd4_status;
-	u32 _rsv0x46C[30];
-	u32 ddr_cntrl;		/* 0x4E4 */
-	u32 _rsv0x4E8[70];
-	u32 scratch56;		/* 0x600 */
-	u32 scratch57;
-	u32 scratch58;
-	u32 scratch59;
-	u32 scratch60;
-	u32 scratch61;
-	u32 scratch62;
-	u32 scratch63;
-	u32 scratch64;
-	u32 scratch65;
-	u32 scratch66;
-	u32 scratch67;
-	u32 scratch68;
-	u32 scratch69;
-	u32 scratch70;
-	u32 scratch71;
-	u32 scratch72;
-	u32 scratch73;
-	u32 scratch74;
-	u32 scratch75;
-	u32 scratch76;
-	u32 scratch77;
-	u32 scratch78;
-	u32 scratch79;
-	u32 scratch80;
-	u32 scratch81;
-	u32 scratch82;
-	u32 scratch83;
-	u32 scratch84;
-	u32 scratch85;
-	u32 scratch86;
-	u32 scratch87;
-	u32 scratch88;
-	u32 scratch89;
-	u32 scratch90;
-	u32 scratch91;
-	u32 scratch92;
-	u32 scratch93;
-	u32 scratch94;
-	u32 scratch95;
-	u32 scratch96;
-	u32 scratch97;
-	u32 scratch98;
-	u32 scratch99;
-	u32 scratch100;
-	u32 scratch101;
-	u32 scratch102;
-	u32 scratch103;
-	u32 scratch104;
-	u32 scratch105;
-	u32 scratch106;
-	u32 scratch107;
-	u32 scratch108;
-	u32 scratch109;
-	u32 scratch110;
-	u32 scratch111;
-	u32 scratch112;
-	u32 scratch113;
-	u32 scratch114;
-	u32 scratch115;
-	u32 scratch116;
-	u32 scratch117;
-	u32 scratch118;
-	u32 scratch119;
-	u32 scratch120;		/* 0x700 */
-	u32 scratch121;
-	u32 scratch122;
-	u32 scratch123;
-	u32 scratch124;
-	u32 scratch125;
-	u32 scratch126;
-	u32 scratch127;
-	u32 scratch128;
-	u32 scratch129;
-	u32 scratch130;
-	u32 scratch131;
-	u32 scratch132;
-	u32 scratch133;
-	u32 scratch134;
-	u32 scratch135;
-	u32 scratch136;
-	u32 scratch137;
-	u32 scratch138;
-	u32 scratch139;
-	u32 scratch140;
-	u32 scratch141;
-	u32 scratch142;
-	u32 scratch143;
-	u32 scratch144;
-	u32 scratch145;
-	u32 scratch146;
-	u32 scratch147;
-	u32 scratch148;
-	u32 scratch149;
-	u32 scratch150;
-	u32 scratch151;
-	u32 scratch152;
-	u32 scratch153;
-	u32 scratch154;
-	u32 scratch155;
-	u32 scratch156;
-	u32 scratch157;
-	u32 scratch158;
-	u32 scratch159;
-	u32 scratch160;
-	u32 scratch161;
-	u32 scratch162;
-	u32 scratch163;
-	u32 scratch164;
-	u32 scratch165;
-	u32 scratch166;
-	u32 scratch167;
-	u32 scratch168;
-	u32 scratch169;
-	u32 scratch170;
-	u32 scratch171;
-	u32 scratch172;
-	u32 scratch173;
-	u32 scratch174;
-	u32 scratch175;
-	u32 scratch176;
-	u32 scratch177;
-	u32 scratch178;
-	u32 scratch179;
-	u32 scratch180;
-	u32 scratch181;
-	u32 scratch182;
-	u32 scratch183;
-	u32 scratch184;
-	u32 scratch185;
-	u32 scratch186;
-	u32 scratch187;
-	u32 scratch188;
-	u32 scratch189;
-	u32 scratch190;
-	u32 scratch191;
-	u32 scratch192;
-	u32 scratch193;
-	u32 scratch194;
-	u32 scratch195;
-	u32 scratch196;
-	u32 scratch197;
-	u32 scratch198;
-	u32 scratch199;
-	u32 scratch200;
-	u32 scratch201;
-	u32 scratch202;
-	u32 scratch203;
-	u32 scratch204;
-	u32 scratch205;
-	u32 scratch206;
-	u32 scratch207;
-	u32 scratch208;
-	u32 scratch209;
-	u32 scratch210;
-	u32 scratch211;
-	u32 scratch212;
-	u32 scratch213;
-	u32 scratch214;
-	u32 scratch215;
-	u32 scratch216;
-	u32 scratch217;
-	u32 scratch218;
-	u32 scratch219;
-	u32 scratch220;
-	u32 scratch221;
-	u32 scratch222;
-	u32 scratch223;
-	u32 scratch224;
-	u32 scratch225;
-	u32 scratch226;
-	u32 scratch227;
-	u32 scratch228;
-	u32 scratch229;
-	u32 scratch230;
-	u32 scratch231;
-	u32 scratch232;
-	u32 scratch233;
-	u32 scratch234;
-	u32 scratch235;
-	u32 scratch236;
-	u32 scratch237;
-	u32 scratch238;
-	u32 scratch239;
-	u32 scratch240;
-	u32 scratch241;
-	u32 scratch242;
-	u32 scratch243;
-	u32 scratch244;
-	u32 scratch245;
-	u32 scratch246;
-	u32 scratch247;
-	u32 scratch248;
-	u32 scratch249;
-	u32 scratch250;
-	u32 scratch251;
-	u32 scratch252;
-	u32 scratch253;
-	u32 scratch254;
-	u32 scratch255;
-	u32 scratch256;
-	u32 scratch257;
-	u32 scratch258;
-	u32 scratch259;
-	u32 scratch260;
-	u32 scratch261;
-	u32 scratch262;
-	u32 scratch263;
-	u32 scratch264;
-	u32 scratch265;
-	u32 scratch266;
-	u32 scratch267;
-	u32 scratch268;
-	u32 scratch269;
-	u32 scratch270;
-	u32 scratch271;
-	u32 scratch272;
-	u32 scratch273;
-	u32 scratch274;
-	u32 scratch275;
-	u32 scratch276;
-	u32 scratch277;
-	u32 scratch278;
-	u32 scratch279;
-	u32 scratch280;
-	u32 scratch281;
-	u32 scratch282;
-	u32 scratch283;
-	u32 scratch284;
-	u32 scratch285;
-	u32 scratch286;
-	u32 scratch287;
-	u32 scratch288;
-	u32 scratch289;
-	u32 scratch290;
-	u32 scratch291;
-	u32 scratch292;
-	u32 scratch293;
-	u32 scratch294;
-	u32 scratch295;
-	u32 scratch296;
-	u32 scratch297;
-	u32 scratch298;
-	u32 scratch299;			/* 0x9CC */
-	u32 _rsv0x9D0[50];
-	u32 secure_scratch80;	/* 0xa98 */
-	u32 secure_scratch81;
-	u32 secure_scratch82;
-	u32 secure_scratch83;
-	u32 secure_scratch84;
-	u32 secure_scratch85;
-	u32 secure_scratch86;
-	u32 secure_scratch87;
-	u32 secure_scratch88;
-	u32 secure_scratch89;
-	u32 secure_scratch90;
-	u32 secure_scratch91;
-	u32 secure_scratch92;
-	u32 secure_scratch93;
-	u32 secure_scratch94;
-	u32 secure_scratch95;
-	u32 secure_scratch96;
-	u32 secure_scratch97;
-	u32 secure_scratch98;
-	u32 secure_scratch99;
-	u32 secure_scratch100;
-	u32 secure_scratch101;
-	u32 secure_scratch102;
-	u32 secure_scratch103;
-	u32 secure_scratch104;
-	u32 secure_scratch105;
-	u32 secure_scratch106;
-	u32 secure_scratch107;
-	u32 secure_scratch108;
-	u32 secure_scratch109;
-	u32 secure_scratch110;
-	u32 secure_scratch111;
-	u32 secure_scratch112;
-	u32 secure_scratch113;
-	u32 secure_scratch114;
-	u32 secure_scratch115;
-	u32 secure_scratch116;
-	u32 secure_scratch117;
-	u32 secure_scratch118;
-	u32 secure_scratch119;
-};
-
-#endif	/* _TEGRA210_PMC_H_ */
diff --git a/modules/hekate_libsys_lp0/pmc_t210.h b/modules/hekate_libsys_lp0/pmc_t210.h
new file mode 100644
index 00000000..160225e4
--- /dev/null
+++ b/modules/hekate_libsys_lp0/pmc_t210.h
@@ -0,0 +1,671 @@
+/*
+ * Copyright (c) 2018-2026 CTCaer
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ */
+
+#ifndef _PMC_T210_H_
+#define _PMC_T210_H_
+
+#include "types.h"
+
+typedef struct _pmc_regs_t210_t  {
+/* 0x000 */	u32 pmc_cntrl;
+/* 0x004 */	u32 pmc_sec_disable;
+/* 0x008 */	u32 pmc_pmc_swrst;
+/* 0x00c */	u32 pmc_wake_mask;
+/* 0x010 */	u32 pmc_wake_lvl;
+/* 0x014 */	u32 pmc_wake_status;
+/* 0x018 */	u32 pmc_sw_wake_status;
+/* 0x01c */	u32 pmc_dpd_pads_oride;
+/* 0x020 */	u32 pmc_dpd_sample;
+/* 0x024 */	u32 pmc_dpd_enable;
+/* 0x028 */	u32 pmc_pwrgate_timer_off;
+/* 0x02c */	u32 pmc_clamp_status;
+/* 0x030 */	u32 pmc_pwrgate_toggle;
+/* 0x034 */	u32 pmc_remove_clamping_cmd;
+/* 0x038 */	u32 pmc_pwrgate_status;
+/* 0x03c */	u32 pmc_pwrgood_timer;
+/* 0x040 */	u32 pmc_blink_timer;
+/* 0x044 */	u32 pmc_no_iopower;
+/* 0x048 */	u32 pmc_pwr_det;
+/* 0x04c */	u32 pmc_pwr_det_latch;
+/* 0x050 */	u32 pmc_scratch0;
+/* 0x054 */	u32 pmc_scratch1;
+/* 0x058 */	u32 pmc_scratch2;
+/* 0x05c */	u32 pmc_scratch3;
+/* 0x060 */	u32 pmc_scratch4;
+/* 0x064 */	u32 pmc_scratch5;
+/* 0x068 */	u32 pmc_scratch6;
+/* 0x06c */	u32 pmc_scratch7;
+/* 0x070 */	u32 pmc_scratch8;
+/* 0x074 */	u32 pmc_scratch9;
+/* 0x078 */	u32 pmc_scratch10;
+/* 0x07c */	u32 pmc_scratch11;
+/* 0x080 */	u32 pmc_scratch12;
+/* 0x084 */	u32 pmc_scratch13;
+/* 0x088 */	u32 pmc_scratch14;
+/* 0x08c */	u32 pmc_scratch15;
+/* 0x090 */	u32 pmc_scratch16;
+/* 0x094 */	u32 pmc_scratch17;
+/* 0x098 */	u32 pmc_scratch18;
+/* 0x09c */	u32 pmc_scratch19;
+/* 0x0a0 */	u32 pmc_scratch20; // ODM data/config scratch.
+/* 0x0a4 */	u32 pmc_scratch21;
+/* 0x0a8 */	u32 pmc_scratch22;
+/* 0x0ac */	u32 pmc_scratch23;
+/* 0x0b0 */	u32 pmc_secure_scratch0;
+/* 0x0b4 */	u32 pmc_secure_scratch1;
+/* 0x0b8 */	u32 pmc_secure_scratch2;
+/* 0x0bc */	u32 pmc_secure_scratch3;
+/* 0x0c0 */	u32 pmc_secure_scratch4;
+/* 0x0c4 */	u32 pmc_secure_scratch5;
+/* 0x0c8 */	u32 pmc_cpupwrgood_timer;
+/* 0x0cc */	u32 pmc_cpupwroff_timer;
+/* 0x0d0 */	u32 pmc_pg_mask;
+/* 0x0d4 */	u32 pmc_pg_mask_1;
+/* 0x0d8 */	u32 pmc_auto_wake_lvl;
+/* 0x0dc */	u32 pmc_auto_wake_lvl_mask;
+/* 0x0e0 */	u32 pmc_wake_delay;
+/* 0x0e4 */	u32 pmc_pwr_det_val;
+/* 0x0e8 */	u32 pmc_ddr_pwr;
+/* 0x0ec */	u32 pmc_usb_debounce_del;
+/* 0x0f0 */	u32 pmc_usb_ao;
+/* 0x0f4 */	u32 pmc_crypto_op;
+/* 0x0f8 */	u32 pmc_pllp_wb0_override;
+/* 0x0fc */	u32 pmc_scratch24;
+/* 0x100 */	u32 pmc_scratch25;
+/* 0x104 */	u32 pmc_scratch26;
+/* 0x108 */	u32 pmc_scratch27;
+/* 0x10c */	u32 pmc_scratch28;
+/* 0x110 */	u32 pmc_scratch29;
+/* 0x114 */	u32 pmc_scratch30;
+/* 0x118 */	u32 pmc_scratch31;
+/* 0x11c */	u32 pmc_scratch32;
+/* 0x120 */	u32 pmc_scratch33;
+/* 0x124 */	u32 pmc_scratch34;
+/* 0x128 */	u32 pmc_scratch35;
+/* 0x12c */	u32 pmc_scratch36;
+/* 0x130 */	u32 pmc_scratch37;
+/* 0x134 */	u32 pmc_scratch38;
+/* 0x138 */	u32 pmc_scratch39;
+/* 0x13c */	u32 pmc_scratch40;
+/* 0x140 */	u32 pmc_scratch41;
+/* 0x144 */	u32 pmc_scratch42;
+/* 0x148 */	u32 pmc_bondout_mirror0;
+/* 0x14c */	u32 pmc_bondout_mirror1;
+/* 0x150 */	u32 pmc_bondout_mirror2;
+/* 0x154 */	u32 pmc_sys_33v_en;
+/* 0x158 */	u32 pmc_bondout_mirror_access;
+/* 0x15c */	u32 pmc_gate;
+/* 0x160 */	u32 pmc_wake2_mask;
+/* 0x164 */	u32 pmc_wake2_lvl;
+/* 0x168 */	u32 pmc_wake2_status;
+/* 0x16c */	u32 pmc_sw_wake2_status;
+/* 0x170 */	u32 pmc_auto_wake2_lvl_mask;
+/* 0x174 */	u32 pmc_pg_mask_2;
+/* 0x178 */	u32 pmc_pg_mask_ce1;
+/* 0x17c */	u32 pmc_pg_mask_ce2;
+/* 0x180 */	u32 pmc_pg_mask_ce3;
+/* 0x184 */	u32 pmc_pwrgate_timer_ce_0;
+/* 0x188 */	u32 pmc_pwrgate_timer_ce_1;
+/* 0x18c */	u32 pmc_pwrgate_timer_ce_2;
+/* 0x190 */	u32 pmc_pwrgate_timer_ce_3;
+/* 0x194 */	u32 pmc_pwrgate_timer_ce_4;
+/* 0x198 */	u32 pmc_pwrgate_timer_ce_5;
+/* 0x19c */	u32 pmc_pwrgate_timer_ce_6;
+/* 0x1a0 */	u32 pmc_pcx_edpd_cntrl;
+/* 0x1a4 */	u32 pmc_osc_edpd_over;
+/* 0x1a8 */	u32 pmc_clk_out_cntrl;
+/* 0x1ac */	u32 pmc_sata_pwrgt;
+/* 0x1b0 */	u32 pmc_sensor_ctrl;
+/* 0x1b4 */	u32 pmc_rst_status;
+/* 0x1b8 */	u32 pmc_io_dpd_req;
+/* 0x1bc */	u32 pmc_io_dpd_status;
+/* 0x1c0 */	u32 pmc_io_dpd2_req;
+/* 0x1c4 */	u32 pmc_io_dpd2_status;
+/* 0x1c8 */	u32 pmc_sel_dpd_tim;
+/* 0x1cc */	u32 pmc_vddp_sel;
+/* 0x1d0 */	u32 pmc_ddr_cfg;
+/* 0x1d4 */	u32 pmc_e_no_vttgen;
+/* 0x1d8 */	u32 rsvd_1d8;
+/* 0x1dc */	u32 pmc_pllm_wb0_override_freq;
+/* 0x1e0 */	u32 pmc_test_pwrgate;
+/* 0x1e4 */	u32 pmc_pwrgate_timer_mult;
+/* 0x1e8 */	u32 pmc_dsi_sel_dpd;
+/* 0x1ec */	u32 pmc_utmip_uhsic_triggers;
+/* 0x1f0 */	u32 pmc_utmip_uhsic_saved_state;
+/* 0x1f4 */	u32 rsvd_1f4;
+/* 0x1f8 */	u32 pmc_utmip_term_pad_cfg;
+/* 0x1fc */	u32 pmc_utmip_uhsic_sleep_cfg;
+/* 0x200 */	u32 pmc_utmip_uhsic_sleepwalk_cfg;
+/* 0x204 */	u32 pmc_utmip_sleepwalk_p0;
+/* 0x208 */	u32 pmc_utmip_sleepwalk_p1;
+/* 0x20c */	u32 pmc_utmip_sleepwalk_p2;
+/* 0x210 */	u32 pmc_uhsic_sleepwalk_p0;
+/* 0x214 */	u32 pmc_utmip_uhsic_status;
+/* 0x218 */	u32 pmc_utmip_uhsic_fake;
+/* 0x21c */	u32 pmc_bondout_mirror3;
+/* 0x220 */	u32 pmc_bondout_mirror4;
+/* 0x224 */	u32 pmc_secure_scratch6;
+/* 0x228 */	u32 pmc_secure_scratch7;
+/* 0x22c */	u32 pmc_scratch43;
+/* 0x230 */	u32 pmc_scratch44;
+/* 0x234 */	u32 pmc_scratch45;
+/* 0x238 */	u32 pmc_scratch46;
+/* 0x23c */	u32 pmc_scratch47;
+/* 0x240 */	u32 pmc_scratch48;
+/* 0x244 */	u32 pmc_scratch49;
+/* 0x248 */	u32 pmc_scratch50;
+/* 0x24c */	u32 pmc_scratch51;
+/* 0x250 */	u32 pmc_scratch52;
+/* 0x254 */	u32 pmc_scratch53;
+/* 0x258 */	u32 pmc_scratch54;
+/* 0x25c */	u32 pmc_scratch55;
+/* 0x260 */	u32 pmc_scratch0_eco;
+/* 0x264 */	u32 pmc_por_dpd_ctrl;
+/* 0x268 */	u32 pmc_scratch2_eco;
+/* 0x26c */	u32 pmc_utmip_uhsic_line_wakeup;
+/* 0x270 */	u32 pmc_utmip_bias_master_cntrl;
+/* 0x274 */	u32 pmc_utmip_master_config;
+/* 0x278 */	u32 pmc_td_pwrgate_inter_part_timer;
+/* 0x27c */	u32 pmc_utmip_uhsic2_triggers;
+/* 0x280 */	u32 pmc_utmip_uhsic2_saved_state;
+/* 0x284 */	u32 pmc_utmip_uhsic2_sleep_cfg;
+/* 0x288 */	u32 pmc_utmip_uhsic2_sleepwalk_cfg;
+/* 0x28c */	u32 pmc_uhsic2_sleepwalk_p1;
+/* 0x290 */	u32 pmc_utmip_uhsic2_status;
+/* 0x294 */	u32 pmc_utmip_uhsic2_fake;
+/* 0x298 */	u32 pmc_utmip_uhsic2_line_wakeup;
+/* 0x29c */	u32 pmc_utmip_master2_config;
+/* 0x2a0 */	u32 pmc_utmip_uhsic_rpd_cfg;
+/* 0x2a4 */	u32 pmc_pg_mask_ce0;
+/* 0x2a8 */	u32 pmc_pg_mask_3;
+/* 0x2ac */	u32 pmc_pg_mask_4;
+/* 0x2b0 */	u32 pmc_pllm_wb0_override2;
+/* 0x2b4 */	u32 pmc_tsc_mult;
+/* 0x2b8 */	u32 pmc_cpu_vsense_override;
+/* 0x2bc */	u32 pmc_glb_amap_cfg;
+/* 0x2c0 */	u32 pmc_sticky_bits;
+/* 0x2c4 */	u32 pmc_sec_disable2;
+/* 0x2c8 */	u32 pmc_weak_bias;
+/* 0x2cc */	u32 pmc_reg_short;
+/* 0x2d0 */	u32 pmc_pg_mask_andor;
+/* 0x2d4 */	u32 pmc_gpu_rg_cntrl;
+/* 0x2d8 */	u32 pmc_sec_disable3;
+/* 0x2dc */	u32 pmc_pg_mask_5;
+/* 0x2e0 */	u32 pmc_pg_mask_6;
+/* 0x2e4 */	u32 rsvd_2e4[7];
+/* 0x300 */	u32 pmc_secure_scratch8;
+/* 0x304 */	u32 pmc_secure_scratch9;
+/* 0x308 */	u32 pmc_secure_scratch10;
+/* 0x30c */	u32 pmc_secure_scratch11;
+/* 0x310 */	u32 pmc_secure_scratch12;
+/* 0x314 */	u32 pmc_secure_scratch13;
+/* 0x318 */	u32 pmc_secure_scratch14;
+/* 0x31c */	u32 pmc_secure_scratch15;
+/* 0x320 */	u32 pmc_secure_scratch16;
+/* 0x324 */	u32 pmc_secure_scratch17;
+/* 0x328 */	u32 pmc_secure_scratch18;
+/* 0x32c */	u32 pmc_secure_scratch19;
+/* 0x330 */	u32 pmc_secure_scratch20;
+/* 0x334 */	u32 pmc_secure_scratch21;
+/* 0x338 */	u32 pmc_secure_scratch22; // AArch32 reset address.
+/* 0x33c */	u32 pmc_secure_scratch23;
+/* 0x340 */	u32 pmc_secure_scratch24;
+/* 0x344 */	u32 pmc_secure_scratch25;
+/* 0x348 */	u32 pmc_secure_scratch26;
+/* 0x34c */	u32 pmc_secure_scratch27;
+/* 0x350 */	u32 pmc_secure_scratch28;
+/* 0x354 */	u32 pmc_secure_scratch29;
+/* 0x358 */	u32 pmc_secure_scratch30;
+/* 0x35c */	u32 pmc_secure_scratch31;
+/* 0x360 */	u32 pmc_secure_scratch32;
+/* 0x364 */	u32 pmc_secure_scratch33;
+/* 0x368 */	u32 pmc_secure_scratch34; // AArch64 reset address.
+/* 0x36c */	u32 pmc_secure_scratch35; // AArch64 reset hi-address.
+/* 0x370 */	u32 pmc_secure_scratch36;
+/* 0x374 */	u32 pmc_secure_scratch37;
+/* 0x378 */	u32 pmc_secure_scratch38;
+/* 0x37c */	u32 pmc_secure_scratch39;
+/* 0x380 */	u32 pmc_secure_scratch40;
+/* 0x384 */	u32 pmc_secure_scratch41;
+/* 0x388 */	u32 pmc_secure_scratch42;
+/* 0x38c */	u32 pmc_secure_scratch43;
+/* 0x390 */	u32 pmc_secure_scratch44;
+/* 0x394 */	u32 pmc_secure_scratch45;
+/* 0x398 */	u32 pmc_secure_scratch46;
+/* 0x39c */	u32 pmc_secure_scratch47;
+/* 0x3a0 */	u32 pmc_secure_scratch48;
+/* 0x3a4 */	u32 pmc_secure_scratch49;
+/* 0x3a8 */	u32 pmc_secure_scratch50;
+/* 0x3ac */	u32 pmc_secure_scratch51;
+/* 0x3b0 */	u32 pmc_secure_scratch52;
+/* 0x3b4 */	u32 pmc_secure_scratch53;
+/* 0x3b8 */	u32 pmc_secure_scratch54;
+/* 0x3bc */	u32 pmc_secure_scratch55;
+/* 0x3c0 */	u32 pmc_secure_scratch56;
+/* 0x3c4 */	u32 pmc_secure_scratch57;
+/* 0x3c8 */	u32 pmc_secure_scratch58;
+/* 0x3cc */	u32 pmc_secure_scratch59;
+/* 0x3d0 */	u32 pmc_secure_scratch60;
+/* 0x3d4 */	u32 pmc_secure_scratch61;
+/* 0x3d8 */	u32 pmc_secure_scratch62;
+/* 0x3dc */	u32 pmc_secure_scratch63;
+/* 0x3e0 */	u32 pmc_secure_scratch64;
+/* 0x3e4 */	u32 pmc_secure_scratch65;
+/* 0x3e8 */	u32 pmc_secure_scratch66;
+/* 0x3ec */	u32 pmc_secure_scratch67;
+/* 0x3f0 */	u32 pmc_secure_scratch68;
+/* 0x3f4 */	u32 pmc_secure_scratch69;
+/* 0x3f8 */	u32 pmc_secure_scratch70;
+/* 0x3fc */	u32 pmc_secure_scratch71;
+/* 0x400 */	u32 pmc_secure_scratch72;
+/* 0x404 */	u32 pmc_secure_scratch73;
+/* 0x408 */	u32 pmc_secure_scratch74;
+/* 0x40c */	u32 pmc_secure_scratch75;
+/* 0x410 */	u32 pmc_secure_scratch76;
+/* 0x414 */	u32 pmc_secure_scratch77;
+/* 0x418 */	u32 pmc_secure_scratch78;
+/* 0x41c */	u32 pmc_secure_scratch79;
+/* 0x420 */	u32 rsvd_420[8];
+/* 0x440 */	u32 pmc_cntrl2;
+/* 0x444 */	u32 pmc_io_dpd_off_mask;
+/* 0x448 */	u32 pmc_io_dpd2_off_mask;
+/* 0x44c */	u32 pmc_event_counter;
+/* 0x450 */	u32 pmc_fuse_control;
+/* 0x454 */	u32 pmc_scratch1_eco;
+/* 0x458 */	u32 rsvd_458;
+/* 0x45c */	u32 pmc_io_dpd3_req;
+/* 0x460 */	u32 pmc_io_dpd3_status;
+/* 0x464 */	u32 pmc_io_dpd4_req;
+/* 0x468 */	u32 pmc_io_dpd4_status;
+/* 0x46c */	u32 rsvd_46c[2];
+/* 0x474 */	u32 pmc_direct_thermtrip_cfg;
+/* 0x478 */	u32 pmc_tsosc_delay;
+/* 0x47c */	u32 pmc_set_sw_clamp;
+/* 0x480 */	u32 pmc_debug_authentication;
+/* 0x484 */	u32 pmc_aotag_cfg;
+/* 0x488 */	u32 pmc_aotag_thresh1_cfg;
+/* 0x48c */	u32 pmc_aotag_thresh2_cfg;
+/* 0x490 */	u32 pmc_aotag_thresh3_cfg;
+/* 0x494 */	u32 pmc_aotag_status;
+/* 0x498 */	u32 pmc_aotag_security;
+/* 0x49c */	u32 pmc_tsensor_config0;
+/* 0x4a0 */	u32 pmc_tsensor_config1;
+/* 0x4a4 */	u32 pmc_tsensor_config2;
+/* 0x4a8 */	u32 pmc_tsensor_status0;
+/* 0x4ac */	u32 pmc_tsensor_status1;
+/* 0x4b0 */	u32 pmc_tsensor_status2;
+/* 0x4b4 */	u32 pmc_tsensor_pdiv;
+/* 0x4b8 */	u32 pmc_aotag_intr_en;
+/* 0x4bc */	u32 pmc_aotag_intr_dis;
+/* 0x4c0 */	u32 pmc_utmip_pad_cfg0;
+/* 0x4c4 */	u32 pmc_utmip_pad_cfg1;
+/* 0x4c8 */	u32 pmc_utmip_pad_cfg2;
+/* 0x4cc */	u32 pmc_utmip_pad_cfg3;
+/* 0x4d0 */	u32 pmc_utmip_uhsic_sleep_cfg1;
+/* 0x4d4 */	u32 pmc_cc4_hvc_control;
+/* 0x4d8 */	u32 pmc_wake_debounce_en;
+/* 0x4dc */	u32 pmc_ramdump_ctl_status;
+/* 0x4e0 */	u32 pmc_utmip_sleepwalk_p3;
+/* 0x4e4 */	u32 pmc_ddr_cntrl;
+/* 0x4e8 */	u32 rsvd_4e8[50];
+/* 0x5b0 */	u32 pmc_sec_disable4;
+/* 0x5b4 */	u32 pmc_sec_disable5;
+/* 0x5b8 */	u32 pmc_sec_disable6;
+/* 0x5bc */	u32 pmc_sec_disable7;
+/* 0x5c0 */	u32 pmc_sec_disable8;
+/* 0x5c4 */	u32 pmc_sec_disable9_b01;
+/* 0x5c8 */	u32 pmc_sec_disable10_b01;
+/* 0x5cc */	u32 rsvd_5cc[13];
+/* 0x600 */	u32 pmc_scratch56;
+/* 0x604 */	u32 pmc_scratch57;
+/* 0x608 */	u32 pmc_scratch58;
+/* 0x60c */	u32 pmc_scratch59;
+/* 0x610 */	u32 pmc_scratch60;
+/* 0x614 */	u32 pmc_scratch61;
+/* 0x618 */	u32 pmc_scratch62;
+/* 0x61c */	u32 pmc_scratch63;
+/* 0x620 */	u32 pmc_scratch64;
+/* 0x624 */	u32 pmc_scratch65;
+/* 0x628 */	u32 pmc_scratch66;
+/* 0x62c */	u32 pmc_scratch67;
+/* 0x630 */	u32 pmc_scratch68;
+/* 0x634 */	u32 pmc_scratch69;
+/* 0x638 */	u32 pmc_scratch70;
+/* 0x63c */	u32 pmc_scratch71;
+/* 0x640 */	u32 pmc_scratch72;
+/* 0x644 */	u32 pmc_scratch73;
+/* 0x648 */	u32 pmc_scratch74;
+/* 0x64c */	u32 pmc_scratch75;
+/* 0x650 */	u32 pmc_scratch76;
+/* 0x654 */	u32 pmc_scratch77;
+/* 0x658 */	u32 pmc_scratch78;
+/* 0x65c */	u32 pmc_scratch79;
+/* 0x660 */	u32 pmc_scratch80;
+/* 0x664 */	u32 pmc_scratch81;
+/* 0x668 */	u32 pmc_scratch82;
+/* 0x66c */	u32 pmc_scratch83;
+/* 0x670 */	u32 pmc_scratch84;
+/* 0x674 */	u32 pmc_scratch85;
+/* 0x678 */	u32 pmc_scratch86;
+/* 0x67c */	u32 pmc_scratch87;
+/* 0x680 */	u32 pmc_scratch88;
+/* 0x684 */	u32 pmc_scratch89;
+/* 0x688 */	u32 pmc_scratch90;
+/* 0x68c */	u32 pmc_scratch91;
+/* 0x690 */	u32 pmc_scratch92;
+/* 0x694 */	u32 pmc_scratch93;
+/* 0x698 */	u32 pmc_scratch94;
+/* 0x69c */	u32 pmc_scratch95;
+/* 0x6a0 */	u32 pmc_scratch96;
+/* 0x6a4 */	u32 pmc_scratch97;
+/* 0x6a8 */	u32 pmc_scratch98;
+/* 0x6ac */	u32 pmc_scratch99;
+/* 0x6b0 */	u32 pmc_scratch100;
+/* 0x6b4 */	u32 pmc_scratch101;
+/* 0x6b8 */	u32 pmc_scratch102;
+/* 0x6bc */	u32 pmc_scratch103;
+/* 0x6c0 */	u32 pmc_scratch104;
+/* 0x6c4 */	u32 pmc_scratch105;
+/* 0x6c8 */	u32 pmc_scratch106;
+/* 0x6cc */	u32 pmc_scratch107;
+/* 0x6d0 */	u32 pmc_scratch108;
+/* 0x6d4 */	u32 pmc_scratch109;
+/* 0x6d8 */	u32 pmc_scratch110;
+/* 0x6dc */	u32 pmc_scratch111;
+/* 0x6e0 */	u32 pmc_scratch112;
+/* 0x6e4 */	u32 pmc_scratch113;
+/* 0x6e8 */	u32 pmc_scratch114;
+/* 0x6ec */	u32 pmc_scratch115;
+/* 0x6f0 */	u32 pmc_scratch116;
+/* 0x6f4 */	u32 pmc_scratch117;
+/* 0x6f8 */	u32 pmc_scratch118;
+/* 0x6fc */	u32 pmc_scratch119;
+/* 0x700 */	u32 pmc_scratch120;
+/* 0x704 */	u32 pmc_scratch121;
+/* 0x708 */	u32 pmc_scratch122;
+/* 0x70c */	u32 pmc_scratch123;
+/* 0x710 */	u32 pmc_scratch124;
+/* 0x714 */	u32 pmc_scratch125;
+/* 0x718 */	u32 pmc_scratch126;
+/* 0x71c */	u32 pmc_scratch127;
+/* 0x720 */	u32 pmc_scratch128;
+/* 0x724 */	u32 pmc_scratch129;
+/* 0x728 */	u32 pmc_scratch130;
+/* 0x72c */	u32 pmc_scratch131;
+/* 0x730 */	u32 pmc_scratch132;
+/* 0x734 */	u32 pmc_scratch133;
+/* 0x738 */	u32 pmc_scratch134;
+/* 0x73c */	u32 pmc_scratch135;
+/* 0x740 */	u32 pmc_scratch136;
+/* 0x744 */	u32 pmc_scratch137;
+/* 0x748 */	u32 pmc_scratch138;
+/* 0x74c */	u32 pmc_scratch139;
+/* 0x750 */	u32 pmc_scratch140;
+/* 0x754 */	u32 pmc_scratch141;
+/* 0x758 */	u32 pmc_scratch142;
+/* 0x75c */	u32 pmc_scratch143;
+/* 0x760 */	u32 pmc_scratch144;
+/* 0x764 */	u32 pmc_scratch145;
+/* 0x768 */	u32 pmc_scratch146;
+/* 0x76c */	u32 pmc_scratch147;
+/* 0x770 */	u32 pmc_scratch148;
+/* 0x774 */	u32 pmc_scratch149;
+/* 0x778 */	u32 pmc_scratch150;
+/* 0x77c */	u32 pmc_scratch151;
+/* 0x780 */	u32 pmc_scratch152;
+/* 0x784 */	u32 pmc_scratch153;
+/* 0x788 */	u32 pmc_scratch154;
+/* 0x78c */	u32 pmc_scratch155;
+/* 0x790 */	u32 pmc_scratch156;
+/* 0x794 */	u32 pmc_scratch157;
+/* 0x798 */	u32 pmc_scratch158;
+/* 0x79c */	u32 pmc_scratch159;
+/* 0x7a0 */	u32 pmc_scratch160;
+/* 0x7a4 */	u32 pmc_scratch161;
+/* 0x7a8 */	u32 pmc_scratch162;
+/* 0x7ac */	u32 pmc_scratch163;
+/* 0x7b0 */	u32 pmc_scratch164;
+/* 0x7b4 */	u32 pmc_scratch165;
+/* 0x7b8 */	u32 pmc_scratch166;
+/* 0x7bc */	u32 pmc_scratch167;
+/* 0x7c0 */	u32 pmc_scratch168;
+/* 0x7c4 */	u32 pmc_scratch169;
+/* 0x7c8 */	u32 pmc_scratch170;
+/* 0x7cc */	u32 pmc_scratch171;
+/* 0x7d0 */	u32 pmc_scratch172;
+/* 0x7d4 */	u32 pmc_scratch173;
+/* 0x7d8 */	u32 pmc_scratch174;
+/* 0x7dc */	u32 pmc_scratch175;
+/* 0x7e0 */	u32 pmc_scratch176;
+/* 0x7e4 */	u32 pmc_scratch177;
+/* 0x7e8 */	u32 pmc_scratch178;
+/* 0x7ec */	u32 pmc_scratch179;
+/* 0x7f0 */	u32 pmc_scratch180;
+/* 0x7f4 */	u32 pmc_scratch181;
+/* 0x7f8 */	u32 pmc_scratch182;
+/* 0x7fc */	u32 pmc_scratch183;
+/* 0x800 */	u32 pmc_scratch184;
+/* 0x804 */	u32 pmc_scratch185;
+/* 0x808 */	u32 pmc_scratch186;
+/* 0x80c */	u32 pmc_scratch187;
+/* 0x810 */	u32 pmc_scratch188;
+/* 0x814 */	u32 pmc_scratch189;
+/* 0x818 */	u32 pmc_scratch190;
+/* 0x81c */	u32 pmc_scratch191;
+/* 0x820 */	u32 pmc_scratch192;
+/* 0x824 */	u32 pmc_scratch193;
+/* 0x828 */	u32 pmc_scratch194;
+/* 0x82c */	u32 pmc_scratch195;
+/* 0x830 */	u32 pmc_scratch196;
+/* 0x834 */	u32 pmc_scratch197;
+/* 0x838 */	u32 pmc_scratch198;
+/* 0x83c */	u32 pmc_scratch199;
+/* 0x840 */	u32 pmc_scratch200;
+/* 0x844 */	u32 pmc_scratch201;
+/* 0x848 */	u32 pmc_scratch202;
+/* 0x84c */	u32 pmc_scratch203;
+/* 0x850 */	u32 pmc_scratch204;
+/* 0x854 */	u32 pmc_scratch205;
+/* 0x858 */	u32 pmc_scratch206;
+/* 0x85c */	u32 pmc_scratch207;
+/* 0x860 */	u32 pmc_scratch208;
+/* 0x864 */	u32 pmc_scratch209;
+/* 0x868 */	u32 pmc_scratch210;
+/* 0x86c */	u32 pmc_scratch211;
+/* 0x870 */	u32 pmc_scratch212;
+/* 0x874 */	u32 pmc_scratch213;
+/* 0x878 */	u32 pmc_scratch214;
+/* 0x87c */	u32 pmc_scratch215;
+/* 0x880 */	u32 pmc_scratch216;
+/* 0x884 */	u32 pmc_scratch217;
+/* 0x888 */	u32 pmc_scratch218;
+/* 0x88c */	u32 pmc_scratch219;
+/* 0x890 */	u32 pmc_scratch220;
+/* 0x894 */	u32 pmc_scratch221;
+/* 0x898 */	u32 pmc_scratch222;
+/* 0x89c */	u32 pmc_scratch223;
+/* 0x8a0 */	u32 pmc_scratch224;
+/* 0x8a4 */	u32 pmc_scratch225;
+/* 0x8a8 */	u32 pmc_scratch226;
+/* 0x8ac */	u32 pmc_scratch227;
+/* 0x8b0 */	u32 pmc_scratch228;
+/* 0x8b4 */	u32 pmc_scratch229;
+/* 0x8b8 */	u32 pmc_scratch230;
+/* 0x8bc */	u32 pmc_scratch231;
+/* 0x8c0 */	u32 pmc_scratch232;
+/* 0x8c4 */	u32 pmc_scratch233;
+/* 0x8c8 */	u32 pmc_scratch234;
+/* 0x8cc */	u32 pmc_scratch235;
+/* 0x8d0 */	u32 pmc_scratch236;
+/* 0x8d4 */	u32 pmc_scratch237;
+/* 0x8d8 */	u32 pmc_scratch238;
+/* 0x8dc */	u32 pmc_scratch239;
+/* 0x8e0 */	u32 pmc_scratch240;
+/* 0x8e4 */	u32 pmc_scratch241;
+/* 0x8e8 */	u32 pmc_scratch242;
+/* 0x8ec */	u32 pmc_scratch243;
+/* 0x8f0 */	u32 pmc_scratch244;
+/* 0x8f4 */	u32 pmc_scratch245;
+/* 0x8f8 */	u32 pmc_scratch246;
+/* 0x8fc */	u32 pmc_scratch247;
+/* 0x900 */	u32 pmc_scratch248;
+/* 0x904 */	u32 pmc_scratch249;
+/* 0x908 */	u32 pmc_scratch250;
+/* 0x90c */	u32 pmc_scratch251;
+/* 0x910 */	u32 pmc_scratch252;
+/* 0x914 */	u32 pmc_scratch253;
+/* 0x918 */	u32 pmc_scratch254;
+/* 0x91c */	u32 pmc_scratch255;
+/* 0x920 */	u32 pmc_scratch256;
+/* 0x924 */	u32 pmc_scratch257;
+/* 0x928 */	u32 pmc_scratch258;
+/* 0x92c */	u32 pmc_scratch259;
+/* 0x930 */	u32 pmc_scratch260;
+/* 0x934 */	u32 pmc_scratch261;
+/* 0x938 */	u32 pmc_scratch262;
+/* 0x93c */	u32 pmc_scratch263;
+/* 0x940 */	u32 pmc_scratch264;
+/* 0x944 */	u32 pmc_scratch265;
+/* 0x948 */	u32 pmc_scratch266;
+/* 0x94c */	u32 pmc_scratch267;
+/* 0x950 */	u32 pmc_scratch268;
+/* 0x954 */	u32 pmc_scratch269;
+/* 0x958 */	u32 pmc_scratch270;
+/* 0x95c */	u32 pmc_scratch271;
+/* 0x960 */	u32 pmc_scratch272;
+/* 0x964 */	u32 pmc_scratch273;
+/* 0x968 */	u32 pmc_scratch274;
+/* 0x96c */	u32 pmc_scratch275;
+/* 0x970 */	u32 pmc_scratch276;
+/* 0x974 */	u32 pmc_scratch277;
+/* 0x978 */	u32 pmc_scratch278;
+/* 0x97c */	u32 pmc_scratch279;
+/* 0x980 */	u32 pmc_scratch280;
+/* 0x984 */	u32 pmc_scratch281;
+/* 0x988 */	u32 pmc_scratch282;
+/* 0x98c */	u32 pmc_scratch283;
+/* 0x990 */	u32 pmc_scratch284;
+/* 0x994 */	u32 pmc_scratch285;
+/* 0x998 */	u32 pmc_scratch286;
+/* 0x99c */	u32 pmc_scratch287;
+/* 0x9a0 */	u32 pmc_scratch288;
+/* 0x9a4 */	u32 pmc_scratch289;
+/* 0x9a8 */	u32 pmc_scratch290;
+/* 0x9ac */	u32 pmc_scratch291;
+/* 0x9b0 */	u32 pmc_scratch292;
+/* 0x9b4 */	u32 pmc_scratch293;
+/* 0x9b8 */	u32 pmc_scratch294;
+/* 0x9bc */	u32 pmc_scratch295;
+/* 0x9c0 */	u32 pmc_scratch296;
+/* 0x9c4 */	u32 pmc_scratch297;
+/* 0x9c8 */	u32 pmc_scratch298;
+/* 0x9cc */	u32 pmc_scratch299;
+/* 0x9d0 */	u32 rsvd_9d0[30];
+/* 0xa48 */	u32 pmc_scratch_write_disable0_b01;
+/* 0xa4c */	u32 pmc_scratch_write_disable1_b01;
+/* 0xa50 */	u32 pmc_scratch_write_disable2_b01;
+/* 0xa54 */	u32 pmc_scratch_write_disable3_b01;
+/* 0xa58 */	u32 pmc_scratch_write_disable4_b01;
+/* 0xa5c */	u32 pmc_scratch_write_disable5_b01;
+/* 0xa60 */	u32 pmc_scratch_write_disable6_b01;
+/* 0xa64 */	u32 pmc_scratch_write_disable7_b01;
+/* 0xa68 */	u32 pmc_scratch_write_disable8_b01;
+/* 0xa6c */	u32 pmc_scratch_write_disable9_b01;
+/* 0xa70 */	u32 pmc_scratch_write_disable10_b01;
+/* 0xa74 */	u32 pmc_scratch_write_lock_disable_sticky_b01;
+/* 0xa78 */	u32 rsvd_a78[8];
+/* 0xa98 */	u32 pmc_secure_scratch80;
+/* 0xa9c */	u32 pmc_secure_scratch81;
+/* 0xaa0 */	u32 pmc_secure_scratch82;
+/* 0xaa4 */	u32 pmc_secure_scratch83;
+/* 0xaa8 */	u32 pmc_secure_scratch84;
+/* 0xaac */	u32 pmc_secure_scratch85;
+/* 0xab0 */	u32 pmc_secure_scratch86;
+/* 0xab4 */	u32 pmc_secure_scratch87;
+/* 0xab8 */	u32 pmc_secure_scratch88;
+/* 0xabc */	u32 pmc_secure_scratch89;
+/* 0xac0 */	u32 pmc_secure_scratch90;
+/* 0xac4 */	u32 pmc_secure_scratch91;
+/* 0xac8 */	u32 pmc_secure_scratch92;
+/* 0xacc */	u32 pmc_secure_scratch93;
+/* 0xad0 */	u32 pmc_secure_scratch94;
+/* 0xad4 */	u32 pmc_secure_scratch95;
+/* 0xad8 */	u32 pmc_secure_scratch96;
+/* 0xadc */	u32 pmc_secure_scratch97;
+/* 0xae0 */	u32 pmc_secure_scratch98;
+/* 0xae4 */	u32 pmc_secure_scratch99;
+/* 0xae8 */	u32 pmc_secure_scratch100;
+/* 0xaec */	u32 pmc_secure_scratch101;
+/* 0xaf0 */	u32 pmc_secure_scratch102;
+/* 0xaf4 */	u32 pmc_secure_scratch103;
+/* 0xaf8 */	u32 pmc_secure_scratch104;
+/* 0xafc */	u32 pmc_secure_scratch105;
+/* 0xb00 */	u32 pmc_secure_scratch106;
+/* 0xb04 */	u32 pmc_secure_scratch107;
+/* 0xb08 */	u32 pmc_secure_scratch108;
+/* 0xb0c */	u32 pmc_secure_scratch109;
+/* 0xb10 */	u32 pmc_secure_scratch110;
+/* 0xb14 */	u32 pmc_secure_scratch111;
+/* 0xb18 */	u32 pmc_secure_scratch112;
+/* 0xb1c */	u32 pmc_secure_scratch113;
+/* 0xb20 */	u32 pmc_secure_scratch114;
+/* 0xb24 */	u32 pmc_secure_scratch115;
+/* 0xb28 */	u32 pmc_secure_scratch116;
+/* 0xb2c */	u32 pmc_secure_scratch117;
+/* 0xb30 */	u32 pmc_secure_scratch118;
+/* 0xb34 */	u32 pmc_secure_scratch119;
+/* 0xb38 */	u32 pmc_secure_scratch120_b01;
+/* 0xb3c */	u32 pmc_secure_scratch121_b01;
+/* 0xb40 */	u32 pmc_secure_scratch122_b01;
+/* 0xb44 */	u32 pmc_secure_scratch123_b01;
+/* 0xb48 */	u32 pmc_led_breathing_ctrl_b01;
+/* 0xb4c */	u32 pmc_led_breathing_counter0_b01; // Slope Steps.
+/* 0xb50 */	u32 pmc_led_breathing_counter1_b01; // ON counter.
+/* 0xb54 */	u32 pmc_led_breathing_counter2_b01; // OFF counter1.
+/* 0xb58 */	u32 pmc_led_breathing_counter3_b01; // OFF counter0.
+/* 0xb5c */	u32 pmc_led_breathing_status_b01;
+/* 0xb60 */	u32 rsvd_b60[2];
+/* 0xb68 */	u32 pmc_secure_scratch124_b01;
+/* 0xb6c */	u32 pmc_secure_scratch125_b01;
+/* 0xb70 */	u32 pmc_secure_scratch126_b01;
+/* 0xb74 */	u32 pmc_secure_scratch127_b01;
+/* 0xb78 */	u32 pmc_secure_scratch128_b01;
+/* 0xb7c */	u32 pmc_secure_scratch129_b01;
+/* 0xb80 */	u32 pmc_secure_scratch130_b01;
+/* 0xb84 */	u32 pmc_secure_scratch131_b01;
+/* 0xb88 */	u32 pmc_secure_scratch132_b01;
+/* 0xb8c */	u32 pmc_secure_scratch133_b01;
+/* 0xb90 */	u32 pmc_secure_scratch134_b01;
+/* 0xb94 */	u32 pmc_secure_scratch135_b01;
+/* 0xb98 */	u32 pmc_secure_scratch136_b01;
+/* 0xb9c */	u32 pmc_secure_scratch137_b01;
+/* 0xba0 */	u32 pmc_secure_scratch138_b01;
+/* 0xba4 */	u32 pmc_secure_scratch139_b01;
+/* 0xba8 */	u32 rsvd_ba8[2];
+/* 0xbb0 */	u32 pmc_sec_disable_ns_b01;
+/* 0xbb4 */	u32 pmc_sec_disable2_ns_b01;
+/* 0xbb8 */	u32 pmc_sec_disable3_ns_b01;
+/* 0xbbc */	u32 pmc_sec_disable4_ns_b01;
+/* 0xbc0 */	u32 pmc_sec_disable5_ns_b01;
+/* 0xbc4 */	u32 pmc_sec_disable6_ns_b01;
+/* 0xbc8 */	u32 pmc_sec_disable7_ns_b01;
+/* 0xbcc */	u32 pmc_sec_disable8_ns_b01;
+/* 0xbd0 */	u32 pmc_sec_disable9_ns_b01;
+/* 0xbd4 */	u32 pmc_sec_disable10_ns_b01;
+/* 0xbd8 */	u32 rsvd_bd8[4];
+/* 0xbe8 */	u32 pmc_tzram_pwr_cntrl_b01;
+/* 0xbec */	u32 pmc_tzram_sec_disable_b01;
+/* 0xbf0 */	u32 pmc_tzram_non_sec_disable_b01;
+} pmc_regs_t210_t;
+
+#endif	/* _PMC_T210_H_ */
diff --git a/modules/hekate_libsys_lp0/sdram_lp0_param_t210.h b/modules/hekate_libsys_lp0/sdram_lp0_param_t210.h
index fc4688a5..2af48ffc 100644
--- a/modules/hekate_libsys_lp0/sdram_lp0_param_t210.h
+++ b/modules/hekate_libsys_lp0/sdram_lp0_param_t210.h
@@ -57,7 +57,7 @@ enum
 /**
  * Defines the SDRAM parameter structure
  */
-struct sdram_params_t210
+typedef struct _sdram_params_t210_t
 {
 
 	/* Specifies the type of memory device */
@@ -959,6 +959,6 @@ struct sdram_params_t210
 	u32 McMtsCarveoutRegCtrl;
 
 	/* End */
-};
+} sdram_params_t210_t;
 
 #endif /* __SOC_NVIDIA_TEGRA210_SDRAM_PARAM_H__ */
diff --git a/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h b/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h
index 924c766d..59a63901 100644
--- a/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h
+++ b/modules/hekate_libsys_lp0/sdram_lp0_param_t210b01.h
@@ -16,7 +16,7 @@
 
 #include "types.h"
 
-struct sdram_params_t210b01
+typedef struct _sdram_params_t210b01_t
 {
 	/* Specifies the type of memory device */
 	u32 memory_type;
@@ -986,6 +986,6 @@ struct sdram_params_t210b01
 
 	/* Just a place holder for special usage when there is no BCT for certain registers */
 	u32 bct_na;
-};
+} sdram_params_t210b01_t;
 
 #endif
diff --git a/modules/hekate_libsys_lp0/sys_sdramlp0.c b/modules/hekate_libsys_lp0/sys_sdramlp0.c
index ddc09800..12f9e33e 100644
--- a/modules/hekate_libsys_lp0/sys_sdramlp0.c
+++ b/modules/hekate_libsys_lp0/sys_sdramlp0.c
@@ -2,7 +2,7 @@
  * Copyright (c) 2013, NVIDIA CORPORATION.  All rights reserved.
  * Copyright 2014 Google Inc.
  * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2020 CTCaer
+ * Copyright (c) 2018-2026 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -15,114 +15,39 @@
  */
 
 #include "t210.h"
-#include "pmc_lp0_t210.h"
+#include "pmc_t210.h"
 #include "sdram_lp0_param_t210.h"
 #include "sdram_lp0_param_t210b01.h"
 #include <module.h>
 
 #define pack(src, src_bits, dst, dst_bits) { \
-	u32 mask = 0xffffffff >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \
+	u32 mask = 0xFFFFFFFF >> (31 - ((1 ? src_bits) - (0 ? src_bits))); \
 	dst &= ~(mask << (0 ? dst_bits)); \
 	dst |= ((src >> (0 ? src_bits)) & mask) << (0 ? dst_bits); \
 }
 
 #define s(param, src_bits, pmcreg, dst_bits) \
-	pack(sdram->param, src_bits, pmc->pmcreg, dst_bits)
+	pack(sdram->param, src_bits, pmc->pmc_ ## pmcreg, dst_bits)
 
 #define c(value, pmcreg, dst_bits) \
-	pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmcreg, dst_bits)
+	pack(value, (1 ? dst_bits) - (0 ? dst_bits) : 0, pmc->pmc_ ## pmcreg, dst_bits)
 
 /* 32 bits version of s macro */
-#define s32(param, pmcreg) pmc->pmcreg = sdram->param
+#define s32(param, pmcreg) pmc->pmc_ ## pmcreg = sdram->param
 
 /* 32 bits version c macro */
-#define c32(value, pmcreg) pmc->pmcreg = value
+#define c32(value, pmcreg) pmc->pmc_ ## pmcreg = value
 
 /*
  * This function reads SDRAM parameters from the common BCT format and
  * writes them into PMC scratch registers (where the BootROM expects them
  * on LP0 resume).
  */
-static void _sdram_lp0_save_params_t210(const void *params)
+static void _sdram_lp0_save_params_t210(sdram_params_t210_t *sdram)
 {
-	struct sdram_params_t210 *sdram = (struct sdram_params_t210 *)params;
-	struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs *)PMC_BASE;
+	pmc_regs_t210_t *pmc = (pmc_regs_t210_t *)PMC_BASE;
 
-	//TODO: pkg1.1 (1.X - 3.X) reads them from MC.
-	// Patch carveout parameters.
-	/*sdram->McGeneralizedCarveout1Bom = 0;
-	sdram->McGeneralizedCarveout1BomHi = 0;
-	sdram->McGeneralizedCarveout1Size128kb = 0;
-	sdram->McGeneralizedCarveout1Access0 = 0;
-	sdram->McGeneralizedCarveout1Access1 = 0;
-	sdram->McGeneralizedCarveout1Access2 = 0;
-	sdram->McGeneralizedCarveout1Access3 = 0;
-	sdram->McGeneralizedCarveout1Access4 = 0;
-	sdram->McGeneralizedCarveout1ForceInternalAccess0 = 0;
-	sdram->McGeneralizedCarveout1ForceInternalAccess1 = 0;
-	sdram->McGeneralizedCarveout1ForceInternalAccess2 = 0;
-	sdram->McGeneralizedCarveout1ForceInternalAccess3 = 0;
-	sdram->McGeneralizedCarveout1ForceInternalAccess4 = 0;
-	sdram->McGeneralizedCarveout1Cfg0 = 0;
-	sdram->McGeneralizedCarveout2Bom = 0x80020000;
-	sdram->McGeneralizedCarveout2BomHi = 0;
-	sdram->McGeneralizedCarveout2Size128kb = 2;
-	sdram->McGeneralizedCarveout2Access0 = 0;
-	sdram->McGeneralizedCarveout2Access1 = 0;
-	sdram->McGeneralizedCarveout2Access2 = 0x3000000;
-	sdram->McGeneralizedCarveout2Access3 = 0;
-	sdram->McGeneralizedCarveout2Access4 = 0x300;
-	sdram->McGeneralizedCarveout2ForceInternalAccess0 = 0;
-	sdram->McGeneralizedCarveout2ForceInternalAccess1 = 0;
-	sdram->McGeneralizedCarveout2ForceInternalAccess2 = 0;
-	sdram->McGeneralizedCarveout2ForceInternalAccess3 = 0;
-	sdram->McGeneralizedCarveout2ForceInternalAccess4 = 0;
-	sdram->McGeneralizedCarveout2Cfg0 = 0x440167E;
-	sdram->McGeneralizedCarveout3Bom = 0;
-	sdram->McGeneralizedCarveout3BomHi = 0;
-	sdram->McGeneralizedCarveout3Size128kb = 0;
-	sdram->McGeneralizedCarveout3Access0 = 0;
-	sdram->McGeneralizedCarveout3Access1 = 0;
-	sdram->McGeneralizedCarveout3Access2 = 0x3000000;
-	sdram->McGeneralizedCarveout3Access3 = 0;
-	sdram->McGeneralizedCarveout3Access4 = 0x300;
-	sdram->McGeneralizedCarveout3ForceInternalAccess0 = 0;
-	sdram->McGeneralizedCarveout3ForceInternalAccess1 = 0;
-	sdram->McGeneralizedCarveout3ForceInternalAccess2 = 0;
-	sdram->McGeneralizedCarveout3ForceInternalAccess3 = 0;
-	sdram->McGeneralizedCarveout3ForceInternalAccess4 = 0;
-	sdram->McGeneralizedCarveout3Cfg0 = 0x4401E7E;
-	sdram->McGeneralizedCarveout4Bom = 0;
-	sdram->McGeneralizedCarveout4BomHi = 0;
-	sdram->McGeneralizedCarveout4Size128kb = 0;
-	sdram->McGeneralizedCarveout4Access0 = 0;
-	sdram->McGeneralizedCarveout4Access1 = 0;
-	sdram->McGeneralizedCarveout4Access2 = 0;
-	sdram->McGeneralizedCarveout4Access3 = 0;
-	sdram->McGeneralizedCarveout4Access4 = 0;
-	sdram->McGeneralizedCarveout4ForceInternalAccess0 = 0;
-	sdram->McGeneralizedCarveout4ForceInternalAccess1 = 0;
-	sdram->McGeneralizedCarveout4ForceInternalAccess2 = 0;
-	sdram->McGeneralizedCarveout4ForceInternalAccess3 = 0;
-	sdram->McGeneralizedCarveout4ForceInternalAccess4 = 0;
-	sdram->McGeneralizedCarveout4Cfg0 = 0x8F;
-	sdram->McGeneralizedCarveout5Bom = 0;
-	sdram->McGeneralizedCarveout5BomHi = 0;
-	sdram->McGeneralizedCarveout5Size128kb = 0;
-	sdram->McGeneralizedCarveout5Access0 = 0;
-	sdram->McGeneralizedCarveout5Access1 = 0;
-	sdram->McGeneralizedCarveout5Access2 = 0;
-	sdram->McGeneralizedCarveout5Access3 = 0;
-	sdram->McGeneralizedCarveout5Access4 = 0;
-	sdram->McGeneralizedCarveout5ForceInternalAccess0 = 0;
-	sdram->McGeneralizedCarveout5ForceInternalAccess1 = 0;
-	sdram->McGeneralizedCarveout5ForceInternalAccess2 = 0;
-	sdram->McGeneralizedCarveout5ForceInternalAccess3 = 0;
-	sdram->McGeneralizedCarveout5ForceInternalAccess4 = 0;
-	sdram->McGeneralizedCarveout5Cfg0 = 0x8F;*/
-
-	//TODO: this is 4.X+ behaviour which seems to work fine for < 4.X.
-	// Patch carveout parameters.
+	// Patch full access to carveout parameters and unprotect their regions.
 	sdram->McGeneralizedCarveout1Cfg0 = 0;
 	sdram->McGeneralizedCarveout2Cfg0 = 0;
 	sdram->McGeneralizedCarveout3Cfg0 = 0;
@@ -130,14 +55,14 @@ static void _sdram_lp0_save_params_t210(const void *params)
 	sdram->McGeneralizedCarveout5Cfg0 = 0;
 
 	// Patch SDRAM parameters.
-	u32 t0 = sdram->EmcSwizzleRank0Byte0 << 5 >> 29 > sdram->EmcSwizzleRank0Byte0 << 1 >> 29;
-	u32 t1 = (t0 & 0xFFFFFFEF) | ((sdram->EmcSwizzleRank1Byte0 << 5 >> 29 > sdram->EmcSwizzleRank1Byte0 << 1 >> 29) << 4);
-	u32 t2 = (t1 & 0xFFFFFFFD) | ((sdram->EmcSwizzleRank0Byte1 << 5 >> 29 > sdram->EmcSwizzleRank0Byte1 << 1 >> 29) << 1);
-	u32 t3 = (t2 & 0xFFFFFFDF) | ((sdram->EmcSwizzleRank1Byte1 << 5 >> 29 > sdram->EmcSwizzleRank1Byte1 << 1 >> 29) << 5);
-	u32 t4 = (t3 & 0xFFFFFFFB) | ((sdram->EmcSwizzleRank0Byte2 << 5 >> 29 > sdram->EmcSwizzleRank0Byte2 << 1 >> 29) << 2);
-	u32 t5 = (t4 & 0xFFFFFFBF) | ((sdram->EmcSwizzleRank1Byte2 << 5 >> 29 > sdram->EmcSwizzleRank1Byte2 << 1 >> 29) << 6);
-	u32 t6 = (t5 & 0xFFFFFFF7) | ((sdram->EmcSwizzleRank0Byte3 << 5 >> 29 > sdram->EmcSwizzleRank0Byte3 << 1 >> 29) << 3);
-	u32 t7 = (t6 & 0xFFFFFF7F) | ((sdram->EmcSwizzleRank1Byte3 << 5 >> 29 > sdram->EmcSwizzleRank1Byte3 << 1 >> 29) << 7);
+	u32 t0 = (sdram->EmcSwizzleRank0Byte0 << 5 >> 29) > (sdram->EmcSwizzleRank0Byte0 << 1 >> 29);
+	u32 t1 = (t0 & 0xFFFFFFEF) | (((sdram->EmcSwizzleRank1Byte0 << 5 >> 29) > (sdram->EmcSwizzleRank1Byte0 << 1 >> 29)) << 4);
+	u32 t2 = (t1 & 0xFFFFFFFD) | (((sdram->EmcSwizzleRank0Byte1 << 5 >> 29) > (sdram->EmcSwizzleRank0Byte1 << 1 >> 29)) << 1);
+	u32 t3 = (t2 & 0xFFFFFFDF) | (((sdram->EmcSwizzleRank1Byte1 << 5 >> 29) > (sdram->EmcSwizzleRank1Byte1 << 1 >> 29)) << 5);
+	u32 t4 = (t3 & 0xFFFFFFFB) | (((sdram->EmcSwizzleRank0Byte2 << 5 >> 29) > (sdram->EmcSwizzleRank0Byte2 << 1 >> 29)) << 2);
+	u32 t5 = (t4 & 0xFFFFFFBF) | (((sdram->EmcSwizzleRank1Byte2 << 5 >> 29) > (sdram->EmcSwizzleRank1Byte2 << 1 >> 29)) << 6);
+	u32 t6 = (t5 & 0xFFFFFFF7) | (((sdram->EmcSwizzleRank0Byte3 << 5 >> 29) > (sdram->EmcSwizzleRank0Byte3 << 1 >> 29)) << 3);
+	u32 t7 = (t6 & 0xFFFFFF7F) | (((sdram->EmcSwizzleRank1Byte3 << 5 >> 29) > (sdram->EmcSwizzleRank1Byte3 << 1 >> 29)) << 7);
 	sdram->SwizzleRankByteEncode = t7;
 	sdram->EmcBctSpare2 = 0x40000DD8;
 	sdram->EmcBctSpare3 = t7;
@@ -839,80 +764,49 @@ static void _sdram_lp0_save_params_t210(const void *params)
 	s(EmcAutoCalWait, 9:0, scratch101, 31:22);
 	s(SwizzleRankByteEncode, 15:0, scratch190, 15:0);
 
-	switch (sdram->MemoryType)
-	{
-	case NvBootMemoryType_LpDdr2:
-	case NvBootMemoryType_LpDdr4:
-		s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0);
-		s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8);
-		s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16);
-		s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24);
-		s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0);
-		s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2);
-		s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4);
-		s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6);
-		s(EmcMrw6, 27:0, scratch8, 27:0);
-		s(EmcMrw6, 31:30, scratch8, 29:28);
-		s(EmcMrw8, 27:0, scratch9, 27:0);
-		s(EmcMrw8, 31:30, scratch9, 29:28);
-		s(EmcMrw9, 27:0, scratch10, 27:0);
-		s(EmcMrw9, 31:30, scratch10, 29:28);
-		s(EmcMrw10, 27:0, scratch11, 27:0);
-		s(EmcMrw10, 31:30, scratch11, 29:28);
-		s(EmcMrw12, 27:0, scratch12, 27:0);
-		s(EmcMrw12, 31:30, scratch12, 29:28);
-		s(EmcMrw13, 27:0, scratch13, 27:0);
-		s(EmcMrw13, 31:30, scratch13, 29:28);
-		s(EmcMrw14, 27:0, scratch14, 27:0);
-		s(EmcMrw14, 31:30, scratch14, 29:28);
-		s(EmcMrw1, 7:0, scratch15, 7:0);
-		s(EmcMrw1, 23:16, scratch15, 15:8);
-		s(EmcMrw1, 27:26, scratch15, 17:16);
-		s(EmcMrw1, 31:30, scratch15, 19:18);
-		s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0);
-		s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8);
-		s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16);
-		s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18);
-		s(EmcMrw2, 7:0, scratch17, 7:0);
-		s(EmcMrw2, 23:16, scratch17, 15:8);
-		s(EmcMrw2, 27:26, scratch17, 17:16);
-		s(EmcMrw2, 31:30, scratch17, 19:18);
-		s(EmcMrw3, 7:0, scratch18, 7:0);
-		s(EmcMrw3, 23:16, scratch18, 15:8);
-		s(EmcMrw3, 27:26, scratch18, 17:16);
-		s(EmcMrw3, 31:30, scratch18, 19:18);
-		s(EmcMrw4, 7:0, scratch19, 7:0);
-		s(EmcMrw4, 23:16, scratch19, 15:8);
-		s(EmcMrw4, 27:26, scratch19, 17:16);
-		s(EmcMrw4, 31:30, scratch19, 19:18);
-		break;
-	case NvBootMemoryType_Ddr3:
-		s(EmcMrs, 13:0, scratch5, 13:0);
-		s(EmcEmrs, 13:0, scratch5, 27:14);
-		s(EmcMrs, 21:20, scratch5, 29:28);
-		s(EmcMrs, 31:30, scratch5, 31:30);
-		s(EmcEmrs2, 13:0, scratch8, 13:0);
-		s(EmcEmrs3, 13:0, scratch8, 27:14);
-		s(EmcEmrs, 21:20, scratch8, 29:28);
-		s(EmcWarmBootMrsExtra, 13:0, scratch9, 13:0);
-		s(EmcEmrs, 31:30, scratch9, 15:14);
-		s(EmcEmrs2, 21:20, scratch9, 17:16);
-		s(EmcEmrs2, 31:30, scratch9, 19:18);
-		s(EmcEmrs3, 21:20, scratch9, 21:20);
-		s(EmcEmrs3, 31:30, scratch9, 23:22);
-		s(EmcWarmBootMrsExtra, 31:30, scratch9, 25:24);
-		s(EmcWarmBootMrsExtra, 21:20, scratch9, 27:26);
-		s(EmcZqCalDdr3WarmBoot, 31:30, scratch9, 29:28);
-		s(EmcMrs, 27:26, scratch10, 1:0);
-		s(EmcEmrs, 27:26, scratch10, 3:2);
-		s(EmcEmrs2, 27:26, scratch10, 5:4);
-		s(EmcEmrs3, 27:26, scratch10, 7:6);
-		s(EmcWarmBootMrsExtra, 27:27, scratch10, 8:8);
-		s(EmcWarmBootMrsExtra, 26:26, scratch10, 9:9);
-		s(EmcZqCalDdr3WarmBoot, 0:0, scratch10, 10:10);
-		s(EmcZqCalDdr3WarmBoot, 4:4, scratch10, 11:11);
-		break;
-	}
+	// LPDDR4 MRW.
+	s(EmcMrwLpddr2ZcalWarmBoot, 23:16, scratch5, 7:0);
+	s(EmcMrwLpddr2ZcalWarmBoot, 7:0, scratch5, 15:8);
+	s(EmcWarmBootMrwExtra, 23:16, scratch5, 23:16);
+	s(EmcWarmBootMrwExtra, 7:0, scratch5, 31:24);
+	s(EmcMrwLpddr2ZcalWarmBoot, 31:30, scratch6, 1:0);
+	s(EmcWarmBootMrwExtra, 31:30, scratch6, 3:2);
+	s(EmcMrwLpddr2ZcalWarmBoot, 27:26, scratch6, 5:4);
+	s(EmcWarmBootMrwExtra, 27:26, scratch6, 7:6);
+	s(EmcMrw6, 27:0, scratch8, 27:0);
+	s(EmcMrw6, 31:30, scratch8, 29:28);
+	s(EmcMrw8, 27:0, scratch9, 27:0);
+	s(EmcMrw8, 31:30, scratch9, 29:28);
+	s(EmcMrw9, 27:0, scratch10, 27:0);
+	s(EmcMrw9, 31:30, scratch10, 29:28);
+	s(EmcMrw10, 27:0, scratch11, 27:0);
+	s(EmcMrw10, 31:30, scratch11, 29:28);
+	s(EmcMrw12, 27:0, scratch12, 27:0);
+	s(EmcMrw12, 31:30, scratch12, 29:28);
+	s(EmcMrw13, 27:0, scratch13, 27:0);
+	s(EmcMrw13, 31:30, scratch13, 29:28);
+	s(EmcMrw14, 27:0, scratch14, 27:0);
+	s(EmcMrw14, 31:30, scratch14, 29:28);
+	s(EmcMrw1, 7:0, scratch15, 7:0);
+	s(EmcMrw1, 23:16, scratch15, 15:8);
+	s(EmcMrw1, 27:26, scratch15, 17:16);
+	s(EmcMrw1, 31:30, scratch15, 19:18);
+	s(EmcWarmBootMrwExtra, 7:0, scratch16, 7:0);
+	s(EmcWarmBootMrwExtra, 23:16, scratch16, 15:8);
+	s(EmcWarmBootMrwExtra, 27:26, scratch16, 17:16);
+	s(EmcWarmBootMrwExtra, 31:30, scratch16, 19:18);
+	s(EmcMrw2, 7:0, scratch17, 7:0);
+	s(EmcMrw2, 23:16, scratch17, 15:8);
+	s(EmcMrw2, 27:26, scratch17, 17:16);
+	s(EmcMrw2, 31:30, scratch17, 19:18);
+	s(EmcMrw3, 7:0, scratch18, 7:0);
+	s(EmcMrw3, 23:16, scratch18, 15:8);
+	s(EmcMrw3, 27:26, scratch18, 17:16);
+	s(EmcMrw3, 31:30, scratch18, 19:18);
+	s(EmcMrw4, 7:0, scratch19, 7:0);
+	s(EmcMrw4, 23:16, scratch19, 15:8);
+	s(EmcMrw4, 27:26, scratch19, 17:16);
+	s(EmcMrw4, 31:30, scratch19, 19:18);
 
 	s32(EmcCmdMappingByte, secure_scratch8);
 	s32(EmcPmacroBrickMapping0, secure_scratch9);
@@ -1103,6 +997,7 @@ static void _sdram_lp0_save_params_t210(const void *params)
 	s32(McGeneralizedCarveout5ForceInternalAccess2, secure_scratch106);
 	s32(McGeneralizedCarveout5ForceInternalAccess3, secure_scratch107);
 
+	// PLLM.
 	c32(0, scratch2);
 	s(PllMInputDivider, 7:0, scratch2, 7:0);
 	s(PllMFeedbackDivider, 7:0, scratch2, 15:8);
@@ -1113,30 +1008,33 @@ static void _sdram_lp0_save_params_t210(const void *params)
 	c32(0, scratch35);
 	s(PllMSetupControl, 15:0, scratch35, 15:0);
 
+	// PLLX.
 	c32(0, scratch3);
 	s(PllMInputDivider, 7:0, scratch3, 7:0);
-	c(0x3E, scratch3, 15:8);
-	c(0, scratch3, 20:16);
+	c(62, scratch3, 15:8); // 62 divn.
+	c(0, scratch3, 20:16); // 0  divp.
 	s(PllMKVCO, 0:0, scratch3, 21:21);
 	s(PllMKCP, 1:0, scratch3, 23:22);
 
 	c32(0, scratch36);
 	s(PllMSetupControl, 23:0, scratch36, 23:0);
 
+	// PLLM/PLLX.
 	c32(0, scratch4);
 	s(PllMStableTime, 9:0, scratch4, 9:0);
 	s(PllMStableTime, 9:0, scratch4, 19:10);
 }
 
-#pragma GCC diagnostic ignored "-Wparentheses"
-
-static void _sdram_lp0_save_params_t210b01(const void *params)
+/*
+ * This function reads SDRAM parameters from the common BCT format and
+ * writes them into PMC scratch registers (where the BootROM expects them
+ * on LP0 resume).
+ */
+static void _sdram_lp0_save_params_t210b01(sdram_params_t210b01_t *sdram)
 {
-	struct sdram_params_t210b01 *sdram = (struct sdram_params_t210b01 *)params;
-	struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs *)PMC_BASE;
-
-	u32 tmp = 0;
+	pmc_regs_t210_t *pmc = (pmc_regs_t210_t *)PMC_BASE;
 
+	// Patch full access to carveout parameters and unprotect their regions.
 	sdram->mc_generalized_carveout1_cfg0 = 0;
 	sdram->mc_generalized_carveout2_cfg0 = 0;
 	sdram->mc_generalized_carveout3_cfg0 = 0;
@@ -1144,201 +1042,756 @@ static void _sdram_lp0_save_params_t210b01(const void *params)
 	sdram->mc_generalized_carveout5_cfg0 = 0;
 
 	// Patch SDRAM parameters.
-	u32 t0 = 32 * sdram->emc_swizzle_rank0_byte0 >> 29 > 2 * sdram->emc_swizzle_rank0_byte0 >> 29;
-	u32 t1 = t0 & 0xFFFFFFEF | 16 * (32 * sdram->emc_swizzle_rank1_byte0 >> 29 > 2 * sdram->emc_swizzle_rank1_byte0 >> 29);
-	u32 t2 = t1 & 0xFFFFFFFD | 2 * (32 * sdram->emc_swizzle_rank0_byte1 >> 29 > 2 * sdram->emc_swizzle_rank0_byte1 >> 29);
-	u32 t3 = t2 & 0xFFFFFFDF | 32 * (32 * sdram->emc_swizzle_rank1_byte1 >> 29 > 2 * sdram->emc_swizzle_rank1_byte1 >> 29);
-	u32 t4 = t3 & 0xFFFFFFFB | 4 * (32 * sdram->emc_swizzle_rank0_byte2 >> 29 > 2 * sdram->emc_swizzle_rank0_byte2 >> 29);
-	u32 t5 = t4 & 0xFFFFFFBF | ((32 * sdram->emc_swizzle_rank1_byte2 >> 29 > 2 * sdram->emc_swizzle_rank1_byte2 >> 29) << 6);
-	u32 t6 = t5 & 0xFFFFFFF7 | 8 * (32 * sdram->emc_swizzle_rank0_byte3 >> 29 > 2 * sdram->emc_swizzle_rank0_byte3 >> 29);
-	u32 t7 = t6 & 0xFFFFFF7F | ((32 * sdram->emc_swizzle_rank1_byte3 >> 29 > 2 * sdram->emc_swizzle_rank1_byte3 >> 29) << 7);
+	u32 t0 = (sdram->emc_swizzle_rank0_byte0 << 5 >> 29) > (sdram->emc_swizzle_rank0_byte0 << 1 >> 29);
+	u32 t1 = (t0 & 0xFFFFFFEF) | (((sdram->emc_swizzle_rank1_byte0 << 5 >> 29) > (sdram->emc_swizzle_rank1_byte0 << 1 >> 29)) << 4);
+	u32 t2 = (t1 & 0xFFFFFFFD) | (((sdram->emc_swizzle_rank0_byte1 << 5 >> 29) > (sdram->emc_swizzle_rank0_byte1 << 1 >> 29)) << 1);
+	u32 t3 = (t2 & 0xFFFFFFDF) | (((sdram->emc_swizzle_rank1_byte1 << 5 >> 29) > (sdram->emc_swizzle_rank1_byte1 << 1 >> 29)) << 5);
+	u32 t4 = (t3 & 0xFFFFFFFB) | (((sdram->emc_swizzle_rank0_byte2 << 5 >> 29) > (sdram->emc_swizzle_rank0_byte2 << 1 >> 29)) << 2);
+	u32 t5 = (t4 & 0xFFFFFFBF) | (((sdram->emc_swizzle_rank1_byte2 << 5 >> 29) > (sdram->emc_swizzle_rank1_byte2 << 1 >> 29)) << 6);
+	u32 t6 = (t5 & 0xFFFFFFF7) | (((sdram->emc_swizzle_rank0_byte3 << 5 >> 29) > (sdram->emc_swizzle_rank0_byte3 << 1 >> 29)) << 3);
+	u32 t7 = (t6 & 0xFFFFFF7F) | (((sdram->emc_swizzle_rank1_byte3 << 5 >> 29) > (sdram->emc_swizzle_rank1_byte3 << 1 >> 29)) << 7);
 	sdram->swizzle_rank_byte_encode = t7;
 	sdram->emc_bct_spare2 = 0x40000DD8;
 	sdram->emc_bct_spare3 = t7;
 
-	pmc->scratch6 = (sdram->emc_clock_source_dll << 20 >> 30 << 30) | (4 * ((sdram->emc_clock_source_dll >> 29 << 27) | ((sdram->emc_clock_source >> 29 << 24) | ((sdram->emc_clock_source_dll << 16) & 0xFFFFFF | ((sdram->emc_clock_source << 8) & 0xFFFF | pmc->scratch6 & 0xFFFF00FF) & 0xFF00FFFF) & 0xF8FFFFFF) & 0xC7FFFFFF) >> 2);
-	pmc->scratch7 = (sdram->emc_rc << 24) | ((sdram->emc_zqcal_lpddr4_warm_boot << 27 >> 31 << 23) | ((sdram->emc_zqcal_lpddr4_warm_boot << 30 >> 31 << 22) | ((sdram->emc_zqcal_lpddr4_warm_boot << 21) & 0x3FFFFF | ((sdram->clk_rst_pllm_misc20_override << 20) & 0x1FFFFF | ((sdram->clk_rst_pllm_misc20_override << 28 >> 31 << 19) | ((sdram->clk_rst_pllm_misc20_override << 27 >> 31 << 18) | ((sdram->clk_rst_pllm_misc20_override << 26 >> 31 << 17) | ((sdram->clk_rst_pllm_misc20_override << 21 >> 31 << 16) | ((sdram->clk_rst_pllm_misc20_override << 20 >> 31 << 15) | ((sdram->clk_rst_pllm_misc20_override << 19 >> 31 << 14) | ((sdram->clk_rst_pllm_misc20_override << 18 >> 31 << 13) | ((sdram->emc_clock_source << 15 >> 31 << 12) | ((sdram->emc_clock_source << 11 >> 31 << 11) | ((sdram->emc_clock_source << 12 >> 31 << 10) | ((sdram->emc_clock_source << 6 >> 31 << 9) | ((sdram->emc_clock_source << 16 >> 31 << 8) | ((32 * sdram->emc_clock_source >> 31 << 7) | ((16 * sdram->emc_clock_source >> 31 << 6) | (16 * (sdram->emc_zqcal_lpddr4_warm_boot >> 30) | (4 * (sdram->clk_rst_pllm_misc20_override << 29 >> 30) | ((sdram->clk_rst_pllm_misc20_override << 22 >> 30) | 4 * (pmc->scratch7 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFFFFFF;
-	pmc->scratch8 = (sdram->emc_pmacro_bg_bias_ctrl0 << 18 >> 30 << 30) | ((4 * pmc->scratch8) >> 2);
-	pmc->scratch14 = ((u8)(sdram->emc_cfg_pipe_clk) << 31) | (2 * (((u8)(sdram->emc_fdpd_ctrl_cmd_no_ramp) << 30) | pmc->scratch14 & 0xBFFFFFFF) >> 1);
-	pmc->scratch15 = (sdram->emc_qrst << 11 >> 27 << 27) | ((sdram->emc_qrst << 20) | pmc->scratch15 & 0xF80FFFFF) & 0x7FFFFFF;
-	pmc->scratch16 = ((u16)(sdram->emc_pmacro_cmd_tx_drive) << 18 >> 26 << 26) | (((u16)(sdram->emc_pmacro_cmd_tx_drive) << 20) | pmc->scratch16 & 0xFC0FFFFF) & 0x3FFFFFF;
-	pmc->scratch17 = (16 * sdram->emc_fbio_cfg8 >> 31 << 31) | (2 * ((32 * sdram->emc_fbio_cfg8 >> 31 << 30) | ((sdram->emc_fbio_cfg8 << 6 >> 31 << 29) | ((sdram->emc_fbio_cfg8 << 7 >> 31 << 28) | ((sdram->emc_fbio_cfg8 << 8 >> 31 << 27) | ((sdram->emc_fbio_cfg8 << 9 >> 31 << 26) | ((sdram->emc_fbio_cfg8 << 10 >> 31 << 25) | ((sdram->emc_fbio_cfg8 << 11 >> 31 << 24) | ((sdram->emc_fbio_cfg8 << 12 >> 31 << 23) | ((sdram->emc_fbio_cfg8 << 13 >> 31 << 22) | ((sdram->emc_fbio_cfg8 << 14 >> 31 << 21) | ((sdram->emc_fbio_cfg8 << 15 >> 31 << 20) | pmc->scratch17 & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch18 = ((u16)(sdram->emc_txsr_dll) << 20) | pmc->scratch18 & 0xFFFFF;
-	pmc->scratch19 = (sdram->emc_txdsrvttgen << 20) | pmc->scratch19 & 0xFFFFF;
-	pmc->scratch22 = (sdram->emc_cfg_rsv >> 24 << 24) | ((sdram->emc_cfg_rsv >> 16 << 16) | ((sdram->emc_cfg_rsv << 16 >> 24 << 8) | (sdram->emc_cfg_rsv & 0xFF | (pmc->scratch22 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFFFFFF;
-	pmc->scratch23 = (sdram->emc_auto_cal_config >> 31 << 31) | (2 * ((2 * sdram->emc_auto_cal_config >> 31 << 30) | ((4 * sdram->emc_auto_cal_config >> 31 << 29) | ((8 * sdram->emc_auto_cal_config >> 28 << 25) | ((sdram->emc_auto_cal_config << 7 >> 31 << 24) | ((sdram->emc_auto_cal_config << 8 >> 27 << 19) | ((sdram->emc_auto_cal_config << 13 >> 29 << 16) | ((sdram->emc_auto_cal_config << 16 >> 27 << 11) | ((sdram->emc_auto_cal_config << 21 >> 31 << 10) | ((sdram->emc_auto_cal_config << 22 >> 31 << 9) | ((sdram->emc_auto_cal_config << 23 >> 31 << 8) | ((sdram->emc_auto_cal_config << 24 >> 31 << 7) | ((sdram->emc_auto_cal_config << 25 >> 31 << 6) | (32 * (sdram->emc_auto_cal_config << 26 >> 31) | (16 * (sdram->emc_auto_cal_config << 27 >> 31) | (8 * (sdram->emc_auto_cal_config << 28 >> 31) | (4 * (sdram->emc_auto_cal_config << 29 >> 31) | (2 * (sdram->emc_auto_cal_config << 30 >> 31) | (sdram->emc_auto_cal_config & 1 | 2 * (pmc->scratch23 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFF07FF) & 0xFFF8FFFF) & 0xFF07FFFF) & 0xFEFFFFFF) & 0xE1FFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch24 = (sdram->emc_auto_cal_vref_sel0 >> 31 << 31) | (2 * ((2 * sdram->emc_auto_cal_vref_sel0 >> 25 << 24) | ((sdram->emc_auto_cal_vref_sel0 << 8 >> 31 << 23) | ((sdram->emc_auto_cal_vref_sel0 << 9 >> 25 << 16) | ((sdram->emc_auto_cal_vref_sel0 << 16 >> 31 << 15) | ((sdram->emc_auto_cal_vref_sel0 << 17 >> 25 << 8) | ((sdram->emc_auto_cal_vref_sel0 << 24 >> 31 << 7) | (sdram->emc_auto_cal_vref_sel0 & 0x7F | (pmc->scratch24 >> 7 << 7)) & 0xFFFFFF7F) & 0xFFFF80FF) & 0xFFFF7FFF) & 0xFF80FFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch25 = (sdram->emc_pmacro_brick_ctrl_rfu1 >> 16 << 16) | sdram->emc_pmacro_brick_ctrl_rfu1 & 0xFFFF;
-	pmc->scratch26 = (sdram->emc_pmacro_brick_ctrl_rfu2 >> 16 << 16) | sdram->emc_pmacro_brick_ctrl_rfu2 & 0xFFFF;
+	s(emc_clock_source, 7:0, scratch6, 15:8);
+	s(emc_clock_source_dll, 7:0, scratch6, 23:16);
+	s(emc_clock_source, 31:29, scratch6, 26:24);
+	s(emc_clock_source_dll, 31:29, scratch6, 29:27);
+	s(emc_clock_source_dll, 11:10, scratch6, 31:30);
+	s(clk_rst_pllm_misc20_override, 9:8, scratch7, 1:0);
+	s(clk_rst_pllm_misc20_override, 2:1, scratch7, 3:2);
+	s(emc_zqcal_lpddr4_warm_boot, 31:30, scratch7, 5:4);
+	s(emc_clock_source, 27:27, scratch7, 6:6);
+	s(emc_clock_source, 26:26, scratch7, 7:7);
+	s(emc_clock_source, 15:15, scratch7, 8:8);
+	s(emc_clock_source, 25:25, scratch7, 9:9);
+	s(emc_clock_source, 20:19, scratch7, 11:10);
+	s(emc_clock_source, 16:16, scratch7, 12:12);
+	s(clk_rst_pllm_misc20_override, 13:13, scratch7, 13:13);
+	s(clk_rst_pllm_misc20_override, 12:12, scratch7, 14:14);
+	s(clk_rst_pllm_misc20_override, 11:11, scratch7, 15:15);
+	s(clk_rst_pllm_misc20_override, 10:10, scratch7, 16:16);
+	s(clk_rst_pllm_misc20_override, 5:5, scratch7, 17:17);
+	s(clk_rst_pllm_misc20_override, 4:4, scratch7, 18:18);
+	s(clk_rst_pllm_misc20_override, 3:3, scratch7, 19:19);
+	s(clk_rst_pllm_misc20_override, 0:0, scratch7, 20:20);
+	s(emc_zqcal_lpddr4_warm_boot, 1:0, scratch7, 22:21);
+	s(emc_zqcal_lpddr4_warm_boot, 4:4, scratch7, 23:23);
+	s(emc_rc, 7:0, scratch7, 31:24);
+	s(emc_pmacro_bg_bias_ctrl0, 13:12, scratch8, 31:30);
+	s(emc_fdpd_ctrl_cmd_no_ramp, 0:0, scratch14, 30:30);
+	s(emc_cfg_pipe_clk, 0:0, scratch14, 31:31);
+	s(emc_qrst, 6:0, scratch15, 26:20);
+	s(emc_qrst, 20:16, scratch15, 31:27);
+	s(emc_pmacro_cmd_tx_drive, 5:0, scratch16, 25:20);
+	s(emc_pmacro_cmd_tx_drive, 13:8, scratch16, 31:26);
+	s(emc_fbio_cfg8, 27:16, scratch17, 31:20);
+	s(emc_txsr_dll, 11:0, scratch18, 31:20);
+	s(emc_txdsrvttgen, 11:0, scratch19, 31:20);
+	s32(emc_cfg_rsv, scratch22);
+	s32(emc_auto_cal_config, scratch23);
+	s32(emc_auto_cal_vref_sel0, scratch24);
+	s32(emc_pmacro_brick_ctrl_rfu1, scratch25);
+	s32(emc_pmacro_brick_ctrl_rfu2, scratch26);
 	s32(emc_pmc_scratch1, scratch27);
 	s32(emc_pmc_scratch2, scratch28);
 	s32(emc_pmc_scratch3, scratch29);
-	pmc->scratch30 = (sdram->emc_pmacro_perbit_rfu_ctrl0 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl0 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl0 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl0 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl0 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl0 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl0 & 3 | 4 * (pmc->scratch30 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch31 = (sdram->emc_pmacro_perbit_rfu_ctrl1 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl1 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl1 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl1 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl1 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl1 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl1 & 3 | 4 * (pmc->scratch31 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch32 = (sdram->emc_pmacro_perbit_rfu_ctrl2 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl2 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl2 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl2 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl2 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl2 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl2 & 3 | 4 * (pmc->scratch32 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch33 = (sdram->emc_pmacro_perbit_rfu_ctrl3 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl3 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl3 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl3 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl3 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl3 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl3 & 3 | 4 * (pmc->scratch33 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch40 = (sdram->emc_pmacro_perbit_rfu_ctrl4 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl4 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl4 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl4 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl4 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl4 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl4 & 3 | 4 * (pmc->scratch40 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch42 = (sdram->emc_pmacro_perbit_rfu_ctrl5 >> 30 << 30) | (4 * ((4 * sdram->emc_pmacro_perbit_rfu_ctrl5 >> 30 << 28) | ((16 * sdram->emc_pmacro_perbit_rfu_ctrl5 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 6 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 8 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 10 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 12 >> 30 << 18) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 14 >> 30 << 16) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 16 >> 30 << 14) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 18 >> 30 << 12) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 20 >> 30 << 10) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 22 >> 30 << 8) | ((sdram->emc_pmacro_perbit_rfu_ctrl5 << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_perbit_rfu_ctrl5 << 26 >> 30) | (4 * (sdram->emc_pmacro_perbit_rfu_ctrl5 << 28 >> 30) | (sdram->emc_pmacro_perbit_rfu_ctrl5 & 3 | 4 * (pmc->scratch42 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch44 = (sdram->mc_emem_arb_da_turns >> 24 << 24) | ((sdram->mc_emem_arb_da_turns >> 16 << 16) | ((sdram->mc_emem_arb_da_turns << 16 >> 24 << 8) | (sdram->mc_emem_arb_da_turns & 0xFF | (pmc->scratch44 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFFFFFF;
-	pmc->scratch64 = ((u16)(sdram->mc_emem_arb_misc2) << 31) | (2 * ((sdram->emc_fbio_spare << 30) | ((sdram->emc_fbio_spare << 24 >> 26 << 24) | ((sdram->emc_fbio_spare << 16 >> 24 << 16) | ((sdram->emc_fbio_spare << 8 >> 24 << 8) | ((sdram->emc_fbio_spare >> 24) | (pmc->scratch64 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xC0FFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch65 = ((u16)(sdram->mc_da_cfg0) << 31 >> 1) | ((2 * sdram->mc_emem_arb_misc0 >> 29 << 27) | ((16 * sdram->mc_emem_arb_misc0 >> 31 << 26) | ((32 * sdram->mc_emem_arb_misc0 >> 26 << 20) | ((sdram->mc_emem_arb_misc0 << 11 >> 27 << 15) | ((sdram->mc_emem_arb_misc0 << 17 >> 25 << 8) | ((u8)sdram->mc_emem_arb_misc0 | (pmc->scratch65 >> 8 << 8)) & 0xFFFF80FF) & 0xFFF07FFF) & 0xFC0FFFFF) & 0xFBFFFFFF) & 0xC7FFFFFF) & 0xBFFFFFFF;
-	pmc->scratch66 = (sdram->emc_fdpd_ctrl_cmd >> 30 << 27) | ((4 * sdram->emc_fdpd_ctrl_cmd >> 31 << 26) | ((8 * sdram->emc_fdpd_ctrl_cmd >> 27 << 21) | ((sdram->emc_fdpd_ctrl_cmd << 8 >> 28 << 17) | ((sdram->emc_fdpd_ctrl_cmd << 15 >> 27 << 12) | ((sdram->emc_fdpd_ctrl_cmd << 20 >> 28 << 8) | ((u8)sdram->emc_fdpd_ctrl_cmd | (pmc->scratch66 >> 8 << 8)) & 0xFFFFF0FF) & 0xFFFE0FFF) & 0xFFE1FFFF) & 0xFC1FFFFF) & 0xFBFFFFFF) & 0xE7FFFFFF;
-	pmc->scratch67 = ((u8)(sdram->emc_burst_refresh_num) << 28) | ((16 * sdram->emc_auto_cal_config2 >> 30 << 26) | ((sdram->emc_auto_cal_config2 << 6 >> 30 << 24) | ((sdram->emc_auto_cal_config2 << 8 >> 30 << 22) | ((sdram->emc_auto_cal_config2 << 10 >> 30 << 20) | ((sdram->emc_auto_cal_config2 << 12 >> 30 << 18) | ((sdram->emc_auto_cal_config2 << 14 >> 30 << 16) | ((sdram->emc_auto_cal_config2 << 16 >> 30 << 14) | ((sdram->emc_auto_cal_config2 << 18 >> 30 << 12) | ((sdram->emc_auto_cal_config2 << 20 >> 30 << 10) | ((sdram->emc_auto_cal_config2 << 22 >> 30 << 8) | ((sdram->emc_auto_cal_config2 << 24 >> 30 << 6) | (16 * (sdram->emc_auto_cal_config2 << 26 >> 30) | (4 * (sdram->emc_auto_cal_config2 << 28 >> 30) | (sdram->emc_auto_cal_config2 & 3 | 4 * (pmc->scratch67 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xFFFFFFF;
-	pmc->scratch68 = ((u8)(sdram->emc_tppd) << 28) | ((sdram->emc_cfg_dig_dll >> 31 << 27) | ((2 * sdram->emc_cfg_dig_dll >> 31 << 26) | ((16 * sdram->emc_cfg_dig_dll >> 31 << 25) | ((sdram->emc_cfg_dig_dll << 6 >> 22 << 15) | ((sdram->emc_cfg_dig_dll << 16 >> 31 << 14) | ((sdram->emc_cfg_dig_dll << 17 >> 31 << 13) | ((sdram->emc_cfg_dig_dll << 18 >> 30 << 11) | ((sdram->emc_cfg_dig_dll << 21 >> 29 << 8) | ((sdram->emc_cfg_dig_dll << 24 >> 30 << 6) | (32 * (sdram->emc_cfg_dig_dll << 26 >> 31) | (16 * (sdram->emc_cfg_dig_dll << 27 >> 31) | (8 * (sdram->emc_cfg_dig_dll << 28 >> 31) | (4 * (sdram->emc_cfg_dig_dll << 29 >> 31) | (2 * (sdram->emc_cfg_dig_dll << 30 >> 31) | (sdram->emc_cfg_dig_dll & 1 | 2 * (pmc->scratch68 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFF3F) & 0xFFFFF8FF) & 0xFFFFE7FF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFE007FFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xFFFFFFF;
-	pmc->scratch69 = (sdram->emc_r2r << 28) | ((sdram->emc_fdpd_ctrl_dq >> 30 << 26) | ((8 * sdram->emc_fdpd_ctrl_dq >> 27 << 21) | ((sdram->emc_fdpd_ctrl_dq << 8 >> 28 << 17) | ((sdram->emc_fdpd_ctrl_dq << 15 >> 27 << 12) | ((sdram->emc_fdpd_ctrl_dq << 20 >> 28 << 8) | ((u8)sdram->emc_fdpd_ctrl_dq | (pmc->scratch69 >> 8 << 8)) & 0xFFFFF0FF) & 0xFFFE0FFF) & 0xFFE1FFFF) & 0xFC1FFFFF) & 0xF3FFFFFF) & 0xFFFFFFF;
-	pmc->scratch70 = (sdram->emc_w2w << 28) | ((2 * sdram->emc_pmacro_ib_vref_dq_0 >> 25 << 21) | ((sdram->emc_pmacro_ib_vref_dq_0 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ib_vref_dq_0 << 17 >> 25 << 7) | (sdram->emc_pmacro_ib_vref_dq_0 & 0x7F | (pmc->scratch70 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xFFFFFFF;
-	pmc->scratch71 = (sdram->emc_pmacro_vttgen_ctrl0 << 12 >> 28 << 28) | ((2 * sdram->emc_pmacro_ib_vref_dq_1 >> 25 << 21) | ((sdram->emc_pmacro_ib_vref_dq_1 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ib_vref_dq_1 << 17 >> 25 << 7) | ((pmc->scratch71 >> 7 << 7) | sdram->emc_pmacro_ib_vref_dq_1 & 0x7F) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xFFFFFFF;
-	pmc->scratch72 = (((sdram->emc_pmacro_ib_vref_dqs_0 << 17 >> 25 << 7) | ((pmc->scratch72 >> 7 << 7) | sdram->emc_pmacro_ib_vref_dqs_0 & 0x7F) & 0xFFFFC07F) & 0xFFE03FFF | (sdram->emc_pmacro_ib_vref_dqs_0 << 9 >> 25 << 14)) & 0xF01FFFFF | (2 * sdram->emc_pmacro_ib_vref_dqs_0 >> 25 << 21);
-	pmc->scratch73 = (2 * sdram->emc_pmacro_ib_vref_dqs_1 >> 25 << 21) | ((sdram->emc_pmacro_ib_vref_dqs_1 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ib_vref_dqs_1 << 17 >> 25 << 7) | ((pmc->scratch73 >> 7 << 7) | sdram->emc_pmacro_ib_vref_dqs_1 & 0x7F) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF;
-	pmc->scratch74 = (2 * sdram->emc_pmacro_ddll_short_cmd_0 >> 25 << 21) | ((sdram->emc_pmacro_ddll_short_cmd_0 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ddll_short_cmd_0 << 17 >> 25 << 7) | (sdram->emc_pmacro_ddll_short_cmd_0 & 0x7F | (pmc->scratch74 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF;
-	pmc->scratch75 = (2 * sdram->emc_pmacro_ddll_short_cmd_1 >> 25 << 21) | ((sdram->emc_pmacro_ddll_short_cmd_1 << 9 >> 25 << 14) | ((sdram->emc_pmacro_ddll_short_cmd_1 << 17 >> 25 << 7) | (sdram->emc_pmacro_ddll_short_cmd_1 & 0x7F | (pmc->scratch75 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF;
-	pmc->scratch76 = (sdram->emc_rp << 26) | ((4 * sdram->emc_dll_cfg0 >> 31 << 25) | ((8 * sdram->emc_dll_cfg0 >> 31 << 24) | ((16 * sdram->emc_dll_cfg0 >> 28 << 20) | ((sdram->emc_dll_cfg0 << 8 >> 28 << 16) | ((sdram->emc_dll_cfg0 << 12 >> 28 << 12) | ((sdram->emc_dll_cfg0 << 16 >> 28 << 8) | ((sdram->emc_dll_cfg0 << 20 >> 24) | (pmc->scratch76 >> 8 << 8)) & 0xFFFFF0FF) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFF0FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0x3FFFFFF;
-	tmp = (sdram->emc_pmacro_tx_pwrd0 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd0 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd0 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd0 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd0 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd0 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd0 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd0 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd0 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd0 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd0 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd0 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd0 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd0 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd0 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd0 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd0 & 1 | 2 * (pmc->scratch77 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF;
-	pmc->scratch77 = (sdram->emc_r2w << 26) | ((4 * sdram->emc_pmacro_tx_pwrd0 >> 31 << 25) | ((8 * sdram->emc_pmacro_tx_pwrd0 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd0 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd0 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd0 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd0 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd0 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd0 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd0 << 11 >> 31 << 17) | tmp & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0x3FFFFFF;
-	tmp = ((8 * sdram->emc_pmacro_tx_pwrd1 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd1 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd1 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd1 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd1 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd1 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd1 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd1 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd1 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd1 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd1 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd1 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd1 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd1 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd1 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd1 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd1 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd1 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd1 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd1 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd1 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd1 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd1 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd1 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd1 & 1 | 2 * (pmc->scratch78 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF;
-	pmc->scratch78 = (sdram->emc_w2r << 26) | ((4 * sdram->emc_pmacro_tx_pwrd1 >> 31 << 25) | tmp) & 0x3FFFFFF;
-	tmp = ((8 * sdram->emc_pmacro_tx_pwrd2 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd2 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd2 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd2 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd2 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd2 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd2 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd2 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd2 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd2 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd2 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd2 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd2 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd2 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd2 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd2 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd2 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd2 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd2 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd2 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd2 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd2 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd2 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd2 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd2 & 1 | 2 * (pmc->scratch79 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF;
-	pmc->scratch79 = (sdram->emc_r2p << 26) | ((4 * sdram->emc_pmacro_tx_pwrd2 >> 31 << 25) | tmp) & 0x3FFFFFF;
-	tmp = (sdram->emc_pmacro_tx_pwrd3 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd3 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd3 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd3 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd3 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd3 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd3 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd3 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd3 & 1 | 2 * (pmc->scratch80 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF;
-	pmc->scratch80 = ((u8)(sdram->emc_ccdmw) << 26) | ((4 * sdram->emc_pmacro_tx_pwrd3 >> 31 << 25) | ((8 * sdram->emc_pmacro_tx_pwrd3 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd3 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd3 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd3 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd3 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd3 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd3 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd3 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd3 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd3 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd3 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd3 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd3 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd3 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd3 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd3 << 22 >> 31 << 9) | tmp & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0x3FFFFFF;
-	tmp = ((8 * sdram->emc_pmacro_tx_pwrd4 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd4 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd4 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd4 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd4 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd4 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd4 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd4 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd4 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd4 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd4 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd4 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd4 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd4 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd4 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd4 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd4 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd4 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd4 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd4 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd4 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd4 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd4 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd4 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd4 & 1 | 2 * (pmc->scratch81 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF;
-	pmc->scratch81 = ((u8)(sdram->emc_rd_rcd) << 26) | ((4 * sdram->emc_pmacro_tx_pwrd4 >> 31 << 25) | tmp) & 0x3FFFFFF;
-	tmp = ((8 * sdram->emc_pmacro_tx_pwrd5 >> 31 << 24) | ((32 * sdram->emc_pmacro_tx_pwrd5 >> 31 << 23) | ((sdram->emc_pmacro_tx_pwrd5 << 6 >> 31 << 22) | ((sdram->emc_pmacro_tx_pwrd5 << 7 >> 31 << 21) | ((sdram->emc_pmacro_tx_pwrd5 << 8 >> 31 << 20) | ((sdram->emc_pmacro_tx_pwrd5 << 9 >> 31 << 19) | ((sdram->emc_pmacro_tx_pwrd5 << 10 >> 31 << 18) | ((sdram->emc_pmacro_tx_pwrd5 << 11 >> 31 << 17) | ((sdram->emc_pmacro_tx_pwrd5 << 12 >> 31 << 16) | ((sdram->emc_pmacro_tx_pwrd5 << 13 >> 31 << 15) | ((sdram->emc_pmacro_tx_pwrd5 << 14 >> 31 << 14) | ((sdram->emc_pmacro_tx_pwrd5 << 15 >> 31 << 13) | ((sdram->emc_pmacro_tx_pwrd5 << 18 >> 31 << 12) | ((sdram->emc_pmacro_tx_pwrd5 << 19 >> 31 << 11) | ((sdram->emc_pmacro_tx_pwrd5 << 21 >> 31 << 10) | ((sdram->emc_pmacro_tx_pwrd5 << 22 >> 31 << 9) | ((sdram->emc_pmacro_tx_pwrd5 << 23 >> 31 << 8) | ((sdram->emc_pmacro_tx_pwrd5 << 24 >> 31 << 7) | ((sdram->emc_pmacro_tx_pwrd5 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_tx_pwrd5 << 26 >> 31) | (16 * (sdram->emc_pmacro_tx_pwrd5 << 27 >> 31) | (8 * (sdram->emc_pmacro_tx_pwrd5 << 28 >> 31) | (4 * (sdram->emc_pmacro_tx_pwrd5 << 29 >> 31) | (2 * (sdram->emc_pmacro_tx_pwrd5 << 30 >> 31) | (sdram->emc_pmacro_tx_pwrd5 & 1 | 2 * (pmc->scratch82 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF;
-	pmc->scratch82 = ((u16)(sdram->emc_wr_rcd) << 26) | ((4 * sdram->emc_pmacro_tx_pwrd5 >> 31 << 25) | tmp) & 0x3FFFFFF;
-	pmc->scratch83 = ((u8)(sdram->emc_config_sample_delay) << 25) | ((sdram->emc_auto_cal_channel >> 31 << 24) | ((2 * sdram->emc_auto_cal_channel >> 31 << 23) | ((4 * sdram->emc_auto_cal_channel >> 31 << 22) | ((16 * sdram->emc_auto_cal_channel >> 25 << 15) | ((sdram->emc_auto_cal_channel << 11 >> 27 << 10) | ((sdram->emc_auto_cal_channel << 20 >> 28 << 6) | (sdram->emc_auto_cal_channel & 0x3F | (pmc->scratch83 >> 6 << 6)) & 0xFFFFFC3F) & 0xFFFF83FF) & 0xFFC07FFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0x1FFFFFF;
-	pmc->scratch84 = (sdram->emc_sel_dpd_ctrl << 13 >> 29 << 29) | ((sdram->emc_sel_dpd_ctrl << 23 >> 31 << 28) | ((sdram->emc_sel_dpd_ctrl << 26 >> 31 << 27) | ((sdram->emc_sel_dpd_ctrl << 27 >> 31 << 26) | ((sdram->emc_sel_dpd_ctrl << 28 >> 31 << 25) | ((sdram->emc_sel_dpd_ctrl << 29 >> 31 << 24) | ((4 * sdram->emc_pmacro_rx_term >> 26 << 18) | ((sdram->emc_pmacro_rx_term << 10 >> 26 << 12) | ((sdram->emc_pmacro_rx_term << 18 >> 26 << 6) | (sdram->emc_pmacro_rx_term & 0x3F | (pmc->scratch84 >> 6 << 6)) & 0xFFFFF03F) & 0xFFFC0FFF) & 0xFF03FFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF;
-	pmc->scratch85 = (4 * sdram->emc_obdly >> 30 << 30) | (4 * ((sdram->emc_obdly << 24) | ((4 * sdram->emc_pmacro_dq_tx_drive >> 26 << 18) | ((sdram->emc_pmacro_dq_tx_drive << 10 >> 26 << 12) | ((sdram->emc_pmacro_dq_tx_drive << 18 >> 26 << 6) | (sdram->emc_pmacro_dq_tx_drive & 0x3F | (pmc->scratch85 >> 6 << 6)) & 0xFFFFF03F) & 0xFFFC0FFF) & 0xFF03FFFF) & 0xC0FFFFFF) >> 2);
-	pmc->scratch86 = (sdram->emc_pmacro_vttgen_ctrl1 << 10 >> 30 << 30) | (4 * ((sdram->emc_pmacro_vttgen_ctrl1 << 16 >> 26 << 24) | ((4 * sdram->emc_pmacro_ca_tx_drive >> 26 << 18) | ((sdram->emc_pmacro_ca_tx_drive << 10 >> 26 << 12) | ((sdram->emc_pmacro_ca_tx_drive << 18 >> 26 << 6) | (sdram->emc_pmacro_ca_tx_drive & 0x3F | (pmc->scratch86 >> 6 << 6)) & 0xFFFFF03F) & 0xFFFC0FFF) & 0xFF03FFFF) & 0xC0FFFFFF) >> 2);
-	pmc->scratch87 = (sdram->emc_pmacro_vttgen_ctrl2 >> 16 << 24) | ((16 * sdram->emc_pmacro_zcrtl >> 30 << 22) | ((sdram->emc_pmacro_zcrtl << 6 >> 30 << 20) | ((sdram->emc_pmacro_zcrtl << 8 >> 30 << 18) | ((sdram->emc_pmacro_zcrtl << 10 >> 30 << 16) | ((sdram->emc_pmacro_zcrtl << 12 >> 30 << 14) | ((sdram->emc_pmacro_zcrtl << 14 >> 30 << 12) | ((sdram->emc_pmacro_zcrtl << 16 >> 30 << 10) | ((sdram->emc_pmacro_zcrtl << 18 >> 30 << 8) | ((sdram->emc_pmacro_zcrtl << 20 >> 30 << 6) | (16 * (sdram->emc_pmacro_zcrtl << 22 >> 30) | (4 * (sdram->emc_pmacro_zcrtl << 24 >> 30) | ((sdram->emc_pmacro_zcrtl << 26 >> 30) | 4 * (pmc->scratch87 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFFFFFF;
-	pmc->scratch88 = (sdram->mc_emem_arb_timing_rc << 24) | ((sdram->emc_zcal_interval << 14) | ((sdram->emc_zcal_interval << 8 >> 18) | (pmc->scratch88 >> 14 << 14)) & 0xFF003FFF) & 0xFFFFFF;
-	pmc->scratch89 = ((u16)(sdram->mc_emem_arb_rsv) << 24) | ((sdram->emc_data_brlshft0 << 8 >> 29 << 21) | ((sdram->emc_data_brlshft0 << 11 >> 29 << 18) | ((sdram->emc_data_brlshft0 << 14 >> 29 << 15) | ((sdram->emc_data_brlshft0 << 17 >> 29 << 12) | ((sdram->emc_data_brlshft0 << 20 >> 29 << 9) | ((sdram->emc_data_brlshft0 << 23 >> 29 << 6) | (8 * (sdram->emc_data_brlshft0 << 26 >> 29) | (sdram->emc_data_brlshft0 & 7 | 8 * (pmc->scratch89 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0xFFFFFF;
-	pmc->scratch90 = (sdram->emc_data_brlshft1 << 8 >> 29 << 21) | ((sdram->emc_data_brlshft1 << 11 >> 29 << 18) | ((sdram->emc_data_brlshft1 << 14 >> 29 << 15) | ((sdram->emc_data_brlshft1 << 17 >> 29 << 12) | ((sdram->emc_data_brlshft1 << 20 >> 29 << 9) | ((sdram->emc_data_brlshft1 << 23 >> 29 << 6) | (8 * (sdram->emc_data_brlshft1 << 26 >> 29) | (sdram->emc_data_brlshft1 & 7 | 8 * (pmc->scratch90 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF;
-	pmc->scratch91 = (sdram->emc_dqs_brlshft0 << 8 >> 29 << 21) | ((sdram->emc_dqs_brlshft0 << 11 >> 29 << 18) | ((sdram->emc_dqs_brlshft0 << 14 >> 29 << 15) | ((sdram->emc_dqs_brlshft0 << 17 >> 29 << 12) | ((sdram->emc_dqs_brlshft0 << 20 >> 29 << 9) | ((sdram->emc_dqs_brlshft0 << 23 >> 29 << 6) | (8 * (sdram->emc_dqs_brlshft0 << 26 >> 29) | (sdram->emc_dqs_brlshft0 & 7 | 8 * (pmc->scratch91 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF;
-	pmc->scratch92 = (sdram->emc_dqs_brlshft1 << 8 >> 29 << 21) | ((sdram->emc_dqs_brlshft1 << 11 >> 29 << 18) | ((sdram->emc_dqs_brlshft1 << 14 >> 29 << 15) | ((sdram->emc_dqs_brlshft1 << 17 >> 29 << 12) | ((sdram->emc_dqs_brlshft1 << 20 >> 29 << 9) | ((sdram->emc_dqs_brlshft1 << 23 >> 29 << 6) | (8 * (sdram->emc_dqs_brlshft1 << 26 >> 29) | (sdram->emc_dqs_brlshft1 & 7 | 8 * (pmc->scratch92 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF;
-	pmc->scratch93 = (2 * sdram->emc_swizzle_rank0_byte0 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank0_byte0 >> 29 << 18) | ((sdram->emc_swizzle_rank0_byte0 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte0 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte0 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte0 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte0 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte0 & 7 | 8 * (pmc->scratch93 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF;
-	pmc->scratch94 = ((u8)(sdram->emc_cfg) << 27 >> 31 << 31) | (2 * ((sdram->emc_ras << 24) | ((2 * sdram->emc_swizzle_rank0_byte1 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank0_byte1 >> 29 << 18) | ((sdram->emc_swizzle_rank0_byte1 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte1 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte1 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte1 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte1 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte1 & 7 | 8 * (pmc->scratch94 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch95 = ((u8)(sdram->emc_cfg) << 26 >> 31 << 31) | (2 * ((sdram->emc_w2p << 24) | ((2 * sdram->emc_swizzle_rank0_byte2 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank0_byte2 >> 29 << 18) | ((sdram->emc_swizzle_rank0_byte2 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte2 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte2 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte2 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte2 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte2 & 7 | 8 * (pmc->scratch95 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch96 = ((u8)(sdram->emc_cfg) << 25 >> 31 << 31) | (2 * ((sdram->emc_qsafe << 24) | ((2 * sdram->emc_swizzle_rank0_byte3 >> 29 << 21) | (((sdram->emc_swizzle_rank0_byte3 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank0_byte3 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank0_byte3 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank0_byte3 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank0_byte3 << 25 >> 29) | (sdram->emc_swizzle_rank0_byte3 & 7 | 8 * (pmc->scratch96 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF | (32 * sdram->emc_swizzle_rank0_byte3 >> 29 << 18)) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch97 = ((u8)(sdram->emc_cfg) << 24 >> 31 << 31) | (2 * ((sdram->emc_rdv << 24) | ((2 * sdram->emc_swizzle_rank1_byte0 >> 29 << 21) | (((sdram->emc_swizzle_rank1_byte0 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte0 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte0 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte0 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte0 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte0 & 7 | 8 * (pmc->scratch97 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF | (32 * sdram->emc_swizzle_rank1_byte0 >> 29 << 18)) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch98 = ((u16)(sdram->emc_cfg) << 23 >> 31 << 31) | (2 * (((u16)(sdram->emc_rw2pden) << 24) | ((2 * sdram->emc_swizzle_rank1_byte1 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank1_byte1 >> 29 << 18) | ((sdram->emc_swizzle_rank1_byte1 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte1 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte1 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte1 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte1 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte1 & 7 | 8 * (pmc->scratch98 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch99 = ((u16)(sdram->emc_cfg) << 22 >> 31 << 31) | (2 * ((sdram->emc_tfaw << 24) | ((2 * sdram->emc_swizzle_rank1_byte2 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank1_byte2 >> 29 << 18) | ((sdram->emc_swizzle_rank1_byte2 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte2 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte2 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte2 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte2 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte2 & 7 | 8 * (pmc->scratch99 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch100 = (sdram->emc_cfg << 13 >> 31 << 31) | (2 * ((sdram->emc_tclkstable << 24) | ((2 * sdram->emc_swizzle_rank1_byte3 >> 29 << 21) | ((32 * sdram->emc_swizzle_rank1_byte3 >> 29 << 18) | ((sdram->emc_swizzle_rank1_byte3 << 9 >> 29 << 15) | ((sdram->emc_swizzle_rank1_byte3 << 13 >> 29 << 12) | ((sdram->emc_swizzle_rank1_byte3 << 17 >> 29 << 9) | ((sdram->emc_swizzle_rank1_byte3 << 21 >> 29 << 6) | (8 * (sdram->emc_swizzle_rank1_byte3 << 25 >> 29) | (sdram->emc_swizzle_rank1_byte3 & 7 | 8 * (pmc->scratch100 >> 3)) & 0xFFFFFFC7) & 0xFFFFFE3F) & 0xFFFFF1FF) & 0xFFFF8FFF) & 0xFFFC7FFF) & 0xFFE3FFFF) & 0xFF1FFFFF) & 0x80FFFFFF) >> 1);
-	tmp = 2 * (((u8)(sdram->emc_trtm) << 24) | ((16 * sdram->emc_cfg_pipe2 >> 31 << 23) | ((32 * sdram->emc_cfg_pipe2 >> 31 << 22) | ((sdram->emc_cfg_pipe2 << 6 >> 31 << 21) | ((sdram->emc_cfg_pipe2 << 7 >> 31 << 20) | ((sdram->emc_cfg_pipe2 << 8 >> 31 << 19) | ((sdram->emc_cfg_pipe2 << 9 >> 31 << 18) | ((sdram->emc_cfg_pipe2 << 10 >> 31 << 17) | ((sdram->emc_cfg_pipe2 << 11 >> 31 << 16) | ((sdram->emc_cfg_pipe2 << 12 >> 31 << 15) | ((sdram->emc_cfg_pipe2 << 13 >> 31 << 14) | ((sdram->emc_cfg_pipe2 << 14 >> 31 << 13) | ((sdram->emc_cfg_pipe2 << 15 >> 31 << 12) | ((sdram->emc_cfg_pipe2 << 20 >> 31 << 11) | ((sdram->emc_cfg_pipe2 << 21 >> 31 << 10) | ((sdram->emc_cfg_pipe2 << 22 >> 31 << 9) | ((sdram->emc_cfg_pipe2 << 23 >> 31 << 8) | ((sdram->emc_cfg_pipe2 << 24 >> 31 << 7) | ((sdram->emc_cfg_pipe2 << 25 >> 31 << 6) | (32 * (sdram->emc_cfg_pipe2 << 26 >> 31) | (16 * (sdram->emc_cfg_pipe2 << 27 >> 31) | (8 * (sdram->emc_cfg_pipe2 << 28 >> 31) | (4 * (sdram->emc_cfg_pipe2 << 29 >> 31) | (2 * (sdram->emc_cfg_pipe2 << 30 >> 31) | (sdram->emc_cfg_pipe2 & 1 | 2 * (pmc->scratch101 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1;
-	pmc->scratch101 = (sdram->emc_cfg << 10 >> 31 << 31) | tmp;
-	tmp = (2 * (pmc->scratch102 >> 1) | sdram->emc_cfg_pipe1 & 1) & 0xFFFFFFFD;
-	pmc->scratch102 = (sdram->emc_cfg << 9 >> 31 << 31) | (2 * (((u8)(sdram->emc_twtm) << 24) | ((16 * sdram->emc_cfg_pipe1 >> 31 << 23) | ((32 * sdram->emc_cfg_pipe1 >> 31 << 22) | ((sdram->emc_cfg_pipe1 << 6 >> 31 << 21) | ((sdram->emc_cfg_pipe1 << 7 >> 31 << 20) | ((sdram->emc_cfg_pipe1 << 8 >> 31 << 19) | ((sdram->emc_cfg_pipe1 << 9 >> 31 << 18) | ((sdram->emc_cfg_pipe1 << 10 >> 31 << 17) | ((sdram->emc_cfg_pipe1 << 11 >> 31 << 16) | ((sdram->emc_cfg_pipe1 << 12 >> 31 << 15) | ((sdram->emc_cfg_pipe1 << 13 >> 31 << 14) | ((sdram->emc_cfg_pipe1 << 14 >> 31 << 13) | ((sdram->emc_cfg_pipe1 << 15 >> 31 << 12) | ((sdram->emc_cfg_pipe1 << 20 >> 31 << 11) | ((sdram->emc_cfg_pipe1 << 21 >> 31 << 10) | ((sdram->emc_cfg_pipe1 << 22 >> 31 << 9) | ((sdram->emc_cfg_pipe1 << 23 >> 31 << 8) | ((sdram->emc_cfg_pipe1 << 24 >> 31 << 7) | ((sdram->emc_cfg_pipe1 << 25 >> 31 << 6) | (32 * (sdram->emc_cfg_pipe1 << 26 >> 31) | (16 * (sdram->emc_cfg_pipe1 << 27 >> 31) | (8 * (sdram->emc_cfg_pipe1 << 28 >> 31) | (4 * (sdram->emc_cfg_pipe1 << 29 >> 31) | (2 * (sdram->emc_cfg_pipe1 << 30 >> 31) | tmp) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1);
-	tmp = 2 * (((u8)(sdram->emc_tratm) << 24) | ((sdram->emc_pmacro_ddll_pwrd0 >> 31 << 23) | ((2 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 22) | ((8 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 21) | ((16 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 20) | ((32 * sdram->emc_pmacro_ddll_pwrd0 >> 31 << 19) | ((sdram->emc_pmacro_ddll_pwrd0 << 6 >> 31 << 18) | ((sdram->emc_pmacro_ddll_pwrd0 << 8 >> 31 << 17) | ((sdram->emc_pmacro_ddll_pwrd0 << 9 >> 31 << 16) | ((sdram->emc_pmacro_ddll_pwrd0 << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_pwrd0 << 12 >> 31 << 14) | ((sdram->emc_pmacro_ddll_pwrd0 << 13 >> 31 << 13) | ((sdram->emc_pmacro_ddll_pwrd0 << 14 >> 31 << 12) | ((sdram->emc_pmacro_ddll_pwrd0 << 16 >> 31 << 11) | ((sdram->emc_pmacro_ddll_pwrd0 << 17 >> 31 << 10) | ((sdram->emc_pmacro_ddll_pwrd0 << 19 >> 31 << 9) | ((sdram->emc_pmacro_ddll_pwrd0 << 20 >> 31 << 8) | ((sdram->emc_pmacro_ddll_pwrd0 << 21 >> 31 << 7) | ((sdram->emc_pmacro_ddll_pwrd0 << 22 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_pwrd0 << 24 >> 31) | (16 * (sdram->emc_pmacro_ddll_pwrd0 << 25 >> 31) | (8 * (sdram->emc_pmacro_ddll_pwrd0 << 27 >> 31) | (4 * (sdram->emc_pmacro_ddll_pwrd0 << 28 >> 31) | (2 * (sdram->emc_pmacro_ddll_pwrd0 << 29 >> 31) | ((sdram->emc_pmacro_ddll_pwrd0 << 30 >> 31) | 2 * (pmc->scratch103 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1;
-	pmc->scratch103 = (sdram->emc_cfg << 8 >> 31 << 31) | tmp;
-	tmp = 2 * (((u8)(sdram->emc_twatm) << 24) | ((sdram->emc_pmacro_ddll_pwrd1 >> 31 << 23) | ((2 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 22) | ((8 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 21) | ((16 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 20) | ((32 * sdram->emc_pmacro_ddll_pwrd1 >> 31 << 19) | ((sdram->emc_pmacro_ddll_pwrd1 << 6 >> 31 << 18) | ((sdram->emc_pmacro_ddll_pwrd1 << 8 >> 31 << 17) | ((sdram->emc_pmacro_ddll_pwrd1 << 9 >> 31 << 16) | ((sdram->emc_pmacro_ddll_pwrd1 << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_pwrd1 << 12 >> 31 << 14) | ((sdram->emc_pmacro_ddll_pwrd1 << 13 >> 31 << 13) | ((sdram->emc_pmacro_ddll_pwrd1 << 14 >> 31 << 12) | ((sdram->emc_pmacro_ddll_pwrd1 << 16 >> 31 << 11) | ((sdram->emc_pmacro_ddll_pwrd1 << 17 >> 31 << 10) | ((sdram->emc_pmacro_ddll_pwrd1 << 19 >> 31 << 9) | ((sdram->emc_pmacro_ddll_pwrd1 << 20 >> 31 << 8) | ((sdram->emc_pmacro_ddll_pwrd1 << 21 >> 31 << 7) | ((sdram->emc_pmacro_ddll_pwrd1 << 22 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_pwrd1 << 24 >> 31) | (16 * (sdram->emc_pmacro_ddll_pwrd1 << 25 >> 31) | (8 * (sdram->emc_pmacro_ddll_pwrd1 << 27 >> 31) | (4 * (sdram->emc_pmacro_ddll_pwrd1 << 28 >> 31) | (2 * (sdram->emc_pmacro_ddll_pwrd1 << 29 >> 31) | ((sdram->emc_pmacro_ddll_pwrd1 << 30 >> 31) | 2 * (pmc->scratch104 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1;
-	pmc->scratch104 = (sdram->emc_cfg << 7 >> 31 << 31) | tmp;
-	tmp = (sdram->emc_pmacro_ddll_pwrd2 << 22 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_pwrd2 << 24 >> 31) | (16 * (sdram->emc_pmacro_ddll_pwrd2 << 25 >> 31) | (8 * (sdram->emc_pmacro_ddll_pwrd2 << 27 >> 31) | (4 * (sdram->emc_pmacro_ddll_pwrd2 << 28 >> 31) | (2 * (sdram->emc_pmacro_ddll_pwrd2 << 29 >> 31) | ((sdram->emc_pmacro_ddll_pwrd2 << 30 >> 31) | 2 * (pmc->scratch105 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF;
-	pmc->scratch105 = (sdram->emc_cfg << 6 >> 31 << 31) | (2 * (((u8)(sdram->emc_tr2ref) << 24) | ((sdram->emc_pmacro_ddll_pwrd2 >> 31 << 23) | ((2 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 22) | ((8 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 21) | ((16 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 20) | ((32 * sdram->emc_pmacro_ddll_pwrd2 >> 31 << 19) | ((sdram->emc_pmacro_ddll_pwrd2 << 6 >> 31 << 18) | ((sdram->emc_pmacro_ddll_pwrd2 << 8 >> 31 << 17) | ((sdram->emc_pmacro_ddll_pwrd2 << 9 >> 31 << 16) | ((sdram->emc_pmacro_ddll_pwrd2 << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_pwrd2 << 12 >> 31 << 14) | ((sdram->emc_pmacro_ddll_pwrd2 << 13 >> 31 << 13) | ((sdram->emc_pmacro_ddll_pwrd2 << 14 >> 31 << 12) | ((sdram->emc_pmacro_ddll_pwrd2 << 16 >> 31 << 11) | ((sdram->emc_pmacro_ddll_pwrd2 << 17 >> 31 << 10) | ((sdram->emc_pmacro_ddll_pwrd2 << 19 >> 31 << 9) | ((sdram->emc_pmacro_ddll_pwrd2 << 20 >> 31 << 8) | ((sdram->emc_pmacro_ddll_pwrd2 << 21 >> 31 << 7) | tmp & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch106 = (32 * sdram->emc_cfg >> 31 << 31) | (2 * (((u16)(sdram->emc_pdex2mrr) << 24) | ((8 * sdram->emc_pmacro_ddll_periodic_offset >> 31 << 23) | ((16 * sdram->emc_pmacro_ddll_periodic_offset >> 31 << 22) | ((32 * sdram->emc_pmacro_ddll_periodic_offset >> 31 << 21) | ((sdram->emc_pmacro_ddll_periodic_offset << 6 >> 31 << 20) | ((sdram->emc_pmacro_ddll_periodic_offset << 7 >> 31 << 19) | ((sdram->emc_pmacro_ddll_periodic_offset << 8 >> 31 << 18) | ((sdram->emc_pmacro_ddll_periodic_offset << 9 >> 31 << 17) | ((sdram->emc_pmacro_ddll_periodic_offset << 10 >> 31 << 16) | ((sdram->emc_pmacro_ddll_periodic_offset << 11 >> 31 << 15) | ((sdram->emc_pmacro_ddll_periodic_offset << 15 >> 31 << 14) | ((sdram->emc_pmacro_ddll_periodic_offset << 16 >> 31 << 13) | ((sdram->emc_pmacro_ddll_periodic_offset << 17 >> 31 << 12) | ((sdram->emc_pmacro_ddll_periodic_offset << 18 >> 31 << 11) | ((sdram->emc_pmacro_ddll_periodic_offset << 19 >> 31 << 10) | ((sdram->emc_pmacro_ddll_periodic_offset << 20 >> 31 << 9) | ((sdram->emc_pmacro_ddll_periodic_offset << 21 >> 31 << 8) | ((sdram->emc_pmacro_ddll_periodic_offset << 22 >> 31 << 7) | ((sdram->emc_pmacro_ddll_periodic_offset << 23 >> 31 << 6) | (sdram->emc_pmacro_ddll_periodic_offset & 0x3F | (pmc->scratch106 >> 6 << 6)) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch107 = (8 * sdram->emc_cfg >> 31 << 31) | (2 * ((sdram->emc_clken_override << 15 >> 31 << 30) | ((sdram->emc_clken_override << 23 >> 31 << 29) | ((sdram->emc_clken_override << 24 >> 31 << 28) | ((sdram->emc_clken_override << 25 >> 31 << 27) | ((sdram->emc_clken_override << 28 >> 31 << 26) | ((sdram->emc_clken_override << 29 >> 31 << 25) | ((sdram->emc_clken_override << 30 >> 31 << 24) | ((sdram->mc_emem_arb_da_covers << 8 >> 24 << 16) | ((sdram->mc_emem_arb_da_covers << 16 >> 24 << 8) | (sdram->mc_emem_arb_da_covers & 0xFF | (pmc->scratch107 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch108 = (sdram->emc_rfc_pb << 23) | ((sdram->emc_xm2_comp_pad_ctrl >> 24 << 15) | ((sdram->emc_xm2_comp_pad_ctrl << 12 >> 24 << 7) | ((sdram->emc_xm2_comp_pad_ctrl << 20 >> 31 << 6) | (32 * (sdram->emc_xm2_comp_pad_ctrl << 22 >> 31) | (4 * (sdram->emc_xm2_comp_pad_ctrl << 25 >> 29) | (sdram->emc_xm2_comp_pad_ctrl & 3 | 4 * (pmc->scratch108 >> 2)) & 0xFFFFFFE3) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFF807F) & 0xFF807FFF) & 0x7FFFFF;
-	pmc->scratch109 = (sdram->emc_cfg_update >> 31 << 31) | (2 * ((2 * sdram->emc_cfg_update >> 31 << 30) | ((4 * sdram->emc_cfg_update >> 31 << 29) | ((8 * sdram->emc_cfg_update >> 31 << 28) | ((sdram->emc_cfg_update << 21 >> 30 << 26) | ((sdram->emc_cfg_update << 23 >> 31 << 25) | ((sdram->emc_cfg_update << 29 >> 30 << 23) | ((sdram->emc_cfg_update << 22) & 0x7FFFFF | ((sdram->emc_auto_cal_config3 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config3 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config3 << 17 >> 25 << 7) | ((pmc->scratch109 >> 7 << 7) | sdram->emc_auto_cal_config3 & 0x7F) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFE7FFFFF) & 0xFDFFFFFF) & 0xF3FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch110 = (sdram->emc_rfc << 22) | ((sdram->emc_auto_cal_config4 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config4 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config4 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config4 & 0x7F | (pmc->scratch110 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0x3FFFFF;
-	pmc->scratch111 = ((u16)(sdram->emc_txsr) << 22) | ((sdram->emc_auto_cal_config5 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config5 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config5 << 17 >> 25 << 7) | ((pmc->scratch111 >> 7 << 7) | sdram->emc_auto_cal_config5 & 0x7F) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0x3FFFFF;
-	pmc->scratch112 = (16 * sdram->emc_mc2emc_q >> 28 << 28) | ((sdram->emc_mc2emc_q << 21 >> 29 << 25) | ((sdram->emc_mc2emc_q << 22) & 0x1FFFFFF | ((sdram->emc_auto_cal_config6 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config6 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config6 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config6 & 0x7F | (pmc->scratch112 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xFFFFFFF;
-	pmc->scratch113 = (sdram->mc_emem_arb_ring1_throttle << 11 >> 27 << 27) | ((sdram->mc_emem_arb_ring1_throttle << 22) | ((sdram->emc_auto_cal_config7 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config7 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config7 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config7 & 0x7F | (pmc->scratch113 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xF83FFFFF) & 0x7FFFFFF;
-	pmc->scratch114 = (sdram->emc_auto_cal_config8 << 8 >> 28 << 18) | ((sdram->emc_auto_cal_config8 << 12 >> 28 << 14) | ((sdram->emc_auto_cal_config8 << 17 >> 25 << 7) | (sdram->emc_auto_cal_config8 & 0x7F | (pmc->scratch114 >> 7 << 7)) & 0xFFFFC07F) & 0xFFFC3FFF) & 0xFFC3FFFF;
-	pmc->scratch115 = (4 * sdram->emc_cfg >> 31 << 31) | (2 * (((u16)(sdram->emc_ar2pden) << 22) | ((sdram->emc_fbio_cfg7 << 10 >> 30 << 20) | ((sdram->emc_fbio_cfg7 << 12 >> 31 << 19) | ((sdram->emc_fbio_cfg7 << 13 >> 31 << 18) | ((sdram->emc_fbio_cfg7 << 14 >> 31 << 17) | ((sdram->emc_fbio_cfg7 << 15 >> 31 << 16) | ((sdram->emc_fbio_cfg7 << 16 >> 31 << 15) | ((sdram->emc_fbio_cfg7 << 17 >> 31 << 14) | ((sdram->emc_fbio_cfg7 << 18 >> 31 << 13) | ((sdram->emc_fbio_cfg7 << 19 >> 31 << 12) | ((sdram->emc_fbio_cfg7 << 20 >> 31 << 11) | ((sdram->emc_fbio_cfg7 << 21 >> 31 << 10) | ((sdram->emc_fbio_cfg7 << 22 >> 31 << 9) | ((sdram->emc_fbio_cfg7 << 23 >> 31 << 8) | ((sdram->emc_fbio_cfg7 << 24 >> 31 << 7) | ((sdram->emc_fbio_cfg7 << 25 >> 31 << 6) | (32 * (sdram->emc_fbio_cfg7 << 26 >> 31) | (16 * (sdram->emc_fbio_cfg7 << 27 >> 31) | (8 * (sdram->emc_fbio_cfg7 << 28 >> 31) | (4 * (sdram->emc_fbio_cfg7 << 29 >> 31) | (2 * (sdram->emc_fbio_cfg7 << 30 >> 31) | (sdram->emc_fbio_cfg7 & 1 | 2 * (pmc->scratch115 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFCFFFFF) & 0x803FFFFF) >> 1);
-	pmc->scratch123 = (2 * sdram->emc_cfg >> 31 << 31) | (2 * ((sdram->emc_rfc_slr << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_0 & 0x7FF | (pmc->scratch123 >> 11 << 11)) & 0xFFC007FF) & 0x803FFFFF) >> 1);
-	pmc->scratch124 = (sdram->emc_cfg >> 31 << 31) | (2 * ((4 * sdram->emc_ibdly >> 30 << 29) | ((sdram->emc_ibdly << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_1 & 0x7FF | (pmc->scratch124 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1);
-	pmc->scratch125 = (sdram->emc_fbio_cfg5 << 27 >> 31 << 31) | (2 * (((u16)(sdram->mc_emem_arb_timing_rfcpb) << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_2 & 0x7FF | (pmc->scratch125 >> 11 << 11)) & 0xFFC007FF) & 0x803FFFFF) >> 1);
-	pmc->scratch126 = (sdram->emc_fbio_cfg5 << 16 >> 29 << 29) | ((sdram->emc_auto_cal_config9 << 25 >> 31 << 28) | ((sdram->emc_auto_cal_config9 << 26 >> 31 << 27) | ((sdram->emc_auto_cal_config9 << 27 >> 31 << 26) | ((sdram->emc_auto_cal_config9 << 28 >> 31 << 25) | ((sdram->emc_auto_cal_config9 << 29 >> 31 << 24) | ((sdram->emc_auto_cal_config9 << 30 >> 31 << 23) | ((sdram->emc_auto_cal_config9 << 22) & 0x7FFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_3 & 0x7FF | (pmc->scratch126 >> 11 << 11)) & 0xFFC007FF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF;
-	pmc->scratch127 = ((u8)(sdram->emc_cfg2) << 26 >> 29 << 29) | ((sdram->emc_rdv_mask << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_4 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_4 & 0x7FF | (pmc->scratch127 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF;
-	pmc->scratch128 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 27 >> 29 << 29) | (((u8)(sdram->emc_rdv_early_mask) << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank0_5 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank0_5 & 0x7FF | (pmc->scratch128 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF;
-	pmc->scratch129 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 22 >> 29 << 29) | ((sdram->emc_rdv_early << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_0 & 0x7FF | (pmc->scratch129 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF;
-	pmc->scratch130 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 17 >> 29 << 29) | ((4 * sdram->emc_quse_width >> 31 << 28) | ((8 * sdram->emc_quse_width >> 31 << 27) | ((sdram->emc_quse_width << 22) & 0x7FFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_1 & 0x7FF | (pmc->scratch130 >> 11 << 11)) & 0xFFC007FF) & 0xF83FFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF;
-	pmc->scratch131 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 12 >> 29 << 29) | (((u16)(sdram->emc_pmacro_ddll_short_cmd_2) << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_2 & 0x7FF | (pmc->scratch131 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF;
-	pmc->scratch132 = (sdram->emc_pmacro_data_pad_tx_ctrl << 27 >> 29 << 29) | ((sdram->emc_pmacro_cmd_rx_term_mode << 18 >> 31 << 28) | ((sdram->emc_pmacro_cmd_rx_term_mode << 22 >> 30 << 26) | ((sdram->emc_pmacro_cmd_rx_term_mode << 26 >> 30 << 24) | ((sdram->emc_pmacro_cmd_rx_term_mode << 22) & 0xFFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_3 & 0x7FF | (pmc->scratch132 >> 11 << 11)) & 0xFFC007FF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF;
-	pmc->scratch133 = (sdram->emc_pmacro_data_pad_tx_ctrl << 22 >> 29 << 29) | ((sdram->emc_pmacro_data_rx_term_mode << 18 >> 31 << 28) | ((sdram->emc_pmacro_data_rx_term_mode << 22 >> 30 << 26) | ((sdram->emc_pmacro_data_rx_term_mode << 26 >> 30 << 24) | ((sdram->emc_pmacro_data_rx_term_mode << 22) & 0xFFFFFF | ((32 * sdram->emc_pmacro_quse_ddll_rank1_4 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_4 & 0x7FF | (pmc->scratch133 >> 11 << 11)) & 0xFFC007FF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xEFFFFFFF) & 0x1FFFFFFF;
-	pmc->scratch134 = (sdram->emc_pmacro_data_pad_tx_ctrl << 17 >> 29 << 29) | ((sdram->mc_emem_arb_timing_rp << 22) | ((32 * sdram->emc_pmacro_quse_ddll_rank1_5 >> 21 << 11) | (sdram->emc_pmacro_quse_ddll_rank1_5 & 0x7FF | (pmc->scratch134 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF;
-	pmc->scratch135 = (sdram->emc_pmacro_data_pad_tx_ctrl << 12 >> 29 << 29) | ((sdram->mc_emem_arb_timing_ras << 22) | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_0 & 0x7FF | (pmc->scratch135 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x1FFFFFFF;
-	pmc->scratch136 = (sdram->emc_fbio_cfg5 << 23 >> 31 << 31) | (2 * ((sdram->emc_cfg << 14 >> 30 << 29) | ((sdram->mc_emem_arb_timing_faw << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_1 & 0x7FF | (pmc->scratch136 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1);
-	pmc->scratch137 = (sdram->emc_fbio_cfg5 << 21 >> 31 << 31) | (2 * ((sdram->emc_fbio_cfg5 << 29) | ((sdram->mc_emem_arb_timing_rap2pre << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_2 & 0x7FF | (pmc->scratch137 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1);
-	pmc->scratch138 = (sdram->emc_fbio_cfg5 << 19 >> 31 << 31) | (2 * ((sdram->emc_fbio_cfg5 << 28 >> 30 << 29) | ((sdram->mc_emem_arb_timing_wap2pre << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_3 & 0x7FF | (pmc->scratch138 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1);
-	pmc->scratch139 = (sdram->emc_fbio_cfg5 << 7 >> 31 << 31) | (2 * ((16 * sdram->emc_cfg2 >> 30 << 29) | (((u8)(sdram->mc_emem_arb_timing_r2w) << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_4 & 0x7FF | (pmc->scratch139 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0x9FFFFFFF) >> 1);
-	pmc->scratch140 = (16 * sdram->emc_fbio_cfg5 >> 31 << 31) | (2 * ((32 * sdram->emc_fbio_cfg5 >> 31 << 30) | ((sdram->emc_fbio_cfg5 << 6 >> 31 << 29) | (((u8)(sdram->mc_emem_arb_timing_w2r) << 22) & 0x1FFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank0_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank0_5 & 0x7FF | (pmc->scratch140 >> 11 << 11)) & 0xFFC007FF) & 0xE03FFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch141 = (sdram->emc_fbio_cfg5 << 8 >> 28 << 28) | (((u16)(sdram->emc_wdv) << 22) | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_0 & 0x7FF | (pmc->scratch141 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xFFFFFFF;
-	pmc->scratch142 = ((u8)(sdram->emc_cfg2) << 31) | (2 * ((sdram->emc_fbio_cfg5 >> 31 << 30) | ((2 * sdram->emc_fbio_cfg5 >> 31 << 29) | ((8 * sdram->emc_fbio_cfg5 >> 31 << 28) | ((sdram->emc_quse << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_1 & 0x7FF | (pmc->scratch142 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch143 = (((u16)(sdram->emc_cfg2) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_cfg2) << 24) >> 31 << 30) | ((((u16)(sdram->emc_cfg2) << 29) >> 31 << 29) | ((((u16)(sdram->emc_cfg2) << 30) >> 31 << 28) | (((u8)(sdram->emc_pdex2wr) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_2 & 0x7FF | (pmc->scratch143 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch144 = (sdram->emc_cfg2 << 15 >> 31 << 31) | (2 * ((sdram->emc_cfg2 << 16 >> 31 << 30) | ((sdram->emc_cfg2 << 17 >> 31 << 29) | ((sdram->emc_cfg2 << 20 >> 31 << 28) | (((u8)(sdram->emc_pdex2rd) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_3 & 0x7FF | (pmc->scratch144 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch145 = (sdram->emc_cfg2 << 7 >> 31 << 31) | (2 * ((sdram->emc_cfg2 << 8 >> 31 << 30) | ((sdram->emc_cfg2 << 9 >> 31 << 29) | ((sdram->emc_cfg2 << 11 >> 31 << 28) | (((u16)(sdram->emc_pdex2che) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_4 & 0x7FF | (pmc->scratch145 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch146 = (2 * sdram->emc_cfg2 >> 31 << 31) | (2 * ((4 * sdram->emc_cfg2 >> 31 << 30) | (((sdram->emc_cfg2 << 6 >> 31 << 28) | (((u8)(sdram->emc_pchg2pden) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dq_rank1_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dq_rank1_5 & 0x7FF | (pmc->scratch146 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF | (8 * sdram->emc_cfg2 >> 31 << 29)) & 0xBFFFFFFF) >> 1);
-	pmc->scratch147 = (((u8)(sdram->emc_cfg_pipe) << 29) >> 31 << 31) | (2 * ((((u8)(sdram->emc_cfg_pipe) << 30) >> 31 << 30) | ((((u8)(sdram->emc_cfg_pipe) << 31) >> 2) | ((sdram->emc_cfg2 >> 31 << 28) | (((u16)(sdram->emc_act2pden) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_0 & 0x7FF | (pmc->scratch147 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch148 = (((u8)(sdram->emc_cfg_pipe) << 25) >> 31 << 31) | (2 * ((((u8)(sdram->emc_cfg_pipe) << 26) >> 31 << 30) | ((((u8)(sdram->emc_cfg_pipe) << 27) >> 31 << 29) | ((((u8)(sdram->emc_cfg_pipe) << 28) >> 31 << 28) | (((u16)(sdram->emc_cke2pden) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_1 & 0x7FF | (pmc->scratch148 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch149 = (((u16)(sdram->emc_cfg_pipe) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_cfg_pipe) << 22) >> 31 << 30) | ((((u16)(sdram->emc_cfg_pipe) << 23) >> 31 << 29) | ((((u16)(sdram->emc_cfg_pipe) << 24) >> 31 << 28) | ((sdram->emc_tcke << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_2 & 0x7FF | (pmc->scratch149 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch150 = (sdram->emc_cfg_pipe << 13 >> 31 << 31) | (2 * ((sdram->emc_cfg_pipe << 14 >> 31 << 30) | (((sdram->emc_cfg_pipe << 20 >> 31 << 28) | ((sdram->emc_trpab << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_3 & 0x7FF | (pmc->scratch150 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF | (sdram->emc_cfg_pipe << 15 >> 31 << 29)) & 0xBFFFFFFF) >> 1);
-	pmc->scratch151 = (sdram->emc_cfg_pipe << 9 >> 31 << 31) | (2 * ((sdram->emc_cfg_pipe << 10 >> 31 << 30) | ((sdram->emc_cfg_pipe << 11 >> 31 << 29) | ((sdram->emc_cfg_pipe << 12 >> 31 << 28) | ((sdram->emc_einput << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_4 & 0x7FF | (pmc->scratch151 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch152 = (32 * sdram->emc_cfg_pipe >> 31 << 31) | (2 * ((sdram->emc_cfg_pipe << 6 >> 31 << 30) | ((sdram->emc_cfg_pipe << 7 >> 31 << 29) | ((sdram->emc_cfg_pipe << 8 >> 31 << 28) | ((sdram->emc_einput_duration << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank0_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank0_5 & 0x7FF | (pmc->scratch152 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch153 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 29) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 30) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 31) >> 2) | ((16 * sdram->emc_cfg_pipe >> 31 << 28) | ((sdram->emc_puterm_extra << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_0 & 0x7FF | (pmc->scratch153 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch154 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 25) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 26) >> 31 << 30) | (((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 28) >> 31 << 28) | ((sdram->emc_tckesr << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_1 & 0x7FF | (pmc->scratch154 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF | (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 27) >> 31 << 29)) & 0xBFFFFFFF) >> 1);
-	pmc->scratch155 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 22) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 23) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src0) << 24) >> 31 << 28) | ((sdram->emc_tpd << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_2 & 0x7FF | (pmc->scratch155 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch156 = (sdram->emc_pmacro_tx_sel_clk_src0 << 12 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src0 << 13 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 14 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 15 >> 31 << 28) | ((sdram->emc_wdv_mask << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_3 & 0x7FF | (pmc->scratch156 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch157 = (sdram->emc_pmacro_tx_sel_clk_src0 << 8 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src0 << 9 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 10 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 11 >> 31 << 28) | (((u16)(sdram->emc_wdv_chk) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_4 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_4 & 0x7FF | (pmc->scratch157 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch158 = ((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 31) | (2 * ((32 * sdram->emc_pmacro_tx_sel_clk_src0 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 6 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src0 << 7 >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft0) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft0) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ob_ddll_long_dqs_rank1_5 >> 21 << 11) | (sdram->emc_pmacro_ob_ddll_long_dqs_rank1_5 & 0x7FF | (pmc->scratch158 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch159 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 27) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 28) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 29) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 30) >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft1) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft1) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_0 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_0 & 0x7FF | (pmc->scratch159 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch160 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 23) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 24) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 25) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src1) << 26) >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft2) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft2) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_1 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_1 & 0x7FF | (pmc->scratch160 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch161 = (sdram->emc_pmacro_tx_sel_clk_src1 << 14 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src1 << 15 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 21 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 22 >> 31 << 28) | (((u8)(sdram->emc_cmd_brlshft3) << 26 >> 29 << 25) | (((u8)(sdram->emc_cmd_brlshft3) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_2 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_2 & 0x7FF | (pmc->scratch161 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch162 = (sdram->emc_pmacro_tx_sel_clk_src1 << 10 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src1 << 11 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 12 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 13 >> 31 << 28) | (((u16)(sdram->emc_wev) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank0_3 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank0_3 & 0x7FF | (pmc->scratch162 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch163 = (sdram->emc_pmacro_tx_sel_clk_src1 << 6 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src1 << 7 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 8 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src1 << 9 >> 31 << 28) | (((u16)(sdram->emc_wsv) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_0 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_0 & 0x7FF | (pmc->scratch163 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch164 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 29) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 30) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 31) >> 2) | ((32 * sdram->emc_pmacro_tx_sel_clk_src1 >> 31 << 28) | (((u8)(sdram->emc_cfg3) << 25 >> 29 << 25) | (((u8)(sdram->emc_cfg3) << 22) & 0x1FFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_1 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_1 & 0x7FF | (pmc->scratch164 >> 11 << 11)) & 0xFFC007FF) & 0xFE3FFFFF) & 0xF1FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch165 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 25) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 26) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 27) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 28) >> 31 << 28) | ((sdram->emc_puterm_width << 23) & 0xFFFFFFF | ((sdram->emc_puterm_width >> 31 << 22) | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_2 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_2 & 0x7FF | (pmc->scratch165 >> 11 << 11)) & 0xFFC007FF) & 0xFFBFFFFF) & 0xF07FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch166 = (((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 21) >> 31 << 31) | (2 * ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 22) >> 31 << 30) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 23) >> 31 << 29) | ((((u16)(sdram->emc_pmacro_tx_sel_clk_src3) << 24) >> 31 << 28) | ((sdram->mc_emem_arb_timing_rcd << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ib_ddll_long_dqs_rank1_3 >> 21 << 11) | (sdram->emc_pmacro_ib_ddll_long_dqs_rank1_3 & 0x7FF | (pmc->scratch166 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch167 = (sdram->emc_pmacro_tx_sel_clk_src3 << 12 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src3 << 13 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 14 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 15 >> 31 << 28) | (((u16)(sdram->mc_emem_arb_timing_ccdmw) << 22) & 0xFFFFFFF | ((32 * sdram->emc_pmacro_ddll_long_cmd_0 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_0 & 0x7FF | (pmc->scratch167 >> 11 << 11)) & 0xFFC007FF) & 0xF03FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch168 = (sdram->emc_pmacro_tx_sel_clk_src3 << 8 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src3 << 9 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 10 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 11 >> 31 << 28) | ((sdram->mc_emem_arb_override << 28 >> 31 << 27) | (((sdram->mc_emem_arb_override << 21 >> 31 << 25) | ((sdram->mc_emem_arb_override << 15 >> 31 << 24) | ((32 * sdram->mc_emem_arb_override >> 31 << 23) | ((16 * sdram->mc_emem_arb_override >> 31 << 22) | ((32 * sdram->emc_pmacro_ddll_long_cmd_1 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_1 & 0x7FF | (pmc->scratch168 >> 11 << 11)) & 0xFFC007FF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF | (sdram->mc_emem_arb_override << 27 >> 31 << 26)) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch169 = ((u16)(sdram->emc_rext) << 27) | (((u16)(sdram->emc_rrd) << 22) | ((32 * sdram->emc_pmacro_ddll_long_cmd_2 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_2 & 0x7FF | (pmc->scratch169 >> 11 << 11)) & 0xFFC007FF) & 0xF83FFFFF) & 0x7FFFFFF;
-	pmc->scratch170 = ((u16)(sdram->emc_wext) << 27) | ((sdram->emc_tclkstop << 22) | ((32 * sdram->emc_pmacro_ddll_long_cmd_3 >> 21 << 11) | (sdram->emc_pmacro_ddll_long_cmd_3 & 0x7FF | (pmc->scratch170 >> 11 << 11)) & 0xFFC007FF) & 0xF83FFFFF) & 0x7FFFFFF;
-	tmp = (32 * sdram->emc_pmacro_perbit_fgcg_ctrl0 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl0 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl0 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl0 & 1 | 2 * (pmc->scratch171 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF;
-	pmc->scratch171 = (sdram->emc_we_duration << 27) | ((sdram->emc_ref_ctrl2 >> 31 << 26) | ((32 * sdram->emc_ref_ctrl2 >> 29 << 23) | ((sdram->emc_ref_ctrl2 << 22) & 0x7FFFFF | tmp & 0xFFBFFFFF) & 0xFC7FFFFF) & 0xFBFFFFFF) & 0x7FFFFFF;
-	tmp = (sdram->emc_pmacro_pad_cfg_ctrl << 22 >> 31 << 28) | ((sdram->emc_pmacro_pad_cfg_ctrl << 27) & 0xFFFFFFF | ((sdram->emc_ws_duration << 22) & 0x7FFFFFF | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl1 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl1 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl1 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl1 & 1 | 2 * (pmc->scratch172 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xF83FFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF;
-	pmc->scratch172 = (sdram->emc_pmacro_pad_cfg_ctrl << 14 >> 30 << 30) | (4 * ((sdram->emc_pmacro_pad_cfg_ctrl << 18 >> 31 << 29) | tmp & 0xDFFFFFFF) >> 2);
-	pmc->scratch173 = ((u8)(sdram->mc_emem_arb_timing_r2r) << 27) | ((sdram->mc_emem_arb_timing_rrd << 22) | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl2 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl2 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl2 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl2 & 1 | 2 * (pmc->scratch173 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xF83FFFFF) & 0x7FFFFFF;
-	tmp = 32 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl3 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl3 & 1 | 2 * (pmc->scratch174 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF;
-	pmc->scratch174 = ((u16)(sdram->emc_pmacro_tx_sel_clk_src2) << 30 >> 31 << 31) | (2 * (((u16)(sdram->emc_pmacro_tx_sel_clk_src2) << 30) | ((32 * sdram->emc_pmacro_tx_sel_clk_src3 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 6 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src3 << 7 >> 31 << 27) | (((u8)(sdram->mc_emem_arb_timing_w2w) << 22) & 0x7FFFFFF | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl3 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl3 << 25 >> 31 << 6) | tmp & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xF83FFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	tmp = (sdram->emc_pmacro_tx_sel_clk_src2 << 28 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 29 >> 31 << 22) | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl4 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl4 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl4 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl4 & 1 | 2 * (pmc->scratch175 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF;
-	pmc->scratch175 = (sdram->emc_pmacro_tx_sel_clk_src2 << 15 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src2 << 21 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 22 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 23 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 24 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 25 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 26 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 27 >> 31 << 24) | tmp & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	tmp = (sdram->emc_pmacro_tx_sel_clk_src2 << 12 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 13 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 14 >> 31 << 22) | ((32 * sdram->emc_pmacro_perbit_fgcg_ctrl5 >> 31 << 21) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 6 >> 31 << 20) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 7 >> 31 << 19) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 8 >> 31 << 18) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 9 >> 31 << 17) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 10 >> 31 << 16) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 11 >> 31 << 15) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 12 >> 31 << 14) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 13 >> 31 << 13) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 14 >> 31 << 12) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 15 >> 31 << 11) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 21 >> 31 << 10) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 22 >> 31 << 9) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 23 >> 31 << 8) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 24 >> 31 << 7) | ((sdram->emc_pmacro_perbit_fgcg_ctrl5 << 25 >> 31 << 6) | (32 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 26 >> 31) | (16 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 27 >> 31) | (8 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 28 >> 31) | (4 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 29 >> 31) | (2 * (sdram->emc_pmacro_perbit_fgcg_ctrl5 << 30 >> 31) | (sdram->emc_pmacro_perbit_fgcg_ctrl5 & 1 | 2 * (pmc->scratch176 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF;
-	pmc->scratch176 = (32 * sdram->emc_pmacro_tx_sel_clk_src2 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src2 << 6 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 7 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 8 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 9 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 10 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src2 << 11 >> 31 << 25) | tmp & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch177 = (sdram->emc_pmacro_tx_sel_clk_src4 << 22 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src4 << 23 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 24 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 25 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 26 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 27 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 28 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 29 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 30 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 22) & 0x7FFFFF | ((sdram->mc_emem_arb_cfg >> 28 << 18) | ((16 * sdram->mc_emem_arb_cfg >> 28 << 14) | ((sdram->mc_emem_arb_cfg << 11 >> 27 << 9) | (sdram->mc_emem_arb_cfg & 0x1FF | (pmc->scratch177 >> 9 << 9)) & 0xFFFFC1FF) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch178 = (sdram->emc_pmacro_tx_sel_clk_src4 << 7 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src4 << 8 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 9 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 10 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 11 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 12 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 13 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 14 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 15 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src4 << 21 >> 31 << 22) | ((sdram->mc_emem_arb_misc1 >> 28 << 18) | ((sdram->mc_emem_arb_misc1 << 6 >> 30 << 16) | ((sdram->mc_emem_arb_misc1 << 8 >> 29 << 13) | (16 * (sdram->mc_emem_arb_misc1 << 19 >> 23) | (8 * (sdram->mc_emem_arb_misc1 << 28 >> 31) | (4 * (sdram->mc_emem_arb_misc1 << 29 >> 31) | (2 * (sdram->mc_emem_arb_misc1 << 30 >> 31) | (sdram->mc_emem_arb_misc1 & 1 | 2 * (pmc->scratch178 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFE00F) & 0xFFFF1FFF) & 0xFFFCFFFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch179 = (sdram->emc_odt_write >> 31 << 31) | (2 * ((sdram->emc_odt_write << 20 >> 28 << 27) | ((sdram->emc_odt_write << 26 >> 31 << 26) | ((sdram->emc_odt_write << 27 >> 31 << 25) | ((sdram->emc_odt_write << 21) & 0x1FFFFFF | ((32 * sdram->emc_mrs_wait_cnt2 >> 21 << 10) | (sdram->emc_mrs_wait_cnt2 & 0x3FF | (pmc->scratch179 >> 10 << 10)) & 0xFFE003FF) & 0xFE1FFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0x87FFFFFF) >> 1);
-	pmc->scratch180 = (sdram->emc_pmacro_ib_rxrt << 21) | ((32 * sdram->emc_mrs_wait_cnt >> 21 << 10) | (sdram->emc_mrs_wait_cnt & 0x3FF | (pmc->scratch180 >> 10 << 10)) & 0xFFE003FF) & 0x1FFFFF;
-	pmc->scratch181 = ((u16)(sdram->emc_pmacro_ddll_long_cmd_4) << 21) | sdram->emc_auto_cal_interval & 0x1FFFFF;
-	pmc->scratch182 = (sdram->mc_emem_arb_outstanding_req >> 31 << 31) | (2 * ((2 * sdram->mc_emem_arb_outstanding_req >> 31 << 30) | ((sdram->mc_emem_arb_outstanding_req << 23 >> 2) | ((sdram->emc_emem_arb_refpb_hp_ctrl << 9 >> 25 << 14) | ((sdram->emc_emem_arb_refpb_hp_ctrl << 17 >> 25 << 7) | (sdram->emc_emem_arb_refpb_hp_ctrl & 0x7F | (pmc->scratch182 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xC01FFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch183 = (4 * sdram->emc_pmacro_cmd_ctrl0 >> 31 << 31) | (2 * ((8 * sdram->emc_pmacro_cmd_ctrl0 >> 31 << 30) | ((sdram->emc_pmacro_cmd_ctrl0 << 7 >> 31 << 29) | ((sdram->emc_pmacro_cmd_ctrl0 << 10 >> 31 << 28) | ((sdram->emc_pmacro_cmd_ctrl0 << 11 >> 31 << 27) | ((sdram->emc_pmacro_cmd_ctrl0 << 15 >> 31 << 26) | ((sdram->emc_pmacro_cmd_ctrl0 << 18 >> 31 << 25) | ((sdram->emc_pmacro_cmd_ctrl0 << 19 >> 31 << 24) | ((sdram->emc_pmacro_cmd_ctrl0 << 23 >> 31 << 23) | ((sdram->emc_pmacro_cmd_ctrl0 << 26 >> 31 << 22) | ((sdram->emc_pmacro_cmd_ctrl0 << 27 >> 31 << 21) | ((sdram->emc_pmacro_cmd_ctrl0 << 20) & 0x1FFFFF | ((4 * sdram->emc_xm2_comp_pad_ctrl2 >> 26 << 14) | ((sdram->emc_xm2_comp_pad_ctrl2 << 10 >> 30 << 12) | ((sdram->emc_xm2_comp_pad_ctrl2 << 14 >> 31 << 11) | ((sdram->emc_xm2_comp_pad_ctrl2 << 15 >> 31 << 10) | ((sdram->emc_xm2_comp_pad_ctrl2 << 16 >> 30 << 8) | ((sdram->emc_xm2_comp_pad_ctrl2 << 18 >> 30 << 6) | (4 * (sdram->emc_xm2_comp_pad_ctrl2 << 26 >> 28) | (sdram->emc_xm2_comp_pad_ctrl2 & 3 | 4 * (pmc->scratch183 >> 2)) & 0xFFFFFFC3) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFCFFF) & 0xFFF03FFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch184 = (4 * sdram->emc_pmacro_cmd_ctrl1 >> 31 << 31) | (2 * ((8 * sdram->emc_pmacro_cmd_ctrl1 >> 31 << 30) | ((sdram->emc_pmacro_cmd_ctrl1 << 7 >> 31 << 29) | ((sdram->emc_pmacro_cmd_ctrl1 << 10 >> 31 << 28) | ((sdram->emc_pmacro_cmd_ctrl1 << 11 >> 31 << 27) | ((sdram->emc_pmacro_cmd_ctrl1 << 15 >> 31 << 26) | ((sdram->emc_pmacro_cmd_ctrl1 << 18 >> 31 << 25) | ((sdram->emc_pmacro_cmd_ctrl1 << 19 >> 31 << 24) | ((sdram->emc_pmacro_cmd_ctrl1 << 23 >> 31 << 23) | ((sdram->emc_pmacro_cmd_ctrl1 << 26 >> 31 << 22) | ((sdram->emc_pmacro_cmd_ctrl1 << 27 >> 31 << 21) | ((sdram->emc_pmacro_cmd_ctrl1 << 20) & 0x1FFFFF | ((sdram->emc_cfg_dig_dll_1 << 12 >> 28 << 16) | ((sdram->emc_cfg_dig_dll_1 << 16 >> 28 << 12) | ((sdram->emc_cfg_dig_dll_1 << 20 >> 26 << 6) | (2 * (sdram->emc_cfg_dig_dll_1 << 26 >> 27) | (sdram->emc_cfg_dig_dll_1 & 1 | 2 * (pmc->scratch184 >> 1)) & 0xFFFFFFC1) & 0xFFFFF03F) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch185 = (4 * sdram->emc_pmacro_cmd_ctrl2 >> 31 << 31) | (2 * ((8 * sdram->emc_pmacro_cmd_ctrl2 >> 31 << 30) | ((sdram->emc_pmacro_cmd_ctrl2 << 7 >> 31 << 29) | ((sdram->emc_pmacro_cmd_ctrl2 << 10 >> 31 << 28) | ((sdram->emc_pmacro_cmd_ctrl2 << 11 >> 31 << 27) | ((sdram->emc_pmacro_cmd_ctrl2 << 15 >> 31 << 26) | ((sdram->emc_pmacro_cmd_ctrl2 << 18 >> 31 << 25) | ((sdram->emc_pmacro_cmd_ctrl2 << 19 >> 31 << 24) | ((sdram->emc_pmacro_cmd_ctrl2 << 23 >> 31 << 23) | ((sdram->emc_pmacro_cmd_ctrl2 << 26 >> 31 << 22) | ((sdram->emc_pmacro_cmd_ctrl2 << 27 >> 31 << 21) | ((sdram->emc_pmacro_cmd_ctrl2 << 20) & 0x1FFFFF | ((sdram->emc_quse_brlshft0 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft0 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft0 << 22 >> 27) | (sdram->emc_quse_brlshft0 & 0x1F | 32 * (pmc->scratch185 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch186 = (sdram->emc_pmacro_dsr_vttgen_ctrl0 >> 8 << 24) | ((sdram->emc_pmacro_dsr_vttgen_ctrl0 << 20) | ((sdram->emc_quse_brlshft1 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft1 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft1 << 22 >> 27) | (sdram->emc_quse_brlshft1 & 0x1F | 32 * (pmc->scratch186 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFF0FFFFF) & 0xFFFFFF;
-	pmc->scratch187 = (sdram->emc_pmacro_perbit_rfu1_ctrl0 << 10 >> 30 << 30) | (4 * ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 12 >> 30 << 28) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 14 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 26 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 28 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl0 << 20) & 0x3FFFFF | ((sdram->emc_quse_brlshft2 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft2 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft2 << 22 >> 27) | (sdram->emc_quse_brlshft2 & 0x1F | 32 * (pmc->scratch187 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch188 = (sdram->emc_pmacro_perbit_rfu1_ctrl1 << 10 >> 30 << 30) | (4 * ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 12 >> 30 << 28) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 14 >> 30 << 26) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 26 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 28 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl1 << 20) & 0x3FFFFF | ((sdram->emc_quse_brlshft3 << 12 >> 27 << 15) | ((sdram->emc_quse_brlshft3 << 17 >> 27 << 10) | (32 * (sdram->emc_quse_brlshft3 << 22 >> 27) | (sdram->emc_quse_brlshft3 & 0x1F | 32 * (pmc->scratch188 >> 5)) & 0xFFFFFC1F) & 0xFFFF83FF) & 0xFFF07FFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->scratch189 = (sdram->emc_trefbw << 18) | ((sdram->emc_dbg >> 31 << 17) | ((2 * sdram->emc_dbg >> 31 << 16) | ((4 * sdram->emc_dbg >> 31 << 15) | ((8 * sdram->emc_dbg >> 31 << 14) | ((16 * sdram->emc_dbg >> 30 << 12) | ((sdram->emc_dbg << 6 >> 31 << 11) | ((sdram->emc_dbg << 7 >> 31 << 10) | ((sdram->emc_dbg << 18 >> 31 << 9) | ((sdram->emc_dbg << 19 >> 31 << 8) | ((sdram->emc_dbg << 20 >> 31 << 7) | ((sdram->emc_dbg << 21 >> 31 << 6) | (32 * (sdram->emc_dbg << 22 >> 31) | (16 * (sdram->emc_dbg << 27 >> 31) | (8 * (sdram->emc_dbg << 28 >> 31) | (4 * (sdram->emc_dbg << 29 >> 31) | (2 * (sdram->emc_dbg << 30 >> 31) | (sdram->emc_dbg & 1 | 2 * (pmc->scratch189 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFCFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0x3FFFF;
-	pmc->scratch191 = (sdram->emc_qpop << 9 >> 25 << 25) | ((sdram->emc_qpop << 18) | ((sdram->emc_zcal_wait_cnt >> 31 << 17) | ((sdram->emc_zcal_wait_cnt << 10 >> 26 << 11) | (sdram->emc_zcal_wait_cnt & 0x7FF | (pmc->scratch191 >> 11 << 11)) & 0xFFFE07FF) & 0xFFFDFFFF) & 0xFE03FFFF) & 0x1FFFFFF;
-	pmc->scratch192 = (sdram->emc_pmacro_tx_sel_clk_src4 << 6 >> 31 << 31) | (2 * ((sdram->emc_pmacro_auto_cal_common << 15 >> 31 << 30) | ((sdram->emc_pmacro_auto_cal_common << 18 >> 26 << 24) | ((sdram->emc_pmacro_auto_cal_common << 18) & 0xFFFFFF | ((sdram->emc_zcal_mrw_cmd >> 30 << 16) | ((sdram->emc_zcal_mrw_cmd << 8 >> 24 << 8) | (sdram->emc_zcal_mrw_cmd & 0xFF | (pmc->scratch192 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFCFFFF) & 0xFF03FFFF) & 0xC0FFFFFF) & 0xBFFFFFFF) >> 1);
-	tmp = (sdram->emc_dll_cfg1 << 7 >> 31 << 17) | ((sdram->emc_dll_cfg1 << 10 >> 31 << 16) | ((sdram->emc_dll_cfg1 << 11 >> 31 << 15) | ((sdram->emc_dll_cfg1 << 14 >> 30 << 13) | ((sdram->emc_dll_cfg1 << 18 >> 31 << 12) | ((sdram->emc_dll_cfg1 << 19 >> 31 << 11) | ((pmc->scratch193 >> 11 << 11) | sdram->emc_dll_cfg1 & 0x7FF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFF9FFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF;
-	pmc->scratch193 = (sdram->emc_pmacro_tx_sel_clk_src5 << 31) | (2 * ((32 * sdram->emc_pmacro_tx_sel_clk_src4 >> 31 << 30) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 10 >> 30 << 28) | (((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 14 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 26 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 28 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu1_ctrl2 << 18) & 0xFFFFF | tmp & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl2 << 12 >> 30 << 26)) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch194 = (sdram->emc_pmacro_tx_sel_clk_src5 << 29 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src5 << 30 >> 31 << 30) | ((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 10 >> 30 << 28) | (((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 14 >> 30 << 24) | (((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 28 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu1_ctrl3 << 18) & 0xFFFFF | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 14 >> 30 << 16) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 16 >> 30 << 14) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 18 >> 30 << 12) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 20 >> 30 << 10) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 22 >> 30 << 8) | ((sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 26 >> 30) | (4 * (sdram->emc_pmacro_cmd_brick_ctrl_fdpd << 28 >> 30) | (sdram->emc_pmacro_cmd_brick_ctrl_fdpd & 3 | 4 * (pmc->scratch194 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl3 << 26 >> 30 << 22)) & 0xFCFFFFFF) & 0xF3FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl3 << 12 >> 30 << 26)) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch195 = (sdram->emc_pmacro_tx_sel_clk_src5 << 27 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src5 << 28 >> 31 << 30) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 10 >> 30 << 28) | (((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 14 >> 30 << 24) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 26 >> 30 << 22) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 28 >> 30 << 20) | ((sdram->emc_pmacro_perbit_rfu1_ctrl4 << 18) & 0xFFFFF | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 14 >> 30 << 16) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 16 >> 30 << 14) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 18 >> 30 << 12) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 20 >> 30 << 10) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 22 >> 30 << 8) | ((sdram->emc_pmacro_data_brick_ctrl_fdpd << 24 >> 30 << 6) | (16 * (sdram->emc_pmacro_data_brick_ctrl_fdpd << 26 >> 30) | (4 * (sdram->emc_pmacro_data_brick_ctrl_fdpd << 28 >> 30) | (sdram->emc_pmacro_data_brick_ctrl_fdpd & 3 | 4 * (pmc->scratch195 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFCF) & 0xFFFFFF3F) & 0xFFFFFCFF) & 0xFFFFF3FF) & 0xFFFFCFFF) & 0xFFFF3FFF) & 0xFFFCFFFF) & 0xFFF3FFFF) & 0xFFCFFFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xF3FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl4 << 12 >> 30 << 26)) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch196 = (sdram->emc_emem_arb_refpb_bank_ctrl >> 31 << 31) | (2 * ((sdram->emc_emem_arb_refpb_bank_ctrl << 17 >> 25 << 24) | ((sdram->emc_emem_arb_refpb_bank_ctrl << 17) & 0xFFFFFF | ((sdram->emc_dyn_self_ref_control >> 31 << 16) | (sdram->emc_dyn_self_ref_control & 0xFFFF | (pmc->scratch196 >> 16 << 16)) & 0xFFFEFFFF) & 0xFF01FFFF) & 0x80FFFFFF) >> 1);
-	pmc->scratch197 = (sdram->emc_pmacro_tx_sel_clk_src5 << 24 >> 31 << 31) | (2 * ((sdram->emc_pmacro_tx_sel_clk_src5 << 25 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 26 >> 31 << 29) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 10 >> 30 << 27) | (((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 14 >> 30 << 23) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 26 >> 30 << 21) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 28 >> 30 << 19) | ((sdram->emc_pmacro_perbit_rfu1_ctrl5 << 17) & 0x7FFFF | ((16 * sdram->emc_pmacro_cmd_pad_rx_ctrl >> 28 << 13) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 8 >> 31 << 12) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 9 >> 31 << 11) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 10 >> 31 << 10) | ((sdram->emc_pmacro_cmd_pad_rx_ctrl << 12 >> 28 << 6) | (32 * (sdram->emc_pmacro_cmd_pad_rx_ctrl << 16 >> 31) | (16 * (sdram->emc_pmacro_cmd_pad_rx_ctrl << 19 >> 31) | (4 * (sdram->emc_pmacro_cmd_pad_rx_ctrl << 26 >> 30) | (sdram->emc_pmacro_cmd_pad_rx_ctrl & 3 | 4 * (pmc->scratch197 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFC3F) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFE1FFF) & 0xFFF9FFFF) & 0xFFE7FFFF) & 0xFF9FFFFF) & 0xFE7FFFFF) & 0xF9FFFFFF | (sdram->emc_pmacro_perbit_rfu1_ctrl5 << 12 >> 30 << 25)) & 0xE7FFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch198 = (sdram->emc_pmacro_cmd_pad_tx_ctrl << 31) | (2 * ((32 * sdram->emc_pmacro_tx_sel_clk_src5 >> 31 << 30) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 6 >> 31 << 29) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 7 >> 31 << 28) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 8 >> 31 << 27) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 9 >> 31 << 26) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 10 >> 31 << 25) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 11 >> 31 << 24) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 12 >> 31 << 23) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 13 >> 31 << 22) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 14 >> 31 << 21) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 15 >> 31 << 20) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 21 >> 31 << 19) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 22 >> 31 << 18) | ((sdram->emc_pmacro_tx_sel_clk_src5 << 23 >> 31 << 17) | ((16 * sdram->emc_pmacro_data_pad_rx_ctrl >> 28 << 13) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 8 >> 31 << 12) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 9 >> 31 << 11) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 10 >> 31 << 10) | ((sdram->emc_pmacro_data_pad_rx_ctrl << 12 >> 28 << 6) | (32 * (sdram->emc_pmacro_data_pad_rx_ctrl << 16 >> 31) | (16 * (sdram->emc_pmacro_data_pad_rx_ctrl << 19 >> 31) | (4 * (sdram->emc_pmacro_data_pad_rx_ctrl << 26 >> 30) | (sdram->emc_pmacro_data_pad_rx_ctrl & 3 | 4 * (pmc->scratch198 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFC3F) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFE1FFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch199 = (8 * sdram->emc_cmd_q >> 27 << 27) | ((sdram->emc_cmd_q << 17 >> 29 << 24) | ((sdram->emc_cmd_q << 21 >> 29 << 21) | ((sdram->emc_cmd_q << 16) & 0x1FFFFF | (((u16)(sdram->emc_refresh) << 16 >> 22 << 6) | (sdram->emc_refresh & 0x3F | (pmc->scratch199 >> 6 << 6)) & 0xFFFF003F) & 0xFFE0FFFF) & 0xFF1FFFFF) & 0xF8FFFFFF) & 0x7FFFFFF;
-	pmc->scratch210 = (sdram->emc_auto_cal_vref_sel1 << 16 >> 31 << 31) | (2 * ((sdram->emc_auto_cal_vref_sel1 << 17 >> 25 << 24) | ((sdram->emc_auto_cal_vref_sel1 << 24 >> 31 << 23) | ((sdram->emc_auto_cal_vref_sel1 << 16) & 0x7FFFFF | (sdram->emc_acpd_control & 0xFFFF | (pmc->scratch210 >> 16 << 16)) & 0xFF80FFFF) & 0xFF7FFFFF) & 0x80FFFFFF) >> 1);
-	tmp = 8 * (sdram->emc_pmacro_auto_cal_cfg0 << 28 >> 31) | (4 * (sdram->emc_pmacro_auto_cal_cfg0 << 29 >> 31) | (2 * (sdram->emc_pmacro_auto_cal_cfg0 << 30 >> 31) | (sdram->emc_pmacro_auto_cal_cfg0 & 1 | 2 * (pmc->scratch211 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7;
-	tmp = (sdram->emc_pmacro_auto_cal_cfg1 << 7 >> 31 << 28) | ((sdram->emc_pmacro_auto_cal_cfg1 << 12 >> 31 << 27) | ((sdram->emc_pmacro_auto_cal_cfg1 << 13 >> 31 << 26) | ((sdram->emc_pmacro_auto_cal_cfg1 << 14 >> 31 << 25) | ((sdram->emc_pmacro_auto_cal_cfg1 << 15 >> 31 << 24) | ((sdram->emc_pmacro_auto_cal_cfg1 << 20 >> 31 << 23) | ((sdram->emc_pmacro_auto_cal_cfg1 << 21 >> 31 << 22) | ((sdram->emc_pmacro_auto_cal_cfg1 << 22 >> 31 << 21) | ((sdram->emc_pmacro_auto_cal_cfg1 << 23 >> 31 << 20) | ((sdram->emc_pmacro_auto_cal_cfg1 << 28 >> 31 << 19) | ((sdram->emc_pmacro_auto_cal_cfg1 << 29 >> 31 << 18) | ((sdram->emc_pmacro_auto_cal_cfg1 << 30 >> 31 << 17) | ((sdram->emc_pmacro_auto_cal_cfg1 << 16) & 0x1FFFF | ((16 * sdram->emc_pmacro_auto_cal_cfg0 >> 31 << 15) | ((32 * sdram->emc_pmacro_auto_cal_cfg0 >> 31 << 14) | ((sdram->emc_pmacro_auto_cal_cfg0 << 6 >> 31 << 13) | ((sdram->emc_pmacro_auto_cal_cfg0 << 7 >> 31 << 12) | ((sdram->emc_pmacro_auto_cal_cfg0 << 12 >> 31 << 11) | ((sdram->emc_pmacro_auto_cal_cfg0 << 13 >> 31 << 10) | ((sdram->emc_pmacro_auto_cal_cfg0 << 14 >> 31 << 9) | ((sdram->emc_pmacro_auto_cal_cfg0 << 15 >> 31 << 8) | ((sdram->emc_pmacro_auto_cal_cfg0 << 20 >> 31 << 7) | ((sdram->emc_pmacro_auto_cal_cfg0 << 21 >> 31 << 6) | (32 * (sdram->emc_pmacro_auto_cal_cfg0 << 22 >> 31) | (16 * (sdram->emc_pmacro_auto_cal_cfg0 << 23 >> 31) | tmp & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF;
-	pmc->scratch211 = (16 * sdram->emc_pmacro_auto_cal_cfg1 >> 31 << 31) | (2 * ((32 * sdram->emc_pmacro_auto_cal_cfg1 >> 31 << 30) | ((sdram->emc_pmacro_auto_cal_cfg1 << 6 >> 31 << 29) | tmp & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->scratch212 = (sdram->emc_xm2_comp_pad_ctrl3 << 8 >> 28 << 28) | ((sdram->emc_xm2_comp_pad_ctrl3 << 14 >> 31 << 27) | ((sdram->emc_xm2_comp_pad_ctrl3 << 15 >> 31 << 26) | ((sdram->emc_xm2_comp_pad_ctrl3 << 16 >> 30 << 24) | ((sdram->emc_xm2_comp_pad_ctrl3 << 18 >> 30 << 22) | ((sdram->emc_xm2_comp_pad_ctrl3 << 26 >> 28 << 18) | ((sdram->emc_xm2_comp_pad_ctrl3 << 16) & 0x3FFFF | ((16 * sdram->emc_pmacro_auto_cal_cfg2 >> 31 << 15) | ((32 * sdram->emc_pmacro_auto_cal_cfg2 >> 31 << 14) | ((sdram->emc_pmacro_auto_cal_cfg2 << 6 >> 31 << 13) | ((sdram->emc_pmacro_auto_cal_cfg2 << 7 >> 31 << 12) | ((sdram->emc_pmacro_auto_cal_cfg2 << 12 >> 31 << 11) | ((sdram->emc_pmacro_auto_cal_cfg2 << 13 >> 31 << 10) | ((sdram->emc_pmacro_auto_cal_cfg2 << 14 >> 31 << 9) | ((sdram->emc_pmacro_auto_cal_cfg2 << 15 >> 31 << 8) | ((sdram->emc_pmacro_auto_cal_cfg2 << 20 >> 31 << 7) | ((sdram->emc_pmacro_auto_cal_cfg2 << 21 >> 31 << 6) | (32 * (sdram->emc_pmacro_auto_cal_cfg2 << 22 >> 31) | (16 * (sdram->emc_pmacro_auto_cal_cfg2 << 23 >> 31) | (8 * (sdram->emc_pmacro_auto_cal_cfg2 << 28 >> 31) | (4 * (sdram->emc_pmacro_auto_cal_cfg2 << 29 >> 31) | (2 * (sdram->emc_pmacro_auto_cal_cfg2 << 30 >> 31) | (sdram->emc_pmacro_auto_cal_cfg2 & 1 | 2 * (pmc->scratch212 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFCFFFF) & 0xFFC3FFFF) & 0xFF3FFFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xFFFFFFF;
-	pmc->scratch213 = ((u16)(sdram->emc_prerefresh_req_cnt) << 16) | (u16)(sdram->emc_cfg_dig_dll_period);
-	pmc->scratch214 = (sdram->emc_pmacro_data_pi_ctrl << 10 >> 26 << 26) | ((sdram->emc_pmacro_data_pi_ctrl << 19 >> 31 << 25) | ((sdram->emc_pmacro_data_pi_ctrl << 20 >> 28 << 21) | ((sdram->emc_pmacro_data_pi_ctrl << 27 >> 31 << 20) | ((sdram->emc_pmacro_data_pi_ctrl << 16) & 0xFFFFF | ((sdram->emc_pmacro_ddll_bypass >> 31 << 15) | ((2 * sdram->emc_pmacro_ddll_bypass >> 31 << 14) | ((4 * sdram->emc_pmacro_ddll_bypass >> 31 << 13) | ((16 * sdram->emc_pmacro_ddll_bypass >> 31 << 12) | ((32 * sdram->emc_pmacro_ddll_bypass >> 31 << 11) | ((sdram->emc_pmacro_ddll_bypass << 6 >> 31 << 10) | ((sdram->emc_pmacro_ddll_bypass << 7 >> 31 << 9) | ((sdram->emc_pmacro_ddll_bypass << 15 >> 31 << 8) | ((sdram->emc_pmacro_ddll_bypass << 16 >> 31 << 7) | ((sdram->emc_pmacro_ddll_bypass << 17 >> 31 << 6) | (32 * (sdram->emc_pmacro_ddll_bypass << 18 >> 31) | (16 * (sdram->emc_pmacro_ddll_bypass << 20 >> 31) | (8 * (sdram->emc_pmacro_ddll_bypass << 21 >> 31) | (4 * (sdram->emc_pmacro_ddll_bypass << 22 >> 31) | (2 * (sdram->emc_pmacro_ddll_bypass << 23 >> 31) | (sdram->emc_pmacro_ddll_bypass & 1 | 2 * (pmc->scratch214 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFF0FFFF) & 0xFFEFFFFF) & 0xFE1FFFFF) & 0xFDFFFFFF) & 0x3FFFFFF;
-	pmc->scratch215 = (sdram->emc_pmacro_cmd_pi_ctrl << 10 >> 26 << 10) | ((sdram->emc_pmacro_cmd_pi_ctrl << 19 >> 31 << 9) | (32 * (sdram->emc_pmacro_cmd_pi_ctrl << 20 >> 28) | (16 * (sdram->emc_pmacro_cmd_pi_ctrl << 27 >> 31) | (sdram->emc_pmacro_cmd_pi_ctrl & 0xF | 16 * (pmc->scratch215 >> 4)) & 0xFFFFFFEF) & 0xFFFFFE1F) & 0xFFFFFDFF) & 0xFFFF03FF;
-	tmp = (sdram->emc_pmacro_data_pad_tx_ctrl << 7 >> 31 << 24) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 8 >> 31 << 23) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 9 >> 31 << 22) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 10 >> 31 << 21) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 15 >> 31 << 20) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 16 >> 31 << 19) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 21 >> 31 << 18) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 25 >> 31 << 17) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 26 >> 31 << 16) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 15) & 0xFFFF | ((2 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 14) | ((4 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 13) | ((8 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 12) | ((16 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 11) | ((32 * sdram->emc_pmacro_cmd_pad_tx_ctrl >> 31 << 10) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 6 >> 31 << 9) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 7 >> 31 << 8) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 8 >> 31 << 7) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 9 >> 31 << 6) | (32 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 10 >> 31) | (16 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 15 >> 31) | (8 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 16 >> 31) | (4 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 21 >> 31) | (2 * (sdram->emc_pmacro_cmd_pad_tx_ctrl << 25 >> 31) | ((sdram->emc_pmacro_cmd_pad_tx_ctrl << 26 >> 31) | 2 * (pmc->scratch216 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F) & 0xFFFFFEFF) & 0xFFFFFDFF) & 0xFFFFFBFF) & 0xFFFFF7FF) & 0xFFFFEFFF) & 0xFFFFDFFF) & 0xFFFFBFFF) & 0xFFFF7FFF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFFBFFFF) & 0xFFF7FFFF) & 0xFFEFFFFF) & 0xFFDFFFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF;
-	pmc->scratch9 = ((4 * pmc->scratch9) >> 2) | (sdram->emc_pin_gpio << 30);
-	pmc->scratch10 = ((4 * pmc->scratch10) >> 2) | (sdram->emc_pin_gpio_enable << 30);
-	pmc->scratch11 = ((4 * pmc->scratch11) >> 2) | (sdram->emc_dev_select << 30);
-	pmc->scratch12 = ((4 * pmc->scratch12) >> 2) | (sdram->emc_zcal_warm_cold_boot_enables << 30);
-	pmc->scratch13 = ((4 * pmc->scratch13) >> 2) | ((u16)(sdram->emc_cfg_dig_dll_period_warm_boot) << 30);
+	s32(emc_pmacro_perbit_rfu_ctrl0, scratch30);
+	s32(emc_pmacro_perbit_rfu_ctrl1, scratch31);
+	s32(emc_pmacro_perbit_rfu_ctrl2, scratch32);
+	s32(emc_pmacro_perbit_rfu_ctrl3, scratch33);
+	s32(emc_pmacro_perbit_rfu_ctrl4, scratch40);
+	s32(emc_pmacro_perbit_rfu_ctrl5, scratch42);
+	s32(mc_emem_arb_da_turns, scratch44);
+	s(emc_fbio_spare, 31:24, scratch64, 7:0);
+	s(emc_fbio_spare, 23:16, scratch64, 15:8);
+	s(emc_fbio_spare, 15:8, scratch64, 23:16);
+	s(emc_fbio_spare, 7:2, scratch64, 29:24);
+	s(emc_fbio_spare, 0:0, scratch64, 30:30);
+	s(mc_emem_arb_misc2, 0:0, scratch64, 31:31);
+	s(mc_emem_arb_misc0, 14:0, scratch65, 14:0);
+	s(mc_emem_arb_misc0, 30:16, scratch65, 29:15);
+	s(mc_da_cfg0, 0:0, scratch65, 30:30);
+	s(emc_fdpd_ctrl_cmd, 16:0, scratch66, 16:0);
+	s(emc_fdpd_ctrl_cmd, 31:20, scratch66, 28:17);
+	s(emc_auto_cal_config2, 27:0, scratch67, 27:0);
+	s(emc_burst_refresh_num, 3:0, scratch67, 31:28);
+	s(emc_cfg_dig_dll, 10:0, scratch68, 10:0);
+	s(emc_cfg_dig_dll, 25:12, scratch68, 24:11);
+	s(emc_cfg_dig_dll, 27:27, scratch68, 25:25);
+	s(emc_cfg_dig_dll, 31:30, scratch68, 27:26);
+	s(emc_tppd, 3:0, scratch68, 31:28);
+	s(emc_fdpd_ctrl_dq, 16:0, scratch69, 16:0);
+	s(emc_fdpd_ctrl_dq, 28:20, scratch69, 25:17);
+	s(emc_fdpd_ctrl_dq, 31:30, scratch69, 27:26);
+	s(emc_r2r, 3:0, scratch69, 31:28);
+	s(emc_pmacro_ib_vref_dq_0, 6:0, scratch70, 6:0);
+	s(emc_pmacro_ib_vref_dq_0, 14:8, scratch70, 13:7);
+	s(emc_pmacro_ib_vref_dq_0, 22:16, scratch70, 20:14);
+	s(emc_pmacro_ib_vref_dq_0, 30:24, scratch70, 27:21);
+	s(emc_w2w, 3:0, scratch70, 31:28);
+	s(emc_pmacro_ib_vref_dq_1, 6:0, scratch71, 6:0);
+	s(emc_pmacro_ib_vref_dq_1, 14:8, scratch71, 13:7);
+	s(emc_pmacro_ib_vref_dq_1, 22:16, scratch71, 20:14);
+	s(emc_pmacro_ib_vref_dq_1, 30:24, scratch71, 27:21);
+	s(emc_pmacro_vttgen_ctrl0, 19:16, scratch71, 31:28);
+	s(emc_pmacro_ib_vref_dqs_0, 6:0, scratch72, 6:0);
+	s(emc_pmacro_ib_vref_dqs_0, 14:8, scratch72, 13:7);
+	s(emc_pmacro_ib_vref_dqs_0, 22:16, scratch72, 20:14);
+	s(emc_pmacro_ib_vref_dqs_0, 30:24, scratch72, 27:21);
+	s(emc_pmacro_ib_vref_dqs_1, 6:0, scratch73, 6:0);
+	s(emc_pmacro_ib_vref_dqs_1, 14:8, scratch73, 13:7);
+	s(emc_pmacro_ib_vref_dqs_1, 22:16, scratch73, 20:14);
+	s(emc_pmacro_ib_vref_dqs_1, 30:24, scratch73, 27:21);
+	s(emc_pmacro_ddll_short_cmd_0, 6:0, scratch74, 6:0);
+	s(emc_pmacro_ddll_short_cmd_0, 14:8, scratch74, 13:7);
+	s(emc_pmacro_ddll_short_cmd_0, 22:16, scratch74, 20:14);
+	s(emc_pmacro_ddll_short_cmd_0, 30:24, scratch74, 27:21);
+	s(emc_pmacro_ddll_short_cmd_1, 6:0, scratch75, 6:0);
+	s(emc_pmacro_ddll_short_cmd_1, 14:8, scratch75, 13:7);
+	s(emc_pmacro_ddll_short_cmd_1, 22:16, scratch75, 20:14);
+	s(emc_pmacro_ddll_short_cmd_1, 30:24, scratch75, 27:21);
+	s(emc_dll_cfg0, 29:4, scratch76, 25:0);
+	s(emc_rp, 5:0, scratch76, 31:26);
+	s(emc_pmacro_tx_pwrd0, 10:0, scratch77, 10:0);
+	s(emc_pmacro_tx_pwrd0, 13:12, scratch77, 12:11);
+	s(emc_pmacro_tx_pwrd0, 26:16, scratch77, 23:13);
+	s(emc_pmacro_tx_pwrd0, 29:28, scratch77, 25:24);
+	s(emc_r2w, 5:0, scratch77, 31:26);
+	s(emc_pmacro_tx_pwrd1, 10:0, scratch78, 10:0);
+	s(emc_pmacro_tx_pwrd1, 13:12, scratch78, 12:11);
+	s(emc_pmacro_tx_pwrd1, 26:16, scratch78, 23:13);
+	s(emc_pmacro_tx_pwrd1, 29:28, scratch78, 25:24);
+	s(emc_w2r, 5:0, scratch78, 31:26);
+	s(emc_pmacro_tx_pwrd2, 10:0, scratch79, 10:0);
+	s(emc_pmacro_tx_pwrd2, 13:12, scratch79, 12:11);
+	s(emc_pmacro_tx_pwrd2, 26:16, scratch79, 23:13);
+	s(emc_pmacro_tx_pwrd2, 29:28, scratch79, 25:24);
+	s(emc_r2p, 5:0, scratch79, 31:26);
+	s(emc_pmacro_tx_pwrd3, 10:0, scratch80, 10:0);
+	s(emc_pmacro_tx_pwrd3, 13:12, scratch80, 12:11);
+	s(emc_pmacro_tx_pwrd3, 26:16, scratch80, 23:13);
+	s(emc_pmacro_tx_pwrd3, 29:28, scratch80, 25:24);
+	s(emc_ccdmw, 5:0, scratch80, 31:26);
+	s(emc_pmacro_tx_pwrd4, 10:0, scratch81, 10:0);
+	s(emc_pmacro_tx_pwrd4, 13:12, scratch81, 12:11);
+	s(emc_pmacro_tx_pwrd4, 26:16, scratch81, 23:13);
+	s(emc_pmacro_tx_pwrd4, 29:28, scratch81, 25:24);
+	s(emc_rd_rcd, 5:0, scratch81, 31:26);
+	s(emc_pmacro_tx_pwrd5, 10:0, scratch82, 10:0);
+	s(emc_pmacro_tx_pwrd5, 13:12, scratch82, 12:11);
+	s(emc_pmacro_tx_pwrd5, 26:16, scratch82, 23:13);
+	s(emc_pmacro_tx_pwrd5, 29:28, scratch82, 25:24);
+	s(emc_wr_rcd, 5:0, scratch82, 31:26);
+	s(emc_auto_cal_channel, 5:0, scratch83, 5:0);
+	s(emc_auto_cal_channel, 11:8, scratch83, 9:6);
+	s(emc_auto_cal_channel, 27:16, scratch83, 21:10);
+	s(emc_auto_cal_channel, 31:29, scratch83, 24:22);
+	s(emc_config_sample_delay, 6:0, scratch83, 31:25);
+	s(emc_pmacro_rx_term, 5:0, scratch84, 5:0);
+	s(emc_pmacro_rx_term, 13:8, scratch84, 11:6);
+	s(emc_pmacro_rx_term, 21:16, scratch84, 17:12);
+	s(emc_pmacro_rx_term, 29:24, scratch84, 23:18);
+	s(emc_sel_dpd_ctrl, 5:2, scratch84, 27:24);
+	s(emc_sel_dpd_ctrl, 8:8, scratch84, 28:28);
+	s(emc_sel_dpd_ctrl, 18:16, scratch84, 31:29);
+	s(emc_pmacro_dq_tx_drive, 5:0, scratch85, 5:0);
+	s(emc_pmacro_dq_tx_drive, 13:8, scratch85, 11:6);
+	s(emc_pmacro_dq_tx_drive, 21:16, scratch85, 17:12);
+	s(emc_pmacro_dq_tx_drive, 29:24, scratch85, 23:18);
+	s(emc_obdly, 5:0, scratch85, 29:24);
+	s(emc_obdly, 29:28, scratch85, 31:30);
+	s(emc_pmacro_ca_tx_drive, 5:0, scratch86, 5:0);
+	s(emc_pmacro_ca_tx_drive, 13:8, scratch86, 11:6);
+	s(emc_pmacro_ca_tx_drive, 21:16, scratch86, 17:12);
+	s(emc_pmacro_ca_tx_drive, 29:24, scratch86, 23:18);
+	s(emc_pmacro_vttgen_ctrl1, 15:10, scratch86, 29:24);
+	s(emc_pmacro_vttgen_ctrl1, 21:20, scratch86, 31:30);
+	s(emc_pmacro_zcrtl, 27:4, scratch87, 23:0);
+	s(emc_pmacro_vttgen_ctrl2, 23:16, scratch87, 31:24);
+	s(emc_zcal_interval, 23:10, scratch88, 13:0);
+	s(emc_zcal_interval, 9:0, scratch88, 23:14);
+	s(mc_emem_arb_timing_rc, 7:0, scratch88, 31:24);
+	s(emc_data_brlshft0, 23:0, scratch89, 23:0);
+	s(mc_emem_arb_rsv, 7:0, scratch89, 31:24);
+	s(emc_data_brlshft1, 23:0, scratch90, 23:0);
+	s(emc_dqs_brlshft0, 23:0, scratch91, 23:0);
+	s(emc_dqs_brlshft1, 23:0, scratch92, 23:0);
+	s(emc_swizzle_rank0_byte0, 2:0, scratch93, 2:0);
+	s(emc_swizzle_rank0_byte0, 6:4, scratch93, 5:3);
+	s(emc_swizzle_rank0_byte0, 10:8, scratch93, 8:6);
+	s(emc_swizzle_rank0_byte0, 14:12, scratch93, 11:9);
+	s(emc_swizzle_rank0_byte0, 18:16, scratch93, 14:12);
+	s(emc_swizzle_rank0_byte0, 22:20, scratch93, 17:15);
+	s(emc_swizzle_rank0_byte0, 26:24, scratch93, 20:18);
+	s(emc_swizzle_rank0_byte0, 30:28, scratch93, 23:21);
+	s(emc_swizzle_rank0_byte1, 2:0, scratch94, 2:0);
+	s(emc_swizzle_rank0_byte1, 6:4, scratch94, 5:3);
+	s(emc_swizzle_rank0_byte1, 10:8, scratch94, 8:6);
+	s(emc_swizzle_rank0_byte1, 14:12, scratch94, 11:9);
+	s(emc_swizzle_rank0_byte1, 18:16, scratch94, 14:12);
+	s(emc_swizzle_rank0_byte1, 22:20, scratch94, 17:15);
+	s(emc_swizzle_rank0_byte1, 26:24, scratch94, 20:18);
+	s(emc_swizzle_rank0_byte1, 30:28, scratch94, 23:21);
+	s(emc_ras, 6:0, scratch94, 30:24);
+	s(emc_cfg, 4:4, scratch94, 31:31);
+	s(emc_swizzle_rank0_byte2, 2:0, scratch95, 2:0);
+	s(emc_swizzle_rank0_byte2, 6:4, scratch95, 5:3);
+	s(emc_swizzle_rank0_byte2, 10:8, scratch95, 8:6);
+	s(emc_swizzle_rank0_byte2, 14:12, scratch95, 11:9);
+	s(emc_swizzle_rank0_byte2, 18:16, scratch95, 14:12);
+	s(emc_swizzle_rank0_byte2, 22:20, scratch95, 17:15);
+	s(emc_swizzle_rank0_byte2, 26:24, scratch95, 20:18);
+	s(emc_swizzle_rank0_byte2, 30:28, scratch95, 23:21);
+	s(emc_w2p, 6:0, scratch95, 30:24);
+	s(emc_cfg, 5:5, scratch95, 31:31);
+	s(emc_swizzle_rank0_byte3, 2:0, scratch96, 2:0);
+	s(emc_swizzle_rank0_byte3, 6:4, scratch96, 5:3);
+	s(emc_swizzle_rank0_byte3, 10:8, scratch96, 8:6);
+	s(emc_swizzle_rank0_byte3, 14:12, scratch96, 11:9);
+	s(emc_swizzle_rank0_byte3, 18:16, scratch96, 14:12);
+	s(emc_swizzle_rank0_byte3, 22:20, scratch96, 17:15);
+	s(emc_swizzle_rank0_byte3, 26:24, scratch96, 20:18);
+	s(emc_swizzle_rank0_byte3, 30:28, scratch96, 23:21);
+	s(emc_qsafe, 6:0, scratch96, 30:24);
+	s(emc_cfg, 6:6, scratch96, 31:31);
+	s(emc_swizzle_rank1_byte0, 2:0, scratch97, 2:0);
+	s(emc_swizzle_rank1_byte0, 6:4, scratch97, 5:3);
+	s(emc_swizzle_rank1_byte0, 10:8, scratch97, 8:6);
+	s(emc_swizzle_rank1_byte0, 14:12, scratch97, 11:9);
+	s(emc_swizzle_rank1_byte0, 18:16, scratch97, 14:12);
+	s(emc_swizzle_rank1_byte0, 22:20, scratch97, 17:15);
+	s(emc_swizzle_rank1_byte0, 26:24, scratch97, 20:18);
+	s(emc_swizzle_rank1_byte0, 30:28, scratch97, 23:21);
+	s(emc_rdv, 6:0, scratch97, 30:24);
+	s(emc_cfg, 7:7, scratch97, 31:31);
+	s(emc_swizzle_rank1_byte1, 2:0, scratch98, 2:0);
+	s(emc_swizzle_rank1_byte1, 6:4, scratch98, 5:3);
+	s(emc_swizzle_rank1_byte1, 10:8, scratch98, 8:6);
+	s(emc_swizzle_rank1_byte1, 14:12, scratch98, 11:9);
+	s(emc_swizzle_rank1_byte1, 18:16, scratch98, 14:12);
+	s(emc_swizzle_rank1_byte1, 22:20, scratch98, 17:15);
+	s(emc_swizzle_rank1_byte1, 26:24, scratch98, 20:18);
+	s(emc_swizzle_rank1_byte1, 30:28, scratch98, 23:21);
+	s(emc_rw2pden, 6:0, scratch98, 30:24);
+	s(emc_cfg, 8:8, scratch98, 31:31);
+	s(emc_swizzle_rank1_byte2, 2:0, scratch99, 2:0);
+	s(emc_swizzle_rank1_byte2, 6:4, scratch99, 5:3);
+	s(emc_swizzle_rank1_byte2, 10:8, scratch99, 8:6);
+	s(emc_swizzle_rank1_byte2, 14:12, scratch99, 11:9);
+	s(emc_swizzle_rank1_byte2, 18:16, scratch99, 14:12);
+	s(emc_swizzle_rank1_byte2, 22:20, scratch99, 17:15);
+	s(emc_swizzle_rank1_byte2, 26:24, scratch99, 20:18);
+	s(emc_swizzle_rank1_byte2, 30:28, scratch99, 23:21);
+	s(emc_tfaw, 6:0, scratch99, 30:24);
+	s(emc_cfg, 9:9, scratch99, 31:31);
+	s(emc_swizzle_rank1_byte3, 2:0, scratch100, 2:0);
+	s(emc_swizzle_rank1_byte3, 6:4, scratch100, 5:3);
+	s(emc_swizzle_rank1_byte3, 10:8, scratch100, 8:6);
+	s(emc_swizzle_rank1_byte3, 14:12, scratch100, 11:9);
+	s(emc_swizzle_rank1_byte3, 18:16, scratch100, 14:12);
+	s(emc_swizzle_rank1_byte3, 22:20, scratch100, 17:15);
+	s(emc_swizzle_rank1_byte3, 26:24, scratch100, 20:18);
+	s(emc_swizzle_rank1_byte3, 30:28, scratch100, 23:21);
+	s(emc_tclkstable, 6:0, scratch100, 30:24);
+	s(emc_cfg, 18:18, scratch100, 31:31);
+	s(emc_cfg_pipe2, 11:0, scratch101, 11:0);
+	s(emc_cfg_pipe2, 27:16, scratch101, 23:12);
+	s(emc_trtm, 6:0, scratch101, 30:24);
+	s(emc_cfg, 21:21, scratch101, 31:31);
+	s(emc_cfg_pipe1, 11:0, scratch102, 11:0);
+	s(emc_cfg_pipe1, 27:16, scratch102, 23:12);
+	s(emc_twtm, 6:0, scratch102, 30:24);
+	s(emc_cfg, 22:22, scratch102, 31:31);
+	s(emc_pmacro_ddll_pwrd0, 4:1, scratch103, 3:0);
+	s(emc_pmacro_ddll_pwrd0, 7:6, scratch103, 5:4);
+	s(emc_pmacro_ddll_pwrd0, 12:9, scratch103, 9:6);
+	s(emc_pmacro_ddll_pwrd0, 15:14, scratch103, 11:10);
+	s(emc_pmacro_ddll_pwrd0, 20:17, scratch103, 15:12);
+	s(emc_pmacro_ddll_pwrd0, 23:22, scratch103, 17:16);
+	s(emc_pmacro_ddll_pwrd0, 28:25, scratch103, 21:18);
+	s(emc_pmacro_ddll_pwrd0, 31:30, scratch103, 23:22);
+	s(emc_tratm, 6:0, scratch103, 30:24);
+	s(emc_cfg, 23:23, scratch103, 31:31);
+	s(emc_pmacro_ddll_pwrd1, 4:1, scratch104, 3:0);
+	s(emc_pmacro_ddll_pwrd1, 7:6, scratch104, 5:4);
+	s(emc_pmacro_ddll_pwrd1, 12:9, scratch104, 9:6);
+	s(emc_pmacro_ddll_pwrd1, 15:14, scratch104, 11:10);
+	s(emc_pmacro_ddll_pwrd1, 20:17, scratch104, 15:12);
+	s(emc_pmacro_ddll_pwrd1, 23:22, scratch104, 17:16);
+	s(emc_pmacro_ddll_pwrd1, 28:25, scratch104, 21:18);
+	s(emc_pmacro_ddll_pwrd1, 31:30, scratch104, 23:22);
+	s(emc_twatm, 6:0, scratch104, 30:24);
+	s(emc_cfg, 24:24, scratch104, 31:31);
+	s(emc_pmacro_ddll_pwrd2, 4:1, scratch105, 3:0);
+	s(emc_pmacro_ddll_pwrd2, 7:6, scratch105, 5:4);
+	s(emc_pmacro_ddll_pwrd2, 12:9, scratch105, 9:6);
+	s(emc_pmacro_ddll_pwrd2, 15:14, scratch105, 11:10);
+	s(emc_pmacro_ddll_pwrd2, 20:17, scratch105, 15:12);
+	s(emc_pmacro_ddll_pwrd2, 23:22, scratch105, 17:16);
+	s(emc_pmacro_ddll_pwrd2, 28:25, scratch105, 21:18);
+	s(emc_pmacro_ddll_pwrd2, 31:30, scratch105, 23:22);
+	s(emc_tr2ref, 6:0, scratch105, 30:24);
+	s(emc_cfg, 25:25, scratch105, 31:31);
+	s(emc_pmacro_ddll_periodic_offset, 5:0, scratch106, 5:0);
+	s(emc_pmacro_ddll_periodic_offset, 16:8, scratch106, 14:6);
+	s(emc_pmacro_ddll_periodic_offset, 28:20, scratch106, 23:15);
+	s(emc_pdex2mrr, 6:0, scratch106, 30:24);
+	s(emc_cfg, 26:26, scratch106, 31:31);
+	s(mc_emem_arb_da_covers, 23:0, scratch107, 23:0);
+	s(emc_clken_override, 3:1, scratch107, 26:24);
+	s(emc_clken_override, 8:6, scratch107, 29:27);
+	s(emc_clken_override, 16:16, scratch107, 30:30);
+	s(emc_cfg, 28:28, scratch107, 31:31);
+	s(emc_xm2_comp_pad_ctrl, 1:0, scratch108, 1:0);
+	s(emc_xm2_comp_pad_ctrl, 6:4, scratch108, 4:2);
+	s(emc_xm2_comp_pad_ctrl, 9:9, scratch108, 5:5);
+	s(emc_xm2_comp_pad_ctrl, 19:11, scratch108, 14:6);
+	s(emc_xm2_comp_pad_ctrl, 31:24, scratch108, 22:15);
+	s(emc_rfc_pb, 8:0, scratch108, 31:23);
+	s(emc_auto_cal_config3, 6:0, scratch109, 6:0);
+	s(emc_auto_cal_config3, 14:8, scratch109, 13:7);
+	s(emc_auto_cal_config3, 23:16, scratch109, 21:14);
+	s(emc_cfg_update, 2:0, scratch109, 24:22);
+	s(emc_cfg_update, 10:8, scratch109, 27:25);
+	s(emc_cfg_update, 31:28, scratch109, 31:28);
+	s(emc_auto_cal_config4, 6:0, scratch110, 6:0);
+	s(emc_auto_cal_config4, 14:8, scratch110, 13:7);
+	s(emc_auto_cal_config4, 23:16, scratch110, 21:14);
+	s(emc_rfc, 9:0, scratch110, 31:22);
+	s(emc_auto_cal_config5, 6:0, scratch111, 6:0);
+	s(emc_auto_cal_config5, 14:8, scratch111, 13:7);
+	s(emc_auto_cal_config5, 23:16, scratch111, 21:14);
+	s(emc_txsr, 9:0, scratch111, 31:22);
+	s(emc_auto_cal_config6, 6:0, scratch112, 6:0);
+	s(emc_auto_cal_config6, 14:8, scratch112, 13:7);
+	s(emc_auto_cal_config6, 23:16, scratch112, 21:14);
+	s(emc_mc2emc_q, 2:0, scratch112, 24:22);
+	s(emc_mc2emc_q, 10:8, scratch112, 27:25);
+	s(emc_mc2emc_q, 27:24, scratch112, 31:28);
+	s(emc_auto_cal_config7, 6:0, scratch113, 6:0);
+	s(emc_auto_cal_config7, 14:8, scratch113, 13:7);
+	s(emc_auto_cal_config7, 23:16, scratch113, 21:14);
+	s(mc_emem_arb_ring1_throttle, 4:0, scratch113, 26:22);
+	s(mc_emem_arb_ring1_throttle, 20:16, scratch113, 31:27);
+	s(emc_auto_cal_config8, 6:0, scratch114, 6:0);
+	s(emc_auto_cal_config8, 14:8, scratch114, 13:7);
+	s(emc_auto_cal_config8, 23:16, scratch114, 21:14);
+	s(emc_fbio_cfg7, 21:0, scratch115, 21:0);
+	s(emc_ar2pden, 8:0, scratch115, 30:22);
+	s(emc_cfg, 29:29, scratch115, 31:31);
+	s(emc_pmacro_quse_ddll_rank0_0, 10:0, scratch123, 10:0);
+	s(emc_pmacro_quse_ddll_rank0_0, 26:16, scratch123, 21:11);
+	s(emc_rfc_slr, 8:0, scratch123, 30:22);
+	s(emc_cfg, 30:30, scratch123, 31:31);
+	s(emc_pmacro_quse_ddll_rank0_1, 10:0, scratch124, 10:0);
+	s(emc_pmacro_quse_ddll_rank0_1, 26:16, scratch124, 21:11);
+	s(emc_ibdly, 6:0, scratch124, 28:22);
+	s(emc_ibdly, 29:28, scratch124, 30:29);
+	s(emc_cfg, 31:31, scratch124, 31:31);
+	s(emc_pmacro_quse_ddll_rank0_2, 10:0, scratch125, 10:0);
+	s(emc_pmacro_quse_ddll_rank0_2, 26:16, scratch125, 21:11);
+	s(mc_emem_arb_timing_rfcpb, 8:0, scratch125, 30:22);
+	s(emc_fbio_cfg5, 4:4, scratch125, 31:31);
+	s(emc_pmacro_quse_ddll_rank0_3, 10:0, scratch126, 10:0);
+	s(emc_pmacro_quse_ddll_rank0_3, 26:16, scratch126, 21:11);
+	s(emc_auto_cal_config9, 6:0, scratch126, 28:22);
+	s(emc_fbio_cfg5, 15:13, scratch126, 31:29);
+	s(emc_pmacro_quse_ddll_rank0_4, 10:0, scratch127, 10:0);
+	s(emc_pmacro_quse_ddll_rank0_4, 26:16, scratch127, 21:11);
+	s(emc_rdv_mask, 6:0, scratch127, 28:22);
+	s(emc_cfg2, 5:3, scratch127, 31:29);
+	s(emc_pmacro_quse_ddll_rank0_5, 10:0, scratch128, 10:0);
+	s(emc_pmacro_quse_ddll_rank0_5, 26:16, scratch128, 21:11);
+	s(emc_rdv_early_mask, 6:0, scratch128, 28:22);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 4:2, scratch128, 31:29);
+	s(emc_pmacro_quse_ddll_rank1_0, 10:0, scratch129, 10:0);
+	s(emc_pmacro_quse_ddll_rank1_0, 26:16, scratch129, 21:11);
+	s(emc_rdv_early, 6:0, scratch129, 28:22);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 9:7, scratch129, 31:29);
+	s(emc_pmacro_quse_ddll_rank1_1, 10:0, scratch130, 10:0);
+	s(emc_pmacro_quse_ddll_rank1_1, 26:16, scratch130, 21:11);
+	s(emc_quse_width, 4:0, scratch130, 26:22);
+	s(emc_quse_width, 29:28, scratch130, 28:27);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 14:12, scratch130, 31:29);
+	s(emc_pmacro_quse_ddll_rank1_2, 10:0, scratch131, 10:0);
+	s(emc_pmacro_quse_ddll_rank1_2, 26:16, scratch131, 21:11);
+	s(emc_pmacro_ddll_short_cmd_2, 6:0, scratch131, 28:22);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 19:17, scratch131, 31:29);
+	s(emc_pmacro_quse_ddll_rank1_3, 10:0, scratch132, 10:0);
+	s(emc_pmacro_quse_ddll_rank1_3, 26:16, scratch132, 21:11);
+	s(emc_pmacro_cmd_rx_term_mode, 1:0, scratch132, 23:22);
+	s(emc_pmacro_cmd_rx_term_mode, 5:4, scratch132, 25:24);
+	s(emc_pmacro_cmd_rx_term_mode, 9:8, scratch132, 27:26);
+	s(emc_pmacro_cmd_rx_term_mode, 13:13, scratch132, 28:28);
+	s(emc_pmacro_data_pad_tx_ctrl, 4:2, scratch132, 31:29);
+	s(emc_pmacro_quse_ddll_rank1_4, 10:0, scratch133, 10:0);
+	s(emc_pmacro_quse_ddll_rank1_4, 26:16, scratch133, 21:11);
+	s(emc_pmacro_data_rx_term_mode, 1:0, scratch133, 23:22);
+	s(emc_pmacro_data_rx_term_mode, 5:4, scratch133, 25:24);
+	s(emc_pmacro_data_rx_term_mode, 9:8, scratch133, 27:26);
+	s(emc_pmacro_data_rx_term_mode, 13:13, scratch133, 28:28);
+	s(emc_pmacro_data_pad_tx_ctrl, 9:7, scratch133, 31:29);
+	s(emc_pmacro_quse_ddll_rank1_5, 10:0, scratch134, 10:0);
+	s(emc_pmacro_quse_ddll_rank1_5, 26:16, scratch134, 21:11);
+	s(mc_emem_arb_timing_rp, 6:0, scratch134, 28:22);
+	s(emc_pmacro_data_pad_tx_ctrl, 14:12, scratch134, 31:29);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_0, 10:0, scratch135, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_0, 26:16, scratch135, 21:11);
+	s(mc_emem_arb_timing_ras, 6:0, scratch135, 28:22);
+	s(emc_pmacro_data_pad_tx_ctrl, 19:17, scratch135, 31:29);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_1, 10:0, scratch136, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_1, 26:16, scratch136, 21:11);
+	s(mc_emem_arb_timing_faw, 6:0, scratch136, 28:22);
+	s(emc_cfg, 17:16, scratch136, 30:29);
+	s(emc_fbio_cfg5, 8:8, scratch136, 31:31);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_2, 10:0, scratch137, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_2, 26:16, scratch137, 21:11);
+	s(mc_emem_arb_timing_rap2pre, 6:0, scratch137, 28:22);
+	s(emc_fbio_cfg5, 1:0, scratch137, 30:29);
+	s(emc_fbio_cfg5, 10:10, scratch137, 31:31);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_3, 10:0, scratch138, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_3, 26:16, scratch138, 21:11);
+	s(mc_emem_arb_timing_wap2pre, 6:0, scratch138, 28:22);
+	s(emc_fbio_cfg5, 3:2, scratch138, 30:29);
+	s(emc_fbio_cfg5, 12:12, scratch138, 31:31);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_4, 10:0, scratch139, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_4, 26:16, scratch139, 21:11);
+	s(mc_emem_arb_timing_r2w, 6:0, scratch139, 28:22);
+	s(emc_cfg2, 27:26, scratch139, 30:29);
+	s(emc_fbio_cfg5, 24:24, scratch139, 31:31);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_5, 10:0, scratch140, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank0_5, 26:16, scratch140, 21:11);
+	s(mc_emem_arb_timing_w2r, 6:0, scratch140, 28:22);
+	s(emc_fbio_cfg5, 27:25, scratch140, 31:29);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_0, 10:0, scratch141, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_0, 26:16, scratch141, 21:11);
+	s(emc_wdv, 5:0, scratch141, 27:22);
+	s(emc_fbio_cfg5, 23:20, scratch141, 31:28);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_1, 10:0, scratch142, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_1, 26:16, scratch142, 21:11);
+	s(emc_quse, 5:0, scratch142, 27:22);
+	s(emc_fbio_cfg5, 28:28, scratch142, 28:28);
+	s(emc_fbio_cfg5, 31:30, scratch142, 30:29);
+	s(emc_cfg2, 0:0, scratch142, 31:31);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_2, 10:0, scratch143, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_2, 26:16, scratch143, 21:11);
+	s(emc_pdex2wr, 5:0, scratch143, 27:22);
+	s(emc_cfg2, 2:1, scratch143, 29:28);
+	s(emc_cfg2, 7:7, scratch143, 30:30);
+	s(emc_cfg2, 10:10, scratch143, 31:31);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_3, 10:0, scratch144, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_3, 26:16, scratch144, 21:11);
+	s(emc_pdex2rd, 5:0, scratch144, 27:22);
+	s(emc_cfg2, 11:11, scratch144, 28:28);
+	s(emc_cfg2, 16:14, scratch144, 31:29);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_4, 10:0, scratch145, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_4, 26:16, scratch145, 21:11);
+	s(emc_pdex2che, 5:0, scratch145, 27:22);
+	s(emc_cfg2, 20:20, scratch145, 28:28);
+	s(emc_cfg2, 24:22, scratch145, 31:29);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_5, 10:0, scratch146, 10:0);
+	s(emc_pmacro_ob_ddll_long_dq_rank1_5, 26:16, scratch146, 21:11);
+	s(emc_pchg2pden, 5:0, scratch146, 27:22);
+	s(emc_cfg2, 25:25, scratch146, 28:28);
+	s(emc_cfg2, 30:28, scratch146, 31:29);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_0, 10:0, scratch147, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_0, 26:16, scratch147, 21:11);
+	s(emc_act2pden, 5:0, scratch147, 27:22);
+	s(emc_cfg2, 31:31, scratch147, 28:28);
+	s(emc_cfg_pipe, 2:0, scratch147, 31:29);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_1, 10:0, scratch148, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_1, 26:16, scratch148, 21:11);
+	s(emc_cke2pden, 5:0, scratch148, 27:22);
+	s(emc_cfg_pipe, 6:3, scratch148, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_2, 10:0, scratch149, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_2, 26:16, scratch149, 21:11);
+	s(emc_tcke, 5:0, scratch149, 27:22);
+	s(emc_cfg_pipe, 10:7, scratch149, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_3, 10:0, scratch150, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_3, 26:16, scratch150, 21:11);
+	s(emc_trpab, 5:0, scratch150, 27:22);
+	s(emc_cfg_pipe, 11:11, scratch150, 28:28);
+	s(emc_cfg_pipe, 18:16, scratch150, 31:29);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_4, 10:0, scratch151, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_4, 26:16, scratch151, 21:11);
+	s(emc_einput, 5:0, scratch151, 27:22);
+	s(emc_cfg_pipe, 22:19, scratch151, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_5, 10:0, scratch152, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank0_5, 26:16, scratch152, 21:11);
+	s(emc_einput_duration, 5:0, scratch152, 27:22);
+	s(emc_cfg_pipe, 26:23, scratch152, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_0, 10:0, scratch153, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_0, 26:16, scratch153, 21:11);
+	s(emc_puterm_extra, 5:0, scratch153, 27:22);
+	s(emc_cfg_pipe, 27:27, scratch153, 28:28);
+	s(emc_pmacro_tx_sel_clk_src0, 2:0, scratch153, 31:29);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_1, 10:0, scratch154, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_1, 26:16, scratch154, 21:11);
+	s(emc_tckesr, 5:0, scratch154, 27:22);
+	s(emc_pmacro_tx_sel_clk_src0, 6:3, scratch154, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_2, 10:0, scratch155, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_2, 26:16, scratch155, 21:11);
+	s(emc_tpd, 5:0, scratch155, 27:22);
+	s(emc_pmacro_tx_sel_clk_src0, 10:7, scratch155, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_3, 10:0, scratch156, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_3, 26:16, scratch156, 21:11);
+	s(emc_wdv_mask, 5:0, scratch156, 27:22);
+	s(emc_pmacro_tx_sel_clk_src0, 19:16, scratch156, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_4, 10:0, scratch157, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_4, 26:16, scratch157, 21:11);
+	s(emc_wdv_chk, 5:0, scratch157, 27:22);
+	s(emc_pmacro_tx_sel_clk_src0, 23:20, scratch157, 31:28);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_5, 10:0, scratch158, 10:0);
+	s(emc_pmacro_ob_ddll_long_dqs_rank1_5, 26:16, scratch158, 21:11);
+	s(emc_cmd_brlshft0, 5:0, scratch158, 27:22);
+	s(emc_pmacro_tx_sel_clk_src0, 26:24, scratch158, 30:28);
+	s(emc_pmacro_tx_sel_clk_src1, 0:0, scratch158, 31:31);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_0, 10:0, scratch159, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_0, 26:16, scratch159, 21:11);
+	s(emc_cmd_brlshft1, 5:0, scratch159, 27:22);
+	s(emc_pmacro_tx_sel_clk_src1, 4:1, scratch159, 31:28);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_1, 10:0, scratch160, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_1, 26:16, scratch160, 21:11);
+	s(emc_cmd_brlshft2, 5:0, scratch160, 27:22);
+	s(emc_pmacro_tx_sel_clk_src1, 8:5, scratch160, 31:28);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_2, 10:0, scratch161, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_2, 26:16, scratch161, 21:11);
+	s(emc_cmd_brlshft3, 5:0, scratch161, 27:22);
+	s(emc_pmacro_tx_sel_clk_src1, 10:9, scratch161, 29:28);
+	s(emc_pmacro_tx_sel_clk_src1, 17:16, scratch161, 31:30);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_3, 10:0, scratch162, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank0_3, 26:16, scratch162, 21:11);
+	s(emc_wev, 5:0, scratch162, 27:22);
+	s(emc_pmacro_tx_sel_clk_src1, 21:18, scratch162, 31:28);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_0, 10:0, scratch163, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_0, 26:16, scratch163, 21:11);
+	s(emc_wsv, 5:0, scratch163, 27:22);
+	s(emc_pmacro_tx_sel_clk_src1, 25:22, scratch163, 31:28);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_1, 10:0, scratch164, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_1, 26:16, scratch164, 21:11);
+	s(emc_cfg3, 2:0, scratch164, 24:22);
+	s(emc_cfg3, 6:4, scratch164, 27:25);
+	s(emc_pmacro_tx_sel_clk_src1, 26:26, scratch164, 28:28);
+	s(emc_pmacro_tx_sel_clk_src3, 2:0, scratch164, 31:29);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_2, 10:0, scratch165, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_2, 26:16, scratch165, 21:11);
+	s(emc_puterm_width, 31:31, scratch165, 22:22);
+	s(emc_puterm_width, 4:0, scratch165, 27:23);
+	s(emc_pmacro_tx_sel_clk_src3, 6:3, scratch165, 31:28);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_3, 10:0, scratch166, 10:0);
+	s(emc_pmacro_ib_ddll_long_dqs_rank1_3, 26:16, scratch166, 21:11);
+	s(mc_emem_arb_timing_rcd, 5:0, scratch166, 27:22);
+	s(emc_pmacro_tx_sel_clk_src3, 10:7, scratch166, 31:28);
+	s(emc_pmacro_ddll_long_cmd_0, 10:0, scratch167, 10:0);
+	s(emc_pmacro_ddll_long_cmd_0, 26:16, scratch167, 21:11);
+	s(mc_emem_arb_timing_ccdmw, 5:0, scratch167, 27:22);
+	s(emc_pmacro_tx_sel_clk_src3, 19:16, scratch167, 31:28);
+	s(emc_pmacro_ddll_long_cmd_1, 10:0, scratch168, 10:0);
+	s(emc_pmacro_ddll_long_cmd_1, 26:16, scratch168, 21:11);
+	s(mc_emem_arb_override, 27:27, scratch168, 22:22);
+	s(mc_emem_arb_override, 26:26, scratch168, 23:23);
+	s(mc_emem_arb_override, 16:16, scratch168, 24:24);
+	s(mc_emem_arb_override, 10:10, scratch168, 25:25);
+	s(mc_emem_arb_override, 4:4, scratch168, 26:26);
+	s(mc_emem_arb_override, 3:3, scratch168, 27:27);
+	s(emc_pmacro_tx_sel_clk_src3, 23:20, scratch168, 31:28);
+	s(emc_pmacro_ddll_long_cmd_2, 10:0, scratch169, 10:0);
+	s(emc_pmacro_ddll_long_cmd_2, 26:16, scratch169, 21:11);
+	s(emc_rrd, 4:0, scratch169, 26:22);
+	s(emc_rext, 4:0, scratch169, 31:27);
+	s(emc_pmacro_ddll_long_cmd_3, 10:0, scratch170, 10:0);
+	s(emc_pmacro_ddll_long_cmd_3, 26:16, scratch170, 21:11);
+	s(emc_tclkstop, 4:0, scratch170, 26:22);
+	s(emc_wext, 4:0, scratch170, 31:27);
+	s(emc_pmacro_perbit_fgcg_ctrl0, 10:0, scratch171, 10:0);
+	s(emc_pmacro_perbit_fgcg_ctrl0, 26:16, scratch171, 21:11);
+	s(emc_ref_ctrl2, 0:0, scratch171, 22:22);
+	s(emc_ref_ctrl2, 26:24, scratch171, 25:23);
+	s(emc_ref_ctrl2, 31:31, scratch171, 26:26);
+	s(emc_we_duration, 4:0, scratch171, 31:27);
+	s(emc_pmacro_perbit_fgcg_ctrl1, 10:0, scratch172, 10:0);
+	s(emc_pmacro_perbit_fgcg_ctrl1, 26:16, scratch172, 21:11);
+	s(emc_ws_duration, 4:0, scratch172, 26:22);
+	s(emc_pmacro_pad_cfg_ctrl, 0:0, scratch172, 27:27);
+	s(emc_pmacro_pad_cfg_ctrl, 9:9, scratch172, 28:28);
+	s(emc_pmacro_pad_cfg_ctrl, 13:13, scratch172, 29:29);
+	s(emc_pmacro_pad_cfg_ctrl, 17:16, scratch172, 31:30);
+	s(emc_pmacro_perbit_fgcg_ctrl2, 10:0, scratch173, 10:0);
+	s(emc_pmacro_perbit_fgcg_ctrl2, 26:16, scratch173, 21:11);
+	s(mc_emem_arb_timing_rrd, 4:0, scratch173, 26:22);
+	s(mc_emem_arb_timing_r2r, 4:0, scratch173, 31:27);
+	s(emc_pmacro_perbit_fgcg_ctrl3, 10:0, scratch174, 10:0);
+	s(emc_pmacro_perbit_fgcg_ctrl3, 26:16, scratch174, 21:11);
+	s(mc_emem_arb_timing_w2w, 4:0, scratch174, 26:22);
+	s(emc_pmacro_tx_sel_clk_src3, 26:24, scratch174, 29:27);
+	s(emc_pmacro_tx_sel_clk_src2, 1:0, scratch174, 31:30);
+	s(emc_pmacro_perbit_fgcg_ctrl4, 10:0, scratch175, 10:0);
+	s(emc_pmacro_perbit_fgcg_ctrl4, 26:16, scratch175, 21:11);
+	s(emc_pmacro_tx_sel_clk_src2, 10:2, scratch175, 30:22);
+	s(emc_pmacro_tx_sel_clk_src2, 16:16, scratch175, 31:31);
+	s(emc_pmacro_perbit_fgcg_ctrl5, 10:0, scratch176, 10:0);
+	s(emc_pmacro_perbit_fgcg_ctrl5, 26:16, scratch176, 21:11);
+	s(emc_pmacro_tx_sel_clk_src2, 26:17, scratch176, 31:22);
+	s(mc_emem_arb_cfg, 8:0, scratch177, 8:0);
+	s(mc_emem_arb_cfg, 20:16, scratch177, 13:9);
+	s(mc_emem_arb_cfg, 31:24, scratch177, 21:14);
+	s(emc_pmacro_tx_sel_clk_src4, 9:0, scratch177, 31:22);
+	s(mc_emem_arb_misc1, 12:0, scratch178, 12:0);
+	s(mc_emem_arb_misc1, 25:21, scratch178, 17:13);
+	s(mc_emem_arb_misc1, 31:28, scratch178, 21:18);
+	s(emc_pmacro_tx_sel_clk_src4, 10:10, scratch178, 22:22);
+	s(emc_pmacro_tx_sel_clk_src4, 24:16, scratch178, 31:23);
+	s(emc_mrs_wait_cnt2, 9:0, scratch179, 9:0);
+	s(emc_mrs_wait_cnt2, 26:16, scratch179, 20:10);
+	s(emc_odt_write, 5:0, scratch179, 26:21);
+	s(emc_odt_write, 11:8, scratch179, 30:27);
+	s(emc_odt_write, 31:31, scratch179, 31:31);
+	s(emc_mrs_wait_cnt, 9:0, scratch180, 9:0);
+	s(emc_mrs_wait_cnt, 26:16, scratch180, 20:10);
+	s(emc_pmacro_ib_rxrt, 10:0, scratch180, 31:21);
+	s(emc_auto_cal_interval, 20:0, scratch181, 20:0);
+	s(emc_pmacro_ddll_long_cmd_4, 10:0, scratch181, 31:21);
+	s(emc_emem_arb_refpb_hp_ctrl, 6:0, scratch182, 6:0);
+	s(emc_emem_arb_refpb_hp_ctrl, 14:8, scratch182, 13:7);
+	s(emc_emem_arb_refpb_hp_ctrl, 22:16, scratch182, 20:14);
+	s(mc_emem_arb_outstanding_req, 8:0, scratch182, 29:21);
+	s(mc_emem_arb_outstanding_req, 31:30, scratch182, 31:30);
+	s(emc_xm2_comp_pad_ctrl2, 5:0, scratch183, 5:0);
+	s(emc_xm2_comp_pad_ctrl2, 17:12, scratch183, 11:6);
+	s(emc_xm2_comp_pad_ctrl2, 21:20, scratch183, 13:12);
+	s(emc_xm2_comp_pad_ctrl2, 29:24, scratch183, 19:14);
+	s(emc_pmacro_cmd_ctrl0, 0:0, scratch183, 20:20);
+	s(emc_pmacro_cmd_ctrl0, 5:4, scratch183, 22:21);
+	s(emc_pmacro_cmd_ctrl0, 8:8, scratch183, 23:23);
+	s(emc_pmacro_cmd_ctrl0, 13:12, scratch183, 25:24);
+	s(emc_pmacro_cmd_ctrl0, 16:16, scratch183, 26:26);
+	s(emc_pmacro_cmd_ctrl0, 21:20, scratch183, 28:27);
+	s(emc_pmacro_cmd_ctrl0, 24:24, scratch183, 29:29);
+	s(emc_pmacro_cmd_ctrl0, 29:28, scratch183, 31:30);
+	s(emc_cfg_dig_dll_1, 19:0, scratch184, 19:0);
+	s(emc_pmacro_cmd_ctrl1, 0:0, scratch184, 20:20);
+	s(emc_pmacro_cmd_ctrl1, 5:4, scratch184, 22:21);
+	s(emc_pmacro_cmd_ctrl1, 8:8, scratch184, 23:23);
+	s(emc_pmacro_cmd_ctrl1, 13:12, scratch184, 25:24);
+	s(emc_pmacro_cmd_ctrl1, 16:16, scratch184, 26:26);
+	s(emc_pmacro_cmd_ctrl1, 21:20, scratch184, 28:27);
+	s(emc_pmacro_cmd_ctrl1, 24:24, scratch184, 29:29);
+	s(emc_pmacro_cmd_ctrl1, 29:28, scratch184, 31:30);
+	s(emc_quse_brlshft0, 19:0, scratch185, 19:0);
+	s(emc_pmacro_cmd_ctrl2, 0:0, scratch185, 20:20);
+	s(emc_pmacro_cmd_ctrl2, 5:4, scratch185, 22:21);
+	s(emc_pmacro_cmd_ctrl2, 8:8, scratch185, 23:23);
+	s(emc_pmacro_cmd_ctrl2, 13:12, scratch185, 25:24);
+	s(emc_pmacro_cmd_ctrl2, 16:16, scratch185, 26:26);
+	s(emc_pmacro_cmd_ctrl2, 21:20, scratch185, 28:27);
+	s(emc_pmacro_cmd_ctrl2, 24:24, scratch185, 29:29);
+	s(emc_pmacro_cmd_ctrl2, 29:28, scratch185, 31:30);
+	s(emc_quse_brlshft1, 19:0, scratch186, 19:0);
+	s(emc_pmacro_dsr_vttgen_ctrl0, 3:0, scratch186, 23:20);
+	s(emc_pmacro_dsr_vttgen_ctrl0, 15:8, scratch186, 31:24);
+	s(emc_quse_brlshft2, 19:0, scratch187, 19:0);
+	s(emc_pmacro_perbit_rfu1_ctrl0, 5:0, scratch187, 25:20);
+	s(emc_pmacro_perbit_rfu1_ctrl0, 21:16, scratch187, 31:26);
+	s(emc_quse_brlshft3, 19:0, scratch188, 19:0);
+	s(emc_pmacro_perbit_rfu1_ctrl1, 5:0, scratch188, 25:20);
+	s(emc_pmacro_perbit_rfu1_ctrl1, 21:16, scratch188, 31:26);
+	s(emc_dbg, 4:0, scratch189, 4:0);
+	s(emc_dbg, 13:9, scratch189, 9:5);
+	s(emc_dbg, 31:24, scratch189, 17:10);
+	s(emc_trefbw, 13:0, scratch189, 31:18);
+	s(emc_zcal_wait_cnt, 10:0, scratch191, 10:0);
+	s(emc_zcal_wait_cnt, 21:16, scratch191, 16:11);
+	s(emc_zcal_wait_cnt, 31:31, scratch191, 17:17);
+	s(emc_qpop, 6:0, scratch191, 24:18);
+	s(emc_qpop, 22:16, scratch191, 31:25);
+	s(emc_zcal_mrw_cmd, 7:0, scratch192, 7:0);
+	s(emc_zcal_mrw_cmd, 23:16, scratch192, 15:8);
+	s(emc_zcal_mrw_cmd, 31:30, scratch192, 17:16);
+	s(emc_pmacro_auto_cal_common, 5:0, scratch192, 23:18);
+	s(emc_pmacro_auto_cal_common, 13:8, scratch192, 29:24);
+	s(emc_pmacro_auto_cal_common, 16:16, scratch192, 30:30);
+	s(emc_pmacro_tx_sel_clk_src4, 25:25, scratch192, 31:31);
+	s(emc_dll_cfg1, 10:0, scratch193, 10:0);
+	s(emc_dll_cfg1, 13:12, scratch193, 12:11);
+	s(emc_dll_cfg1, 17:16, scratch193, 14:13);
+	s(emc_dll_cfg1, 21:20, scratch193, 16:15);
+	s(emc_dll_cfg1, 24:24, scratch193, 17:17);
+	s(emc_pmacro_perbit_rfu1_ctrl2, 5:0, scratch193, 23:18);
+	s(emc_pmacro_perbit_rfu1_ctrl2, 21:16, scratch193, 29:24);
+	s(emc_pmacro_tx_sel_clk_src4, 26:26, scratch193, 30:30);
+	s(emc_pmacro_tx_sel_clk_src5, 0:0, scratch193, 31:31);
+	s(emc_pmacro_cmd_brick_ctrl_fdpd, 17:0, scratch194, 17:0);
+	s(emc_pmacro_perbit_rfu1_ctrl3, 5:0, scratch194, 23:18);
+	s(emc_pmacro_perbit_rfu1_ctrl3, 21:16, scratch194, 29:24);
+	s(emc_pmacro_tx_sel_clk_src5, 2:1, scratch194, 31:30);
+	s(emc_pmacro_data_brick_ctrl_fdpd, 17:0, scratch195, 17:0);
+	s(emc_pmacro_perbit_rfu1_ctrl4, 5:0, scratch195, 23:18);
+	s(emc_pmacro_perbit_rfu1_ctrl4, 21:16, scratch195, 29:24);
+	s(emc_pmacro_tx_sel_clk_src5, 4:3, scratch195, 31:30);
+	s(emc_dyn_self_ref_control, 15:0, scratch196, 15:0);
+	s(emc_dyn_self_ref_control, 31:31, scratch196, 16:16);
+	s(emc_emem_arb_refpb_bank_ctrl, 6:0, scratch196, 23:17);
+	s(emc_emem_arb_refpb_bank_ctrl, 14:8, scratch196, 30:24);
+	s(emc_emem_arb_refpb_bank_ctrl, 31:31, scratch196, 31:31);
+	s(emc_pmacro_cmd_pad_rx_ctrl, 1:0, scratch197, 1:0);
+	s(emc_pmacro_cmd_pad_rx_ctrl, 5:4, scratch197, 3:2);
+	s(emc_pmacro_cmd_pad_rx_ctrl, 12:12, scratch197, 4:4);
+	s(emc_pmacro_cmd_pad_rx_ctrl, 19:15, scratch197, 9:5);
+	s(emc_pmacro_cmd_pad_rx_ctrl, 27:21, scratch197, 16:10);
+	s(emc_pmacro_perbit_rfu1_ctrl5, 5:0, scratch197, 22:17);
+	s(emc_pmacro_perbit_rfu1_ctrl5, 21:16, scratch197, 28:23);
+	s(emc_pmacro_tx_sel_clk_src5, 7:5, scratch197, 31:29);
+	s(emc_pmacro_data_pad_rx_ctrl, 1:0, scratch198, 1:0);
+	s(emc_pmacro_data_pad_rx_ctrl, 5:4, scratch198, 3:2);
+	s(emc_pmacro_data_pad_rx_ctrl, 12:12, scratch198, 4:4);
+	s(emc_pmacro_data_pad_rx_ctrl, 19:15, scratch198, 9:5);
+	s(emc_pmacro_data_pad_rx_ctrl, 27:21, scratch198, 16:10);
+	s(emc_pmacro_tx_sel_clk_src5, 10:8, scratch198, 19:17);
+	s(emc_pmacro_tx_sel_clk_src5, 26:16, scratch198, 30:20);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 0:0, scratch198, 31:31);
+	s(emc_refresh, 15:0, scratch199, 15:0);
+	s(emc_cmd_q, 4:0, scratch199, 20:16);
+	s(emc_cmd_q, 10:8, scratch199, 23:21);
+	s(emc_cmd_q, 14:12, scratch199, 26:24);
+	s(emc_cmd_q, 28:24, scratch199, 31:27);
+	s(emc_acpd_control, 15:0, scratch210, 15:0);
+	s(emc_auto_cal_vref_sel1, 15:0, scratch210, 31:16);
+	s(emc_pmacro_auto_cal_cfg0, 3:0, scratch211, 3:0);
+	s(emc_pmacro_auto_cal_cfg0, 11:8, scratch211, 7:4);
+	s(emc_pmacro_auto_cal_cfg0, 19:16, scratch211, 11:8);
+	s(emc_pmacro_auto_cal_cfg0, 27:24, scratch211, 15:12);
+	s(emc_pmacro_auto_cal_cfg1, 3:0, scratch211, 19:16);
+	s(emc_pmacro_auto_cal_cfg1, 11:8, scratch211, 23:20);
+	s(emc_pmacro_auto_cal_cfg1, 19:16, scratch211, 27:24);
+	s(emc_pmacro_auto_cal_cfg1, 27:24, scratch211, 31:28);
+	s(emc_pmacro_auto_cal_cfg2, 3:0, scratch212, 3:0);
+	s(emc_pmacro_auto_cal_cfg2, 11:8, scratch212, 7:4);
+	s(emc_pmacro_auto_cal_cfg2, 19:16, scratch212, 11:8);
+	s(emc_pmacro_auto_cal_cfg2, 27:24, scratch212, 15:12);
+	s(emc_xm2_comp_pad_ctrl3, 5:0, scratch212, 21:16);
+	s(emc_xm2_comp_pad_ctrl3, 17:12, scratch212, 27:22);
+	s(emc_xm2_comp_pad_ctrl3, 23:20, scratch212, 31:28);
+	s(emc_cfg_dig_dll_period, 15:0, scratch213, 15:0);
+	s(emc_prerefresh_req_cnt, 15:0, scratch213, 31:16);
+	s(emc_pmacro_ddll_bypass, 0:0, scratch214, 0:0);
+	s(emc_pmacro_ddll_bypass, 11:8, scratch214, 4:1);
+	s(emc_pmacro_ddll_bypass, 16:13, scratch214, 8:5);
+	s(emc_pmacro_ddll_bypass, 27:24, scratch214, 12:9);
+	s(emc_pmacro_ddll_bypass, 31:29, scratch214, 15:13);
+	s(emc_pmacro_data_pi_ctrl, 4:0, scratch214, 20:16);
+	s(emc_pmacro_data_pi_ctrl, 12:8, scratch214, 25:21);
+	s(emc_pmacro_data_pi_ctrl, 21:16, scratch214, 31:26);
+	s(emc_pmacro_cmd_pi_ctrl, 4:0, scratch215, 4:0);
+	s(emc_pmacro_cmd_pi_ctrl, 12:8, scratch215, 9:5);
+	s(emc_pmacro_cmd_pi_ctrl, 21:16, scratch215, 15:10);
+
+	s(emc_pin_gpio, 1:0, scratch9, 31:30);
+	s(emc_pin_gpio_enable, 1:0, scratch10, 31:30);
+	s(emc_dev_select, 1:0, scratch11, 31:30);
+	s(emc_zcal_warm_cold_boot_enables, 1:0, scratch12, 31:30);
+	s(emc_cfg_dig_dll_period_warm_boot, 1:0, scratch13, 31:30);
 	s32(emc_bct_spare13, scratch45);
 	s32(emc_bct_spare12, scratch46);
 	s32(emc_bct_spare7, scratch47);
@@ -1353,71 +1806,224 @@ static void _sdram_lp0_save_params_t210b01(const void *params)
 	s32(emc_bct_spare8, scratch61);
 	s32(boot_rom_patch_data, scratch62);
 	s32(boot_rom_patch_control, scratch63);
-	pmc->scratch65 = ((2 * pmc->scratch65) >> 1) | ((u16)(sdram->mc_clken_override_allwarm_boot) << 31);
-	pmc->scratch66 = pmc->scratch66 & 0x1FFFFFFF | ((u8)(sdram->emc_extra_refresh_num) << 29);
-	pmc->scratch72 = pmc->scratch72 & 0x8FFFFFFF | ((u16)(sdram->pmc_io_dpd3_req_wait) << 28) & 0x70000000;
-	pmc->scratch72 = ((2 * pmc->scratch72) >> 1) | ((u16)(sdram->emc_clken_override_allwarm_boot) << 31);
-	pmc->scratch73 = pmc->scratch73 & 0x8FFFFFFF | ((u8)(sdram->memory_type) << 28) & 0x70000000;
-	pmc->scratch73 = ((2 * pmc->scratch73) >> 1) | (sdram->emc_mrs_warm_boot_enable << 31);
-	pmc->scratch74 = pmc->scratch74 & 0x8FFFFFFF | (sdram->pmc_io_dpd4_req_wait << 28) & 0x70000000;
-	pmc->scratch74 = ((2 * pmc->scratch74) >> 1) | (sdram->clear_clock2_mc1 << 31);
-	pmc->scratch75 = pmc->scratch75 & 0xEFFFFFFF | (sdram->emc_warm_boot_extramode_reg_write_enable << 28) & 0x10000000;
-	pmc->scratch75 = pmc->scratch75 & 0xDFFFFFFF | (sdram->clk_rst_pllm_misc20_override_enable << 29) & 0x20000000;
-	pmc->scratch75 = pmc->scratch75 & 0xBFFFFFFF | ((u16)(sdram->emc_dbg_write_mux) << 30) & 0x40000000;
-	pmc->scratch75 = ((2 * pmc->scratch75) >> 1) | ((u16)(sdram->ahb_arbitration_xbar_ctrl_meminit_done) << 31);
-	pmc->scratch90 = pmc->scratch90 & 0xFFFFFF | (sdram->emc_timing_control_wait << 24);
-	pmc->scratch91 = pmc->scratch91 & 0xFFFFFF | (sdram->emc_zcal_warm_boot_wait << 24);
-	pmc->scratch92 = pmc->scratch92 & 0xFFFFFF | (sdram->warm_boot_wait << 24);
-	pmc->scratch93 = pmc->scratch93 & 0xFFFFFF | ((u16)(sdram->emc_pin_program_wait) << 24);
-	pmc->scratch114 = pmc->scratch114 & 0x3FFFFF | ((u16)(sdram->emc_auto_cal_wait) << 22);
-	pmc->scratch215 = (u16)pmc->scratch215 | ((u16)(sdram->swizzle_rank_byte_encode) << 16);
-	pmc->scratch216 = (2 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 30) | ((4 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 29) | ((8 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 28) | ((16 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 27) | ((32 * sdram->emc_pmacro_data_pad_tx_ctrl >> 31 << 26) | ((sdram->emc_pmacro_data_pad_tx_ctrl << 6 >> 31 << 25) | tmp & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF;
-	pmc->scratch5 = (sdram->emc_warm_boot_mrw_extra << 24) | ((sdram->emc_warm_boot_mrw_extra >> 16 << 16) | ((sdram->emc_mrw_lpddr2zcal_warm_boot << 8) & 0xFFFF | ((sdram->emc_mrw_lpddr2zcal_warm_boot << 8 >> 24) | (pmc->scratch5 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFFFFFF;
-	pmc->scratch6 = (16 * sdram->emc_warm_boot_mrw_extra >> 31 << 7) | ((32 * sdram->emc_warm_boot_mrw_extra >> 31 << 6) | (32 * (16 * sdram->emc_mrw_lpddr2zcal_warm_boot >> 31) | (16 * (32 * sdram->emc_mrw_lpddr2zcal_warm_boot >> 31) | (4 * (sdram->emc_warm_boot_mrw_extra >> 30) | ((sdram->emc_mrw_lpddr2zcal_warm_boot >> 30) | 4 * (pmc->scratch6 >> 2)) & 0xFFFFFFF3) & 0xFFFFFFEF) & 0xFFFFFFDF) & 0xFFFFFFBF) & 0xFFFFFF7F;
-	pmc->scratch8 = (sdram->emc_mrw6 >> 30 << 28) | ((16 * sdram->emc_mrw6 >> 31 << 27) | ((32 * sdram->emc_mrw6 >> 31 << 26) | ((sdram->emc_mrw6 << 6 >> 30 << 24) | ((sdram->emc_mrw6 << 8 >> 24 << 16) | ((sdram->emc_mrw6 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw6 | (pmc->scratch8 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch9 = (sdram->emc_mrw8 >> 30 << 28) | ((16 * sdram->emc_mrw8 >> 31 << 27) | ((32 * sdram->emc_mrw8 >> 31 << 26) | ((sdram->emc_mrw8 << 6 >> 30 << 24) | ((sdram->emc_mrw8 << 8 >> 24 << 16) | ((sdram->emc_mrw8 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw8 | (pmc->scratch9 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch10 = (sdram->emc_mrw9 >> 30 << 28) | ((16 * sdram->emc_mrw9 >> 31 << 27) | ((32 * sdram->emc_mrw9 >> 31 << 26) | ((sdram->emc_mrw9 << 6 >> 30 << 24) | ((sdram->emc_mrw9 << 8 >> 24 << 16) | ((sdram->emc_mrw9 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw9 | (pmc->scratch10 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch11 = (sdram->emc_mrw10 >> 30 << 28) | ((16 * sdram->emc_mrw10 >> 31 << 27) | ((32 * sdram->emc_mrw10 >> 31 << 26) | ((sdram->emc_mrw10 << 6 >> 30 << 24) | ((sdram->emc_mrw10 << 8 >> 24 << 16) | ((sdram->emc_mrw10 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw10 | (pmc->scratch11 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch12 = (sdram->emc_mrw12 >> 30 << 28) | ((16 * sdram->emc_mrw12 >> 31 << 27) | ((32 * sdram->emc_mrw12 >> 31 << 26) | ((sdram->emc_mrw12 << 6 >> 30 << 24) | ((sdram->emc_mrw12 << 8 >> 24 << 16) | ((sdram->emc_mrw12 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw12 | (pmc->scratch12 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch13 = (sdram->emc_mrw13 >> 30 << 28) | ((16 * sdram->emc_mrw13 >> 31 << 27) | ((32 * sdram->emc_mrw13 >> 31 << 26) | ((sdram->emc_mrw13 << 6 >> 30 << 24) | ((sdram->emc_mrw13 << 8 >> 24 << 16) | ((sdram->emc_mrw13 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw13 | (pmc->scratch13 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch14 = (sdram->emc_mrw14 >> 30 << 28) | ((16 * sdram->emc_mrw14 >> 31 << 27) | ((32 * sdram->emc_mrw14 >> 31 << 26) | ((sdram->emc_mrw14 << 6 >> 30 << 24) | ((sdram->emc_mrw14 << 8 >> 24 << 16) | ((sdram->emc_mrw14 << 16 >> 24 << 8) | ((u8)sdram->emc_mrw14 | (pmc->scratch14 >> 8 << 8)) & 0xFFFF00FF) & 0xFF00FFFF) & 0xFCFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xCFFFFFFF;
-	pmc->scratch15 = (sdram->emc_mrw1 >> 30 << 18) | ((16 * sdram->emc_mrw1 >> 31 << 17) | ((32 * sdram->emc_mrw1 >> 31 << 16) | ((sdram->emc_mrw1 << 8 >> 24 << 8) | ((u8)sdram->emc_mrw1 | (pmc->scratch15 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF;
-	pmc->scratch16 = (sdram->emc_warm_boot_mrw_extra >> 30 << 18) | ((16 * sdram->emc_warm_boot_mrw_extra >> 31 << 17) | ((32 * sdram->emc_warm_boot_mrw_extra >> 31 << 16) | ((sdram->emc_warm_boot_mrw_extra << 8 >> 24 << 8) | ((u8)sdram->emc_warm_boot_mrw_extra | (pmc->scratch16 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF;
-	pmc->scratch17 = (sdram->emc_mrw2 >> 30 << 18) | ((16 * sdram->emc_mrw2 >> 31 << 17) | ((32 * sdram->emc_mrw2 >> 31 << 16) | ((sdram->emc_mrw2 << 8 >> 24 << 8) | ((u8)sdram->emc_mrw2 | (pmc->scratch17 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF;
-	pmc->scratch18 = (sdram->emc_mrw3 >> 30 << 18) | ((16 * sdram->emc_mrw3 >> 31 << 17) | ((32 * sdram->emc_mrw3 >> 31 << 16) | ((sdram->emc_mrw3 << 8 >> 24 << 8) | ((u8)sdram->emc_mrw3 | (pmc->scratch18 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF;
-	pmc->scratch19 = (sdram->emc_mrw4 >> 30 << 18) | ((16 * sdram->emc_mrw4 >> 31 << 17) | ((32 * sdram->emc_mrw4 >> 31 << 16) | ((sdram->emc_mrw4 << 8 >> 24 << 8) | ((u8)sdram->emc_mrw4 | (pmc->scratch19 >> 8 << 8)) & 0xFFFF00FF) & 0xFFFEFFFF) & 0xFFFDFFFF) & 0xFFF3FFFF;
-	pmc->secure_scratch8 = (sdram->emc_cmd_mapping_byte >> 28 << 28) | ((16 * sdram->emc_cmd_mapping_byte >> 28 << 24) | ((sdram->emc_cmd_mapping_byte << 8 >> 28 << 20) | ((sdram->emc_cmd_mapping_byte << 12 >> 28 << 16) | ((sdram->emc_cmd_mapping_byte << 16 >> 28 << 12) | ((sdram->emc_cmd_mapping_byte << 20 >> 28 << 8) | (16 * (sdram->emc_cmd_mapping_byte << 24 >> 28) | (sdram->emc_cmd_mapping_byte & 0xF | 16 * (pmc->secure_scratch8 >> 4)) & 0xFFFFFF0F) & 0xFFFFF0FF) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFF0FFFFF) & 0xF0FFFFFF) & 0xFFFFFFF;
-	pmc->secure_scratch9 = (sdram->emc_pmacro_brick_mapping0 >> 28 << 28) | ((16 * sdram->emc_pmacro_brick_mapping0 >> 28 << 24) | ((sdram->emc_pmacro_brick_mapping0 << 8 >> 28 << 20) | ((sdram->emc_pmacro_brick_mapping0 << 12 >> 28 << 16) | ((sdram->emc_pmacro_brick_mapping0 << 16 >> 28 << 12) | ((sdram->emc_pmacro_brick_mapping0 << 20 >> 28 << 8) | (16 * (sdram->emc_pmacro_brick_mapping0 << 24 >> 28) | (sdram->emc_pmacro_brick_mapping0 & 0xF | 16 * (pmc->secure_scratch9 >> 4)) & 0xFFFFFF0F) & 0xFFFFF0FF) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFF0FFFFF) & 0xF0FFFFFF) & 0xFFFFFFF;
-	pmc->secure_scratch10 = (sdram->emc_pmacro_brick_mapping1 >> 28 << 28) | ((16 * sdram->emc_pmacro_brick_mapping1 >> 28 << 24) | ((sdram->emc_pmacro_brick_mapping1 << 8 >> 28 << 20) | ((sdram->emc_pmacro_brick_mapping1 << 12 >> 28 << 16) | ((sdram->emc_pmacro_brick_mapping1 << 16 >> 28 << 12) | ((sdram->emc_pmacro_brick_mapping1 << 20 >> 28 << 8) | (16 * (sdram->emc_pmacro_brick_mapping1 << 24 >> 28) | (sdram->emc_pmacro_brick_mapping1 & 0xF | 16 * (pmc->secure_scratch10 >> 4)) & 0xFFFFFF0F) & 0xFFFFF0FF) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFF0FFFFF) & 0xF0FFFFFF) & 0xFFFFFFF;
-	pmc->secure_scratch11 = (sdram->emc_pmacro_brick_mapping2 >> 28 << 28) | ((16 * sdram->emc_pmacro_brick_mapping2 >> 28 << 24) | ((sdram->emc_pmacro_brick_mapping2 << 8 >> 28 << 20) | ((sdram->emc_pmacro_brick_mapping2 << 12 >> 28 << 16) | ((sdram->emc_pmacro_brick_mapping2 << 16 >> 28 << 12) | ((sdram->emc_pmacro_brick_mapping2 << 20 >> 28 << 8) | (16 * (sdram->emc_pmacro_brick_mapping2 << 24 >> 28) | (sdram->emc_pmacro_brick_mapping2 & 0xF | 16 * (pmc->secure_scratch11 >> 4)) & 0xFFFFFF0F) & 0xFFFFF0FF) & 0xFFFF0FFF) & 0xFFF0FFFF) & 0xFF0FFFFF) & 0xF0FFFFFF) & 0xFFFFFFF;
+	s(mc_clken_override_allwarm_boot, 0:0, scratch65, 31:31);
+	s(emc_extra_refresh_num, 2:0, scratch66, 31:29);
+	s(pmc_io_dpd3_req_wait, 2:0, scratch72, 30:28);
+	s(emc_clken_override_allwarm_boot, 0:0, scratch72, 31:31);
+	s(memory_type, 2:0, scratch73, 30:28);
+	s(emc_mrs_warm_boot_enable, 0:0, scratch73, 31:31);
+	s(pmc_io_dpd4_req_wait, 2:0, scratch74, 30:28);
+	s(clear_clock2_mc1, 0:0, scratch74, 31:31);
+	s(emc_warm_boot_extramode_reg_write_enable, 0:0, scratch75, 28:28);
+	s(clk_rst_pllm_misc20_override_enable, 0:0, scratch75, 29:29);
+	s(emc_dbg_write_mux, 0:0, scratch75, 30:30);
+	s(ahb_arbitration_xbar_ctrl_meminit_done, 0:0, scratch75, 31:31);
+	s(emc_timing_control_wait, 7:0, scratch90, 31:24);
+	s(emc_zcal_warm_boot_wait, 7:0, scratch91, 31:24);
+	s(warm_boot_wait, 7:0, scratch92, 31:24);
+	s(emc_pin_program_wait, 7:0, scratch93, 31:24);
+	s(emc_auto_cal_wait, 9:0, scratch114, 31:22);
+	s(swizzle_rank_byte_encode, 15:0, scratch215, 31:16);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 6:5, scratch216, 1:0);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 10:10, scratch216, 2:2);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 16:15, scratch216, 4:3);
+	s(emc_pmacro_cmd_pad_tx_ctrl, 30:21, scratch216, 14:5);
+	s(emc_pmacro_data_pad_tx_ctrl, 0:0, scratch216, 15:15);
+	s(emc_pmacro_data_pad_tx_ctrl, 6:5, scratch216, 17:16);
+	s(emc_pmacro_data_pad_tx_ctrl, 10:10, scratch216, 18:18);
+	s(emc_pmacro_data_pad_tx_ctrl, 16:15, scratch216, 20:19);
+	s(emc_pmacro_data_pad_tx_ctrl, 30:21, scratch216, 30:21);
+
+	// LPDDR4 MRW.
+	s(emc_mrw_lpddr2zcal_warm_boot, 23:16, scratch5, 7:0);
+	s(emc_mrw_lpddr2zcal_warm_boot, 7:0, scratch5, 15:8);
+	s(emc_warm_boot_mrw_extra, 23:16, scratch5, 23:16);
+	s(emc_warm_boot_mrw_extra, 7:0, scratch5, 31:24);
+	s(emc_mrw_lpddr2zcal_warm_boot, 31:30, scratch6, 1:0);
+	s(emc_warm_boot_mrw_extra, 31:30, scratch6, 3:2);
+	s(emc_mrw_lpddr2zcal_warm_boot, 27:26, scratch6, 5:4);
+	s(emc_warm_boot_mrw_extra, 27:26, scratch6, 7:6);
+	s(emc_mrw6, 27:0, scratch8, 27:0);
+	s(emc_mrw6, 31:30, scratch8, 29:28);
+	s(emc_mrw8, 27:0, scratch9, 27:0);
+	s(emc_mrw8, 31:30, scratch9, 29:28);
+	s(emc_mrw9, 27:0, scratch10, 27:0);
+	s(emc_mrw9, 31:30, scratch10, 29:28);
+	s(emc_mrw10, 27:0, scratch11, 27:0);
+	s(emc_mrw10, 31:30, scratch11, 29:28);
+	s(emc_mrw12, 27:0, scratch12, 27:0);
+	s(emc_mrw12, 31:30, scratch12, 29:28);
+	s(emc_mrw13, 27:0, scratch13, 27:0);
+	s(emc_mrw13, 31:30, scratch13, 29:28);
+	s(emc_mrw14, 27:0, scratch14, 27:0);
+	s(emc_mrw14, 31:30, scratch14, 29:28);
+	s(emc_mrw1, 7:0, scratch15, 7:0);
+	s(emc_mrw1, 23:16, scratch15, 15:8);
+	s(emc_mrw1, 27:26, scratch15, 17:16);
+	s(emc_mrw1, 31:30, scratch15, 19:18);
+	s(emc_warm_boot_mrw_extra, 7:0, scratch16, 7:0);
+	s(emc_warm_boot_mrw_extra, 23:16, scratch16, 15:8);
+	s(emc_warm_boot_mrw_extra, 27:26, scratch16, 17:16);
+	s(emc_warm_boot_mrw_extra, 31:30, scratch16, 19:18);
+	s(emc_mrw2, 7:0, scratch17, 7:0);
+	s(emc_mrw2, 23:16, scratch17, 15:8);
+	s(emc_mrw2, 27:26, scratch17, 17:16);
+	s(emc_mrw2, 31:30, scratch17, 19:18);
+	s(emc_mrw3, 7:0, scratch18, 7:0);
+	s(emc_mrw3, 23:16, scratch18, 15:8);
+	s(emc_mrw3, 27:26, scratch18, 17:16);
+	s(emc_mrw3, 31:30, scratch18, 19:18);
+	s(emc_mrw4, 7:0, scratch19, 7:0);
+	s(emc_mrw4, 23:16, scratch19, 15:8);
+	s(emc_mrw4, 27:26, scratch19, 17:16);
+	s(emc_mrw4, 31:30, scratch19, 19:18);
+
+	s32(emc_cmd_mapping_byte, secure_scratch8);
+	s32(emc_pmacro_brick_mapping0, secure_scratch9);
+	s32(emc_pmacro_brick_mapping1, secure_scratch10);
+	s32(emc_pmacro_brick_mapping2, secure_scratch11);
 	s32(mc_video_protect_gpu_override0, secure_scratch12);
-	pmc->secure_scratch13 = ((u16)(sdram->emc_adr_cfg) << 31) | (2 * ((((u16)(sdram->mc_untranslated_region_check) << 22) >> 31 << 30) | ((((u16)(sdram->mc_untranslated_region_check) << 23) >> 31 << 29) | (((u16)(sdram->mc_untranslated_region_check) << 28) & 0x1FFFFFFF | ((2 * sdram->emc_cmd_mapping_cmd0_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd0_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd0_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd0_0 & 0x7F | (pmc->secure_scratch13 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch14 = (sdram->mc_video_protect_write_access << 30 >> 31 << 31) | (2 * ((sdram->mc_video_protect_write_access << 30) | ((sdram->mc_video_protect_bom_adr_hi << 30 >> 2) | ((2 * sdram->emc_cmd_mapping_cmd0_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd0_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd0_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd0_1 & 0x7F | (pmc->secure_scratch14 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch15 = ((u16)(sdram->mc_mts_carveout_adr_hi) << 30) | (4 * ((sdram->mc_sec_carveout_adr_hi << 28) | ((2 * sdram->emc_cmd_mapping_cmd1_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd1_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd1_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd1_0 & 0x7F | (pmc->secure_scratch15 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->secure_scratch16 = (sdram->mc_generalized_carveout3_bom_hi << 30) | (4 * ((sdram->mc_generalized_carveout5_bom_hi << 28) | ((2 * sdram->emc_cmd_mapping_cmd1_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd1_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd1_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd1_1 & 0x7F | (pmc->secure_scratch16 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->secure_scratch17 = ((u16)(sdram->mc_generalized_carveout4_bom_hi) << 30) | (4 * (((u16)(sdram->mc_generalized_carveout2_bom_hi) << 28) | ((2 * sdram->emc_cmd_mapping_cmd2_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd2_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd2_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd2_0 & 0x7F | (pmc->secure_scratch17 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) >> 2);
-	pmc->secure_scratch18 = (sdram->emc_fbio_cfg8 << 16 >> 31 << 31) | (2 * (((u16)(sdram->emc_fbio_spare) << 30 >> 31 << 30) | ((sdram->mc_generalized_carveout1_bom_hi << 30 >> 2) | ((2 * sdram->emc_cmd_mapping_cmd2_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd2_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd2_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd2_1 & 0x7F | (pmc->secure_scratch18 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xCFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch19 = (sdram->mc_video_protect_vpr_override << 31) | (2 * (((u16)(sdram->mc_mts_carveout_reg_ctrl) << 30) | ((sdram->mc_sec_carveout_protect_write_access << 31 >> 2) | (((u16)(sdram->mc_emem_adr_cfg) << 28) & 0x1FFFFFFF | ((2 * sdram->emc_cmd_mapping_cmd3_0 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd3_0 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd3_0 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd3_0 & 0x7F | (pmc->secure_scratch19 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch20 = (sdram->mc_generalized_carveout2_cfg0 << 25 >> 28 << 28) | ((2 * sdram->emc_cmd_mapping_cmd3_1 >> 25 << 21) | ((sdram->emc_cmd_mapping_cmd3_1 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd3_1 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd3_1 & 0x7F | (pmc->secure_scratch20 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xF01FFFFF) & 0xFFFFFFF;
-	pmc->secure_scratch39 = (sdram->mc_video_protect_vpr_override << 30 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout2_cfg0 << 21 >> 28 << 27) | ((32 * sdram->mc_generalized_carveout4_cfg0 >> 31 << 26) | ((sdram->mc_generalized_carveout4_cfg0 << 6 >> 31 << 25) | ((sdram->mc_generalized_carveout4_cfg0 << 7 >> 31 << 24) | ((sdram->mc_generalized_carveout4_cfg0 << 8 >> 31 << 23) | ((sdram->mc_generalized_carveout4_cfg0 << 9 >> 31 << 22) | ((sdram->mc_generalized_carveout4_cfg0 << 10 >> 28 << 18) | ((sdram->mc_generalized_carveout4_cfg0 << 14 >> 28 << 14) | ((sdram->mc_generalized_carveout4_cfg0 << 18 >> 29 << 11) | ((sdram->mc_generalized_carveout4_cfg0 << 21 >> 28 << 7) | (8 * (sdram->mc_generalized_carveout4_cfg0 << 25 >> 28) | (4 * (sdram->mc_generalized_carveout4_cfg0 << 29 >> 31) | (2 * (sdram->mc_generalized_carveout4_cfg0 << 30 >> 31) | (sdram->mc_generalized_carveout4_cfg0 & 1 | 2 * (pmc->secure_scratch39 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFF87) & 0xFFFFF87F) & 0xFFFFC7FF) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0x87FFFFFF) >> 1);
-	pmc->secure_scratch40 = (sdram->mc_video_protect_vpr_override << 29 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout2_cfg0 << 14 >> 28 << 27) | ((32 * sdram->mc_generalized_carveout5_cfg0 >> 31 << 26) | ((sdram->mc_generalized_carveout5_cfg0 << 6 >> 31 << 25) | ((sdram->mc_generalized_carveout5_cfg0 << 7 >> 31 << 24) | ((sdram->mc_generalized_carveout5_cfg0 << 8 >> 31 << 23) | ((sdram->mc_generalized_carveout5_cfg0 << 9 >> 31 << 22) | ((sdram->mc_generalized_carveout5_cfg0 << 10 >> 28 << 18) | ((sdram->mc_generalized_carveout5_cfg0 << 14 >> 28 << 14) | ((sdram->mc_generalized_carveout5_cfg0 << 18 >> 29 << 11) | ((sdram->mc_generalized_carveout5_cfg0 << 21 >> 28 << 7) | (8 * (sdram->mc_generalized_carveout5_cfg0 << 25 >> 28) | (4 * (sdram->mc_generalized_carveout5_cfg0 << 29 >> 31) | (2 * (sdram->mc_generalized_carveout5_cfg0 << 30 >> 31) | (sdram->mc_generalized_carveout5_cfg0 & 1 | 2 * (pmc->secure_scratch40 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFF87) & 0xFFFFF87F) & 0xFFFFC7FF) & 0xFFFC3FFF) & 0xFFC3FFFF) & 0xFFBFFFFF) & 0xFF7FFFFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0x87FFFFFF) >> 1);
-	pmc->secure_scratch41 = (sdram->mc_generalized_carveout2_cfg0 << 18 >> 29 << 29) | ((sdram->mc_generalized_carveout2_cfg0 << 10 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd0_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd0_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd0_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd0_2 & 0x7F | (pmc->secure_scratch41 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0x1FFFFFFF;
-	pmc->secure_scratch42 = ((u16)(sdram->mc_generalized_carveout1_cfg0) << 18 >> 29 << 29) | (((u16)(sdram->mc_generalized_carveout1_cfg0) << 25 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd1_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd1_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd1_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd1_2 & 0x7F | (pmc->secure_scratch42 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0x1FFFFFFF;
-	pmc->secure_scratch43 = ((u16)(sdram->mc_generalized_carveout3_cfg0) << 18 >> 29 << 29) | (((u16)(sdram->mc_generalized_carveout1_cfg0) << 21 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd2_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd2_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd2_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd2_2 & 0x7F | (pmc->secure_scratch43 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0x1FFFFFFF;
-	pmc->secure_scratch44 = (sdram->mc_video_protect_vpr_override << 24 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 25 >> 31 << 30) | ((sdram->mc_video_protect_vpr_override << 28 >> 31 << 29) | ((sdram->mc_generalized_carveout1_cfg0 << 14 >> 28 << 25) | ((16 * sdram->emc_cmd_mapping_cmd3_2 >> 28 << 21) | ((sdram->emc_cmd_mapping_cmd3_2 << 9 >> 25 << 14) | ((sdram->emc_cmd_mapping_cmd3_2 << 17 >> 25 << 7) | (sdram->emc_cmd_mapping_cmd3_2 & 0x7F | (pmc->secure_scratch44 >> 7 << 7)) & 0xFFFFC07F) & 0xFFE03FFF) & 0xFE1FFFFF) & 0xE1FFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch45 = (sdram->mc_emem_adr_cfg_dev0 << 12 >> 28 << 28) | ((sdram->mc_emem_adr_cfg_dev0 << 22 >> 30 << 26) | ((sdram->mc_emem_adr_cfg_dev0 << 23) & 0x3FFFFFF | ((sdram->mc_emem_adr_cfg_channel_mask >> 9) | (pmc->secure_scratch45 >> 23 << 23)) & 0xFC7FFFFF) & 0xF3FFFFFF) & 0xFFFFFFF;
-	pmc->secure_scratch46 = (sdram->mc_video_protect_vpr_override << 23 >> 31 << 31) | (2 * ((sdram->mc_emem_adr_cfg_dev1 << 12 >> 28 << 27) | ((sdram->mc_emem_adr_cfg_dev1 << 22 >> 30 << 25) | ((sdram->mc_emem_adr_cfg_dev1 << 22) & 0x1FFFFFF | ((sdram->mc_emem_adr_cfg_bank_mask0 >> 10) | (pmc->secure_scratch46 >> 22 << 22)) & 0xFE3FFFFF) & 0xF9FFFFFF) & 0x87FFFFFF) >> 1);
-	pmc->secure_scratch47 = (sdram->mc_video_protect_vpr_override << 20 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 22 >> 31 << 30) | (((u8)(sdram->mc_generalized_carveout3_cfg0) << 25 >> 28 << 26) | ((sdram->mc_generalized_carveout1_cfg0 << 10 >> 28 << 22) | ((sdram->mc_emem_adr_cfg_bank_mask1 >> 10) | (pmc->secure_scratch47 >> 22 << 22)) & 0xFC3FFFFF) & 0xC3FFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch48 = (sdram->mc_video_protect_vpr_override << 16 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 17 >> 31 << 30) | ((sdram->mc_generalized_carveout3_cfg0 << 14 >> 28 << 26) | ((sdram->mc_generalized_carveout3_cfg0 << 21 >> 28 << 22) | ((sdram->mc_emem_adr_cfg_bank_mask2 >> 10) | (pmc->secure_scratch48 >> 22 << 22)) & 0xFC3FFFFF) & 0xC3FFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch49 = (sdram->mc_video_protect_vpr_override << 14 >> 31 << 31) | (2 * ((sdram->mc_emem_cfg >> 31 << 30) | ((sdram->mc_emem_cfg << 18 >> 2) | (sdram->mc_video_protect_gpu_override1 & 0xFFFF | (pmc->secure_scratch49 >> 16 << 16)) & 0xC000FFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch50 = (sdram->mc_video_protect_vpr_override << 12 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 13 >> 31 << 30) | ((sdram->mc_generalized_carveout1_bom >> 17 << 15) | ((sdram->mc_generalized_carveout3_bom >> 17) | (pmc->secure_scratch50 >> 15 << 15)) & 0xC0007FFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch51 = (sdram->mc_video_protect_vpr_override << 10 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override << 11 >> 31 << 30) | ((sdram->mc_generalized_carveout2_bom >> 17 << 15) | ((sdram->mc_generalized_carveout4_bom >> 17) | (pmc->secure_scratch51 >> 15 << 15)) & 0xC0007FFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch52 = (sdram->mc_video_protect_vpr_override << 9 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout3_cfg0 << 10 >> 28 << 27) | ((sdram->mc_video_protect_bom >> 20 << 15) | ((sdram->mc_generalized_carveout5_bom >> 17) | (pmc->secure_scratch52 >> 15 << 15)) & 0xF8007FFF) & 0x87FFFFFF) >> 1);
-	pmc->secure_scratch53 = (sdram->mc_video_protect_vpr_override1 << 27 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override1 << 30 >> 31 << 30) | ((sdram->mc_video_protect_vpr_override1 << 31 >> 2) | ((sdram->mc_video_protect_vpr_override >> 31 << 28) | ((2 * sdram->mc_video_protect_vpr_override >> 31 << 27) | ((4 * sdram->mc_video_protect_vpr_override >> 31 << 26) | ((32 * sdram->mc_video_protect_vpr_override >> 31 << 25) | ((sdram->mc_video_protect_vpr_override << 8 >> 31 << 24) | ((sdram->mc_sec_carveout_bom >> 20 << 12) | (sdram->mc_video_protect_size_mb & 0xFFF | (pmc->secure_scratch53 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch54 = (sdram->mc_video_protect_vpr_override1 << 19 >> 31 << 31) | (2 * ((sdram->mc_video_protect_vpr_override1 << 20 >> 31 << 30) | ((sdram->mc_video_protect_vpr_override1 << 21 >> 31 << 29) | ((sdram->mc_video_protect_vpr_override1 << 22 >> 31 << 28) | ((sdram->mc_video_protect_vpr_override1 << 23 >> 31 << 27) | ((sdram->mc_video_protect_vpr_override1 << 24 >> 31 << 26) | ((sdram->mc_video_protect_vpr_override1 << 25 >> 31 << 25) | ((sdram->mc_video_protect_vpr_override1 << 26 >> 31 << 24) | ((sdram->mc_mts_carveout_bom >> 20 << 12) | (sdram->mc_sec_carveout_size_mb & 0xFFF | (pmc->secure_scratch54 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch55 = (sdram->mc_generalized_carveout2_cfg0 << 30 >> 31 << 31) | (2 * ((sdram->mc_generalized_carveout2_cfg0 << 30) | ((32 * sdram->mc_video_protect_vpr_override1 >> 31 << 29) | ((sdram->mc_video_protect_vpr_override1 << 6 >> 31 << 28) | ((sdram->mc_video_protect_vpr_override1 << 15 >> 31 << 27) | ((sdram->mc_video_protect_vpr_override1 << 16 >> 31 << 26) | ((sdram->mc_video_protect_vpr_override1 << 17 >> 31 << 25) | ((sdram->mc_video_protect_vpr_override1 << 18 >> 31 << 24) | (((u16)(sdram->mc_generalized_carveout4_size_128kb) << 12) & 0xFFFFFF | (sdram->mc_mts_carveout_size_mb & 0xFFF | (pmc->secure_scratch55 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch56 = ((u16)(sdram->mc_generalized_carveout1_cfg0) << 30 >> 31 << 31) | (2 * (((u16)(sdram->mc_generalized_carveout1_cfg0) << 30) | ((32 * sdram->mc_generalized_carveout2_cfg0 >> 31 << 29) | ((sdram->mc_generalized_carveout2_cfg0 << 6 >> 31 << 28) | ((sdram->mc_generalized_carveout2_cfg0 << 7 >> 31 << 27) | ((sdram->mc_generalized_carveout2_cfg0 << 8 >> 31 << 26) | ((sdram->mc_generalized_carveout2_cfg0 << 9 >> 31 << 25) | ((sdram->mc_generalized_carveout2_cfg0 << 29 >> 31 << 24) | (((u16)(sdram->mc_generalized_carveout2_size_128kb) << 12) & 0xFFFFFF | (sdram->mc_generalized_carveout3_size_128kb & 0xFFF | (pmc->secure_scratch56 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
-	pmc->secure_scratch57 = ((u8)(sdram->mc_generalized_carveout3_cfg0) << 30 >> 31 << 31) | (2 * (((u8)(sdram->mc_generalized_carveout3_cfg0) << 30) | ((32 * sdram->mc_generalized_carveout1_cfg0 >> 31 << 29) | ((sdram->mc_generalized_carveout1_cfg0 << 6 >> 31 << 28) | ((sdram->mc_generalized_carveout1_cfg0 << 7 >> 31 << 27) | ((sdram->mc_generalized_carveout1_cfg0 << 8 >> 31 << 26) | ((sdram->mc_generalized_carveout1_cfg0 << 9 >> 31 << 25) | ((sdram->mc_generalized_carveout1_cfg0 << 29 >> 31 << 24) | ((sdram->mc_generalized_carveout5_size_128kb << 12) & 0xFFFFFF | (sdram->mc_generalized_carveout1_size_128kb & 0xFFF | (pmc->secure_scratch57 >> 12 << 12)) & 0xFF000FFF) & 0xFEFFFFFF) & 0xFDFFFFFF) & 0xFBFFFFFF) & 0xF7FFFFFF) & 0xEFFFFFFF) & 0xDFFFFFFF) & 0xBFFFFFFF) >> 1);
+	s(emc_cmd_mapping_cmd0_0, 6:0, secure_scratch13, 6:0);
+	s(emc_cmd_mapping_cmd0_0, 14:8, secure_scratch13, 13:7);
+	s(emc_cmd_mapping_cmd0_0, 22:16, secure_scratch13, 20:14);
+	s(emc_cmd_mapping_cmd0_0, 30:24, secure_scratch13, 27:21);
+	s(mc_untranslated_region_check, 0:0, secure_scratch13, 28:28);
+	s(mc_untranslated_region_check, 9:8, secure_scratch13, 30:29);
+	s(emc_adr_cfg, 0:0, secure_scratch13, 31:31);
+	s(emc_cmd_mapping_cmd0_1, 6:0, secure_scratch14, 6:0);
+	s(emc_cmd_mapping_cmd0_1, 14:8, secure_scratch14, 13:7);
+	s(emc_cmd_mapping_cmd0_1, 22:16, secure_scratch14, 20:14);
+	s(emc_cmd_mapping_cmd0_1, 30:24, secure_scratch14, 27:21);
+	s(mc_video_protect_bom_adr_hi, 1:0, secure_scratch14, 29:28);
+	s(mc_video_protect_write_access, 1:0, secure_scratch14, 31:30);
+	s(emc_cmd_mapping_cmd1_0, 6:0, secure_scratch15, 6:0);
+	s(emc_cmd_mapping_cmd1_0, 14:8, secure_scratch15, 13:7);
+	s(emc_cmd_mapping_cmd1_0, 22:16, secure_scratch15, 20:14);
+	s(emc_cmd_mapping_cmd1_0, 30:24, secure_scratch15, 27:21);
+	s(mc_sec_carveout_adr_hi, 1:0, secure_scratch15, 29:28);
+	s(mc_mts_carveout_adr_hi, 1:0, secure_scratch15, 31:30);
+	s(emc_cmd_mapping_cmd1_1, 6:0, secure_scratch16, 6:0);
+	s(emc_cmd_mapping_cmd1_1, 14:8, secure_scratch16, 13:7);
+	s(emc_cmd_mapping_cmd1_1, 22:16, secure_scratch16, 20:14);
+	s(emc_cmd_mapping_cmd1_1, 30:24, secure_scratch16, 27:21);
+	s(mc_generalized_carveout5_bom_hi, 1:0, secure_scratch16, 29:28);
+	s(mc_generalized_carveout3_bom_hi, 1:0, secure_scratch16, 31:30);
+	s(emc_cmd_mapping_cmd2_0, 6:0, secure_scratch17, 6:0);
+	s(emc_cmd_mapping_cmd2_0, 14:8, secure_scratch17, 13:7);
+	s(emc_cmd_mapping_cmd2_0, 22:16, secure_scratch17, 20:14);
+	s(emc_cmd_mapping_cmd2_0, 30:24, secure_scratch17, 27:21);
+	s(mc_generalized_carveout2_bom_hi, 1:0, secure_scratch17, 29:28);
+	s(mc_generalized_carveout4_bom_hi, 1:0, secure_scratch17, 31:30);
+	s(emc_cmd_mapping_cmd2_1, 6:0, secure_scratch18, 6:0);
+	s(emc_cmd_mapping_cmd2_1, 14:8, secure_scratch18, 13:7);
+	s(emc_cmd_mapping_cmd2_1, 22:16, secure_scratch18, 20:14);
+	s(emc_cmd_mapping_cmd2_1, 30:24, secure_scratch18, 27:21);
+	s(mc_generalized_carveout1_bom_hi, 1:0, secure_scratch18, 29:28);
+	s(emc_fbio_spare, 1:1, secure_scratch18, 30:30);
+	s(emc_fbio_cfg8, 15:15, secure_scratch18, 31:31);
+	s(emc_cmd_mapping_cmd3_0, 6:0, secure_scratch19, 6:0);
+	s(emc_cmd_mapping_cmd3_0, 14:8, secure_scratch19, 13:7);
+	s(emc_cmd_mapping_cmd3_0, 22:16, secure_scratch19, 20:14);
+	s(emc_cmd_mapping_cmd3_0, 30:24, secure_scratch19, 27:21);
+	s(mc_emem_adr_cfg, 0:0, secure_scratch19, 28:28);
+	s(mc_sec_carveout_protect_write_access, 0:0, secure_scratch19, 29:29);
+	s(mc_mts_carveout_reg_ctrl, 0:0, secure_scratch19, 30:30);
+	s(mc_video_protect_vpr_override, 0:0, secure_scratch19, 31:31);
+	s(emc_cmd_mapping_cmd3_1, 6:0, secure_scratch20, 6:0);
+	s(emc_cmd_mapping_cmd3_1, 14:8, secure_scratch20, 13:7);
+	s(emc_cmd_mapping_cmd3_1, 22:16, secure_scratch20, 20:14);
+	s(emc_cmd_mapping_cmd3_1, 30:24, secure_scratch20, 27:21);
+	s(mc_generalized_carveout2_cfg0, 6:3, secure_scratch20, 31:28);
+	s(mc_generalized_carveout4_cfg0, 26:0, secure_scratch39, 26:0);
+	s(mc_generalized_carveout2_cfg0, 10:7, secure_scratch39, 30:27);
+	s(mc_video_protect_vpr_override, 1:1, secure_scratch39, 31:31);
+	s(mc_generalized_carveout5_cfg0, 26:0, secure_scratch40, 26:0);
+	s(mc_generalized_carveout2_cfg0, 17:14, secure_scratch40, 30:27);
+	s(mc_video_protect_vpr_override, 2:2, secure_scratch40, 31:31);
+	s(emc_cmd_mapping_cmd0_2, 6:0, secure_scratch41, 6:0);
+	s(emc_cmd_mapping_cmd0_2, 14:8, secure_scratch41, 13:7);
+	s(emc_cmd_mapping_cmd0_2, 22:16, secure_scratch41, 20:14);
+	s(emc_cmd_mapping_cmd0_2, 27:24, secure_scratch41, 24:21);
+	s(mc_generalized_carveout2_cfg0, 21:18, secure_scratch41, 28:25);
+	s(mc_generalized_carveout2_cfg0, 13:11, secure_scratch41, 31:29);
+	s(emc_cmd_mapping_cmd1_2, 6:0, secure_scratch42, 6:0);
+	s(emc_cmd_mapping_cmd1_2, 14:8, secure_scratch42, 13:7);
+	s(emc_cmd_mapping_cmd1_2, 22:16, secure_scratch42, 20:14);
+	s(emc_cmd_mapping_cmd1_2, 27:24, secure_scratch42, 24:21);
+	s(mc_generalized_carveout1_cfg0, 6:3, secure_scratch42, 28:25);
+	s(mc_generalized_carveout1_cfg0, 13:11, secure_scratch42, 31:29);
+	s(emc_cmd_mapping_cmd2_2, 6:0, secure_scratch43, 6:0);
+	s(emc_cmd_mapping_cmd2_2, 14:8, secure_scratch43, 13:7);
+	s(emc_cmd_mapping_cmd2_2, 22:16, secure_scratch43, 20:14);
+	s(emc_cmd_mapping_cmd2_2, 27:24, secure_scratch43, 24:21);
+	s(mc_generalized_carveout1_cfg0, 10:7, secure_scratch43, 28:25);
+	s(mc_generalized_carveout3_cfg0, 13:11, secure_scratch43, 31:29);
+	s(emc_cmd_mapping_cmd3_2, 6:0, secure_scratch44, 6:0);
+	s(emc_cmd_mapping_cmd3_2, 14:8, secure_scratch44, 13:7);
+	s(emc_cmd_mapping_cmd3_2, 22:16, secure_scratch44, 20:14);
+	s(emc_cmd_mapping_cmd3_2, 27:24, secure_scratch44, 24:21);
+	s(mc_generalized_carveout1_cfg0, 17:14, secure_scratch44, 28:25);
+	s(mc_video_protect_vpr_override, 3:3, secure_scratch44, 29:29);
+	s(mc_video_protect_vpr_override, 7:6, secure_scratch44, 31:30);
+	s(mc_emem_adr_cfg_channel_mask, 31:9, secure_scratch45, 22:0);
+	s(mc_emem_adr_cfg_dev0, 2:0, secure_scratch45, 25:23);
+	s(mc_emem_adr_cfg_dev0, 9:8, secure_scratch45, 27:26);
+	s(mc_emem_adr_cfg_dev0, 19:16, secure_scratch45, 31:28);
+	s(mc_emem_adr_cfg_bank_mask0, 31:10, secure_scratch46, 21:0);
+	s(mc_emem_adr_cfg_dev1, 2:0, secure_scratch46, 24:22);
+	s(mc_emem_adr_cfg_dev1, 9:8, secure_scratch46, 26:25);
+	s(mc_emem_adr_cfg_dev1, 19:16, secure_scratch46, 30:27);
+	s(mc_video_protect_vpr_override, 8:8, secure_scratch46, 31:31);
+	s(mc_emem_adr_cfg_bank_mask1, 31:10, secure_scratch47, 21:0);
+	s(mc_generalized_carveout1_cfg0, 21:18, secure_scratch47, 25:22);
+	s(mc_generalized_carveout3_cfg0, 6:3, secure_scratch47, 29:26);
+	s(mc_video_protect_vpr_override, 9:9, secure_scratch47, 30:30);
+	s(mc_video_protect_vpr_override, 11:11, secure_scratch47, 31:31);
+	s(mc_emem_adr_cfg_bank_mask2, 31:10, secure_scratch48, 21:0);
+	s(mc_generalized_carveout3_cfg0, 10:7, secure_scratch48, 25:22);
+	s(mc_generalized_carveout3_cfg0, 17:14, secure_scratch48, 29:26);
+	s(mc_video_protect_vpr_override, 15:14, secure_scratch48, 31:30);
+	s(mc_video_protect_gpu_override1, 15:0, secure_scratch49, 15:0);
+	s(mc_emem_cfg, 13:0, secure_scratch49, 29:16);
+	s(mc_emem_cfg, 31:31, secure_scratch49, 30:30);
+	s(mc_video_protect_vpr_override, 17:17, secure_scratch49, 31:31);
+	s(mc_generalized_carveout3_bom, 31:17, secure_scratch50, 14:0);
+	s(mc_generalized_carveout1_bom, 31:17, secure_scratch50, 29:15);
+	s(mc_video_protect_vpr_override, 19:18, secure_scratch50, 31:30);
+	s(mc_generalized_carveout4_bom, 31:17, secure_scratch51, 14:0);
+	s(mc_generalized_carveout2_bom, 31:17, secure_scratch51, 29:15);
+	s(mc_video_protect_vpr_override, 21:20, secure_scratch51, 31:30);
+	s(mc_generalized_carveout5_bom, 31:17, secure_scratch52, 14:0);
+	s(mc_video_protect_bom, 31:20, secure_scratch52, 26:15);
+	s(mc_generalized_carveout3_cfg0, 21:18, secure_scratch52, 30:27);
+	s(mc_video_protect_vpr_override, 22:22, secure_scratch52, 31:31);
+	s(mc_video_protect_size_mb, 11:0, secure_scratch53, 11:0);
+	s(mc_sec_carveout_bom, 31:20, secure_scratch53, 23:12);
+	s(mc_video_protect_vpr_override, 23:23, secure_scratch53, 24:24);
+	s(mc_video_protect_vpr_override, 26:26, secure_scratch53, 25:25);
+	s(mc_video_protect_vpr_override, 31:29, secure_scratch53, 28:26);
+	s(mc_video_protect_vpr_override1, 1:0, secure_scratch53, 30:29);
+	s(mc_video_protect_vpr_override1, 4:4, secure_scratch53, 31:31);
+	s(mc_sec_carveout_size_mb, 11:0, secure_scratch54, 11:0);
+	s(mc_mts_carveout_bom, 31:20, secure_scratch54, 23:12);
+	s(mc_video_protect_vpr_override1, 12:5, secure_scratch54, 31:24);
+	s(mc_mts_carveout_size_mb, 11:0, secure_scratch55, 11:0);
+	s(mc_generalized_carveout4_size_128kb, 11:0, secure_scratch55, 23:12);
+	s(mc_video_protect_vpr_override1, 16:13, secure_scratch55, 27:24);
+	s(mc_video_protect_vpr_override1, 26:25, secure_scratch55, 29:28);
+	s(mc_generalized_carveout2_cfg0, 1:0, secure_scratch55, 31:30);
+	s(mc_generalized_carveout3_size_128kb, 11:0, secure_scratch56, 11:0);
+	s(mc_generalized_carveout2_size_128kb, 11:0, secure_scratch56, 23:12);
+	s(mc_generalized_carveout2_cfg0, 2:2, secure_scratch56, 24:24);
+	s(mc_generalized_carveout2_cfg0, 26:22, secure_scratch56, 29:25);
+	s(mc_generalized_carveout1_cfg0, 1:0, secure_scratch56, 31:30);
+	s(mc_generalized_carveout1_size_128kb, 11:0, secure_scratch57, 11:0);
+	s(mc_generalized_carveout5_size_128kb, 11:0, secure_scratch57, 23:12);
+	s(mc_generalized_carveout1_cfg0, 2:2, secure_scratch57, 24:24);
+	s(mc_generalized_carveout1_cfg0, 26:22, secure_scratch57, 29:25);
+	s(mc_generalized_carveout3_cfg0, 1:0, secure_scratch57, 31:30);
+	s(mc_generalized_carveout3_cfg0, 2:2, secure_scratch58, 0:0);
+	s(mc_generalized_carveout3_cfg0, 26:22, secure_scratch58, 5:1);
 
 	s32(mc_generalized_carveout1_access0, secure_scratch59);
 	s32(mc_generalized_carveout1_access1, secure_scratch60);
@@ -1468,15 +2074,32 @@ static void _sdram_lp0_save_params_t210b01(const void *params)
 	s32(mc_generalized_carveout5_force_internal_access2, secure_scratch106);
 	s32(mc_generalized_carveout5_force_internal_access3, secure_scratch107);
 
-	pmc->secure_scratch58 = 32 * (32 * sdram->mc_generalized_carveout3_cfg0 >> 31) | (16 * (sdram->mc_generalized_carveout3_cfg0 << 6 >> 31) | (8 * (sdram->mc_generalized_carveout3_cfg0 << 7 >> 31) | (4 * (sdram->mc_generalized_carveout3_cfg0 << 8 >> 31) | (2 * (sdram->mc_generalized_carveout3_cfg0 << 9 >> 31) | ((sdram->mc_generalized_carveout3_cfg0 << 29 >> 31) | 2 * (pmc->secure_scratch58 >> 1)) & 0xFFFFFFFD) & 0xFFFFFFFB) & 0xFFFFFFF7) & 0xFFFFFFEF) & 0xFFFFFFDF;
-	pmc->scratch2 = (sdram->pllm_feedback_divider << 8) | ((u16)(sdram->pllm_post_divider) << 16) | sdram->pllm_input_divider | ((u16)(sdram->pllm_kvco) << 17) | ((u16)(sdram->pllm_kcp) << 18);
-	pmc->scratch35 = sdram->pllm_setup_control;
-	pmc->scratch3 = sdram->pllm_input_divider | ((u16)(sdram->pllm_kvco) << 21) | ((u16)(sdram->pllm_kcp) << 22) | 0x3E00;
-	pmc->scratch36 = sdram->pllm_setup_control;
-	pmc->scratch4 = (sdram->pllm_stable_time << 10) | sdram->pllm_stable_time;
-}
+	// PLLM. Unused, BCT is used for PLLM.
+	c32(0, scratch2);
+	s(pllm_input_divider, 7:0, scratch2, 7:0);
+	s(pllm_feedback_divider, 7:0, scratch2, 15:8);
+	s(pllm_post_divider, 0:0, scratch2, 16:16);
+	s(pllm_kvco, 0:0, scratch2, 17:17);
+	s(pllm_kcp, 1:0, scratch2, 19:18);
 
-#pragma GCC diagnostic pop
+	c32(0, scratch35);
+	s(pllm_setup_control, 27:0, scratch35, 27:0);
+
+	// PLLX.
+	s(pllm_input_divider, 7:0, scratch3, 7:0);
+	c(62, scratch3, 15:8); // 62 divn.
+	c(0, scratch3, 20:16); // 0  divp.
+	s(pllm_kvco, 0:0, scratch3, 21:21);
+	s(pllm_kcp, 1:0, scratch3, 23:22);
+	// s(pllm_kcp, 9:0, scratch3, 31:22);
+
+	c32(0, scratch36);
+	s(pllm_setup_control, 23:0, scratch36, 23:0);
+
+	// PLLM/PLLX.
+	s(pllm_stable_time, 9:0, scratch4, 9:0);
+	s(pllm_stable_time, 9:0, scratch4, 19:10);
+}
 
 void sdram_lp0_entry(void *sdram_config, bdkParams_t bp)
 {