CTCaer 7a37ddc45e bdk: vic: add hw version that this driver aims for ...

Also TRM lies about best cache width, like always.
The higher the faster. The lower the simpler alignment.
A balanced one is used by default.

2026-03-27 20:08:45 +01:00

..

di.c

bdk: display: reduce display off waiting time

2026-03-27 10:02:21 +01:00

di.h

bdk: display: improve and deduplicate more

2026-03-27 09:57:59 +01:00

di.inl

bdk: display: improve and deduplicate more

2026-03-27 09:57:59 +01:00

vic.c

bdk: vic: add hw version that this driver aims for

2026-03-27 20:08:45 +01:00

vic.h

bdk: constify various args

2024-10-04 21:45:57 +03:00