Files

CTCaer 6a43aa8c33 modules: set page size to 256 bytes

Since this runs on BPMP a meaningful alignment is 32 bytes, so use a nicer 256.
Reduces size of libs of up to 64KB.

If libs are compiled for armv7/8, 4KB should be used if missing from compiler.

2026-03-27 19:38:45 +01:00

Makefile

modules: set page size to 256 bytes

2026-03-27 19:38:45 +01:00

mtc_mc_emc_regs.h

minerva: update tov1.6_T210/v0.1_T21X

2026-03-27 09:55:12 +01:00

mtc_switch_tables.h

minerva: update tov1.6_T210/v0.1_T21X

2026-03-27 09:55:12 +01:00

mtc_table.h

lib: minerva: refactor table

2023-06-08 04:49:16 +03:00

mtc.h

minerva: update tov1.6_T210/v0.1_T21X

2026-03-27 09:55:12 +01:00

README.md

refactor: Remove all unwanted whitespace

2019-10-18 18:02:06 +03:00

sys_sdrammtc.c

modules: adjust for ianos changes

2026-03-27 19:38:45 +01:00

types.h

minerva: make is_pllmb and fsp automatic

2022-01-16 01:43:16 +02:00

README.md

Minerva Training Cell

Custom Nvidia Tegra X1 DRAM trainer.

For more, check Here.

Minerva Training Cell (c) 2018 CTCaer.

/* Pain... And suffering. */