Step 1: Compile
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@@ -2,7 +2,7 @@
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2018 shuffle2
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* Copyright (c) 2018 balika011
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* Copyright (c) 2019-2020 CTCaer
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* Copyright (c) 2019-2021 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -37,6 +37,8 @@
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#define FUSE_DISABLEREGPROGRAM 0x2C
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#define FUSE_WRITE_ACCESS_SW 0x30
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#define FUSE_PWR_GOOD_SW 0x34
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/*! Fuse Cached registers */
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#define FUSE_SKU_INFO 0x110
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#define FUSE_CPU_SPEEDO_0_CALIB 0x114
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#define FUSE_CPU_IDDQ_CALIB 0x118
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@@ -64,8 +66,10 @@
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#define FUSE_OPT_WAFER_ID 0x210
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#define FUSE_OPT_X_COORDINATE 0x214
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#define FUSE_OPT_Y_COORDINATE 0x218
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#define FUSE_OPT_OPS_RESERVED 0x220
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#define FUSE_GPU_IDDQ_CALIB 0x228
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#define FUSE_USB_CALIB_EXT 0x350
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#define FUSE_RESERVED_FIELD 0x354
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#define FUSE_RESERVED_ODM28_T210B01 0x240
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@@ -82,7 +86,8 @@ enum
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{
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FUSE_NX_HW_TYPE_ICOSA,
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FUSE_NX_HW_TYPE_IOWA,
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FUSE_NX_HW_TYPE_HOAG
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FUSE_NX_HW_TYPE_HOAG,
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FUSE_NX_HW_TYPE_AULA
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};
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enum
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@@ -97,7 +102,7 @@ u32 fuse_read_odm_keygen_rev();
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u32 fuse_read_dramid(bool raw_id);
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u32 fuse_read_hw_state();
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u32 fuse_read_hw_type();
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u8 fuse_count_burnt(u32 val);
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int fuse_set_sbk();
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void fuse_wait_idle();
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int fuse_read_ipatch(void (*ipatch)(u32 offset, u32 value));
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int fuse_read_evp_thunk(u32 *iram_evp_thunks, u32 *iram_evp_thunks_len);
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