niklascfw
1b4a81239b
Replaces the old vendored BDK with the one from hekate v6.5.5 (CTCaer's 2025/2026 refactors: sdmmc, SE, minerva v1.6, display, heap, return value homogenisation). OmniNX additions re-applied on top: bq24193_charger_connected() and jc_clear_input(); s_vprintf now ships with the BDK. Ported to the new API: - sd_mount(), sdmmc_storage_* and ini_parse() now return 0 on success. The installer checked ini_parse() != 1, which would have made it miss manifest.ini and run every install as a clean install. - SD helpers come from bdk/storage/sd.c (source/nx_sd.* removed), ffsystem.c from the BDK, diskio.c/ffconf.h from hekate (ffconf keeps the sd:/ volume prefix). - minerva_init() needs the minerva storage; the installer still drops to 800 MHz afterwards. - Payload launch follows hekate (sd_file_read, hw_deinit); coreboot path removed upstream. - Stack moved to 0x96000000: the old 0x83100000 is inside the new heap. - GUI/USB/compression parts of the BDK are not built.
99 lines
2.6 KiB
C
99 lines
2.6 KiB
C
/*
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* Copyright (c) 2018 naehrwert
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* Copyright (c) 2019-2023 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _GPIO_H_
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#define _GPIO_H_
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#include <utils/types.h>
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#define GPIO_MODE_SPIO 0
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#define GPIO_MODE_GPIO 1
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#define GPIO_OUTPUT_DISABLE 0
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#define GPIO_OUTPUT_ENABLE 1
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#define GPIO_IRQ_DISABLE 0
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#define GPIO_IRQ_ENABLE 1
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#define GPIO_LOW 0
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#define GPIO_HIGH 1
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#define GPIO_FALLING 0
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#define GPIO_RISING 1
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#define GPIO_LEVEL 0
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#define GPIO_EDGE 1
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#define GPIO_CONFIGURED_EDGE 0
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#define GPIO_ANY_EDGE_CHANGE 1
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/*! GPIO pins (0-7 for each port). */
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#define GPIO_PIN_0 BIT(0)
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#define GPIO_PIN_1 BIT(1)
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#define GPIO_PIN_2 BIT(2)
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#define GPIO_PIN_3 BIT(3)
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#define GPIO_PIN_4 BIT(4)
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#define GPIO_PIN_5 BIT(5)
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#define GPIO_PIN_6 BIT(6)
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#define GPIO_PIN_7 BIT(7)
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/*! GPIO ports (A-EE). */
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#define GPIO_PORT_A 0
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#define GPIO_PORT_B 1
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#define GPIO_PORT_C 2
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#define GPIO_PORT_D 3
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#define GPIO_PORT_E 4
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#define GPIO_PORT_F 5
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#define GPIO_PORT_G 6
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#define GPIO_PORT_H 7
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#define GPIO_PORT_I 8
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#define GPIO_PORT_J 9
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#define GPIO_PORT_K 10
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#define GPIO_PORT_L 11
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#define GPIO_PORT_M 12
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#define GPIO_PORT_N 13
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#define GPIO_PORT_O 14
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#define GPIO_PORT_P 15
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#define GPIO_PORT_Q 16
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#define GPIO_PORT_R 17
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#define GPIO_PORT_S 18
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#define GPIO_PORT_T 19
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#define GPIO_PORT_U 20
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#define GPIO_PORT_V 21
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#define GPIO_PORT_W 22
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#define GPIO_PORT_X 23
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#define GPIO_PORT_Y 24
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#define GPIO_PORT_Z 25
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#define GPIO_PORT_AA 26
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#define GPIO_PORT_BB 27
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#define GPIO_PORT_CC 28
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#define GPIO_PORT_DD 29
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#define GPIO_PORT_EE 30
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void gpio_config(u32 port, u32 pins, int mode);
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void gpio_output_enable(u32 port, u32 pins, int enable);
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void gpio_direction_input(u32 port, u32 pins);
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void gpio_direction_output(u32 port, u32 pins, int high);
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void gpio_write(u32 port, u32 pins, int high);
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int gpio_read(u32 port, u32 pins);
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void gpio_set_debounce(u32 port, u32 pins, u32 ms);
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int gpio_interrupt_status(u32 port, u32 pins);
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void gpio_interrupt_enable(u32 port, u32 pins, int enable);
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void gpio_interrupt_level(u32 port, u32 pins, int high, int edge, int delta);
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u32 gpio_get_bank_irq_id(u32 port);
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#endif
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