niklascfw
1b4a81239b
Replaces the old vendored BDK with the one from hekate v6.5.5 (CTCaer's 2025/2026 refactors: sdmmc, SE, minerva v1.6, display, heap, return value homogenisation). OmniNX additions re-applied on top: bq24193_charger_connected() and jc_clear_input(); s_vprintf now ships with the BDK. Ported to the new API: - sd_mount(), sdmmc_storage_* and ini_parse() now return 0 on success. The installer checked ini_parse() != 1, which would have made it miss manifest.ini and run every install as a clean install. - SD helpers come from bdk/storage/sd.c (source/nx_sd.* removed), ffsystem.c from the BDK, diskio.c/ffconf.h from hekate (ffconf keeps the sd:/ volume prefix). - minerva_init() needs the minerva storage; the installer still drops to 800 MHz afterwards. - Payload launch follows hekate (sd_file_read, hw_deinit); coreboot path removed upstream. - Stack moved to 0x96000000: the old 0x83100000 is inside the new heap. - GUI/USB/compression parts of the BDK are not built.
51 lines
1.8 KiB
C
51 lines
1.8 KiB
C
/*
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* Copyright (c) 2018-2023 CTCaer
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef _TSEC_T210_H_
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#define _TSEC_T210_H_
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#define TSEC_MAILBOX0 0x1040
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#define TSEC_MAILBOX1 0x1044
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#define TSEC_ITFEN 0x1048
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#define TSEC_ITFEN_CTXEN BIT(0)
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#define TSEC_ITFEN_MTHDEN BIT(1)
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#define TSEC_IRQMSET 0x1010
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#define TSEC_IRQMSET_WDTMR BIT(1)
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#define TSEC_IRQMSET_HALT BIT(4)
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#define TSEC_IRQMSET_EXTERR BIT(5)
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#define TSEC_IRQMSET_SWGEN0 BIT(6)
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#define TSEC_IRQMSET_SWGEN1 BIT(7)
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#define TSEC_IRQMSET_EXT(val) (((val) & 0xFF) << 8)
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#define TSEC_IRQDEST 0x101C
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#define TSEC_IRQDEST_HALT BIT(4)
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#define TSEC_IRQDEST_EXTERR BIT(5)
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#define TSEC_IRQDEST_SWGEN0 BIT(6)
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#define TSEC_IRQDEST_SWGEN1 BIT(7)
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#define TSEC_IRQDEST_EXT(val) (((val) & 0xFF) << 8)
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#define TSEC_CPUCTL 0x1100
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#define TSEC_CPUCTL_STARTCPU BIT(1)
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#define TSEC_BOOTVEC 0x1104
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#define TSEC_DMACTL 0x110C
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#define TSEC_DMATRFBASE 0x1110
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#define TSEC_DMATRFMOFFS 0x1114
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#define TSEC_DMATRFCMD 0x1118
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#define TSEC_DMATRFCMD_IDLE BIT(1)
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#define TSEC_DMATRFCMD_IMEM BIT(4)
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#define TSEC_DMATRFCMD_SIZE_256B (6 << 8)
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#define TSEC_DMATRFFBOFFS 0x111C
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#endif
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