72 lines
3.3 KiB
Diff
72 lines
3.3 KiB
Diff
diff --git a/bdk/power/max7762x.c b/bdk/power/max7762x.c
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index a7d30ce..d074009 100644
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--- a/bdk/power/max7762x.c
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+++ b/bdk/power/max7762x.c
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@@ -91,8 +91,8 @@ static const max77620_regulator_t _pmic_regulators[] = {
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{ "max77621_CPU", 6250, 606250, 1000000, 1400000, REGULATOR_BC0, MAX77621_VOUT_REG, MAX77621_VOUT_DVS_REG, MAX77621_DVC_DVS_VOLT_MASK, {{ MAX77621_CPU_CTRL1_POR_DEFAULT, MAX77621_CPU_CTRL1_HOS_DEFAULT, MAX77621_CPU_CTRL2_POR_DEFAULT, MAX77621_CPU_CTRL2_HOS_DEFAULT }} },
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{ "max77621_GPU", 6250, 606250, 1200000, 1400000, REGULATOR_BC0, MAX77621_VOUT_REG, MAX77621_VOUT_DVS_REG, MAX77621_DVC_DVS_VOLT_MASK, {{ MAX77621_CPU_CTRL1_POR_DEFAULT, MAX77621_CPU_CTRL1_HOS_DEFAULT, MAX77621_CPU_CTRL2_POR_DEFAULT, MAX77621_CPU_CTRL2_HOS_DEFAULT }} },
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{ "max77812_CPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M4_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M4_MASK, MAX77812_EN_CTRL_EN_M4_SHIFT, 0, 0 }} },
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- //{ "max77812_GPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M1_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M1_MASK, MAX77812_EN_CTRL_EN_M1_SHIFT, 0, 0 }} },
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- //{ "max77812_RAM", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M3_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M3_MASK, MAX77812_EN_CTRL_EN_M3_SHIFT, 0, 0 }} } // Only on PHASE211 configuration.
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+ { "max77812_GPU", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M1_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M1_MASK, MAX77812_EN_CTRL_EN_M1_SHIFT, 0, 0 }} },
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+ { "max77812_RAM", 5000, 250000, 600000, 1525000, REGULATOR_BC1, MAX77812_REG_M3_VOUT, MAX77812_REG_EN_CTRL, MAX77812_BUCK_VOLT_MASK, {{ MAX77812_EN_CTRL_EN_M3_MASK, MAX77812_EN_CTRL_EN_M3_SHIFT, 0, 0 }} } // Only on PHASE211 configuration.
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};
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static u8 _max77812_get_address()
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diff --git a/bdk/power/max7762x.h b/bdk/power/max7762x.h
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index 3478530..7a3e518 100644
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--- a/bdk/power/max7762x.h
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+++ b/bdk/power/max7762x.h
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@@ -61,9 +61,9 @@
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#define REGULATOR_CPU0 13
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#define REGULATOR_GPU0 14
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#define REGULATOR_CPU1 15
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-//#define REGULATOR_GPU1 16
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-//#define REGULATOR_GPU1 17
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-#define REGULATOR_MAX 15
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+#define REGULATOR_GPU1 16
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+#define REGULATOR_DRAM 17
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+#define REGULATOR_MAX 17
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#define MAX77621_CPU_I2C_ADDR 0x1B
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#define MAX77621_GPU_I2C_ADDR 0x1C
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diff --git a/bootloader/main.c b/bootloader/main.c
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index 62f4f5d..9506869 100644
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--- a/bootloader/main.c
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+++ b/bootloader/main.c
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@@ -1503,6 +1503,34 @@ void ipl_main()
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if (minerva_init()) //!TODO: Add Tegra210B01 support to minerva.
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h_cfg.errors |= ERR_LIBSYS_MTC;
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+ // DRAM overvolt.
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+ if (h_cfg.t210b01)
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+ {
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+ u32 dram_uV = 0;
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+
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+ LIST_INIT(ini_sections);
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+ if (ini_parse(&ini_sections, "oc.ini", false))
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+ {
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+ LIST_FOREACH_ENTRY(ini_sec_t, ini_sec, &ini_sections, link)
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+ {
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+ // Only parse emc section.
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+ if (strcmp(ini_sec->name, "emc"))
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+ continue;
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+
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+ LIST_FOREACH_ENTRY(ini_kv_t, kv, &ini_sec->kvs, link)
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+ {
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+ if (!strcmp("volt", kv->key))
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+ dram_uV = atoi(kv->val);
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+ }
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+
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+ break;
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+ }
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+ }
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+
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+ if (dram_uV)
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+ max7762x_regulator_set_voltage(REGULATOR_DRAM, dram_uV);
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+ }
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+
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display_init();
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u32 *fb = display_init_framebuffer_pitch();
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