4 Commits
0.35 ... 0.36

Author SHA1 Message Date
Lightos1
0bc9547701 Add advanced header 2026-02-10 15:12:17 +01:00
Lightos1
96ac254022 Add w2r fine tune 2026-02-10 15:04:28 +01:00
Souldbminer
92f378a80f fix svfs again 2026-02-09 18:59:09 -05:00
Lightos1
589af01ad8 Budget dvfs fix 2026-02-10 00:39:22 +01:00
7 changed files with 54 additions and 20 deletions

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@@ -176,6 +176,8 @@ volatile CustomizeTable C = {
DEACTIVATED_GPU_FREQ /* 1536 (Disabled by default) */, DEACTIVATED_GPU_FREQ /* 1536 (Disabled by default) */,
}, },
.fineTune_t7_tWTR = 0,
/* You shouldn't have to anything past here. */ /* You shouldn't have to anything past here. */
.eristaCpuDvfsTable = { .eristaCpuDvfsTable = {
{ 204000, { 721094, }, { } }, { 204000, { 721094, }, { } },

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@@ -121,12 +121,15 @@ typedef struct CustomizeTable {
u32 commonGpuVoltOffset; u32 commonGpuVoltOffset;
/* TODO: Automatically detect speedo. */
u32 gpuSpeedo; u32 gpuSpeedo;
u32 eristaGpuVoltArray[27]; u32 eristaGpuVoltArray[27];
u32 marikoGpuVoltArray[24]; u32 marikoGpuVoltArray[24];
u32 reserved[64];
u32 fineTune_t7_tWTR;
u32 reserved[60];
CustomizeCpuDvfsTable eristaCpuDvfsTable; CustomizeCpuDvfsTable eristaCpuDvfsTable;
CustomizeCpuDvfsTable eristaCpuDvfsTableSLT; CustomizeCpuDvfsTable eristaCpuDvfsTableSLT;

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@@ -132,6 +132,7 @@ namespace ams::ldr::hoc {
const double tRRD = tRRD_values[C.t4_tRRD]; const double tRRD = tRRD_values[C.t4_tRRD];
const u32 tRFCpb = tRFC_values[C.t5_tRFC]; const u32 tRFCpb = tRFC_values[C.t5_tRFC];
const u32 tWTR = 10 - tWTR_values[C.t7_tWTR]; const u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
const s32 finetWTR = C.fineTune_t7_tWTR;
const u32 tRC = tRAS + tRPpb; const u32 tRC = tRAS + tRPpb;
const u32 tRFCab = tRFCpb * 2; const u32 tRFCab = tRFCpb * 2;
@@ -158,7 +159,7 @@ namespace ams::ldr::hoc {
const u32 qsafe = (einput_duration + 3) + MAX(MIN(qrstLow * rdv, qrst_duration + qrst_duration), einput); const u32 qsafe = (einput_duration + 3) + MAX(MIN(qrstLow * rdv, qrst_duration + qrst_duration), einput);
const u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5; const u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5;
const u32 tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL_DBI + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2)); const u32 tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL_DBI + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
const u32 tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL_DBI)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg); const u32 tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL_DBI)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg) + finetWTR;
const u32 tWTM = CEIL(WL + ((7.570 / tCK_avg) + 8.753)); const u32 tWTM = CEIL(WL + ((7.570 / tCK_avg) + 8.753));
const u32 tWATM = (tWTM + (FLOOR(WL / 0.816) * 2.0)) - 4.0; const u32 tWATM = (tWTM + (FLOOR(WL / 0.816) * 2.0)) - 4.0;

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@@ -158,6 +158,8 @@ typedef enum {
KipConfigValue_g_volt_e_1036800, KipConfigValue_g_volt_e_1036800,
KipConfigValue_g_volt_e_1075200, KipConfigValue_g_volt_e_1075200,
KipConfigValue_t7_tWTR_fine_tune,
KipCrc32, KipCrc32,
HocClkConfigValue_IsFirstLoad, HocClkConfigValue_IsFirstLoad,
SysClkConfigValue_EnumMax, SysClkConfigValue_EnumMax,
@@ -370,6 +372,7 @@ static inline const char* sysclkFormatConfigValue(SysClkConfigValue val, bool pr
case KipConfigValue_g_volt_e_998400: return pretty ? "Erista GPU Volt 998 MHz" : "g_volt_e_998400"; case KipConfigValue_g_volt_e_998400: return pretty ? "Erista GPU Volt 998 MHz" : "g_volt_e_998400";
case KipConfigValue_g_volt_e_1036800: return pretty ? "Erista GPU Volt 1036 MHz" : "g_volt_e_1036800"; case KipConfigValue_g_volt_e_1036800: return pretty ? "Erista GPU Volt 1036 MHz" : "g_volt_e_1036800";
case KipConfigValue_g_volt_e_1075200: return pretty ? "Erista GPU Volt 1075 MHz" : "g_volt_e_1075200"; case KipConfigValue_g_volt_e_1075200: return pretty ? "Erista GPU Volt 1075 MHz" : "g_volt_e_1075200";
case KipConfigValue_t7_tWTR_fine_tune: return pretty ? "t7 - tWTR Fine Tune" : "t7_tWTR_fine_tune";
case KipCrc32: case KipCrc32:
return pretty ? "CRC32" : "crc32"; return pretty ? "CRC32" : "crc32";
case HocClkConfigValue_IsFirstLoad: case HocClkConfigValue_IsFirstLoad:
@@ -534,6 +537,7 @@ static inline uint64_t sysclkValidConfigValue(SysClkConfigValue val, uint64_t in
case KipConfigValue_g_volt_e_1075200: case KipConfigValue_g_volt_e_1075200:
case KipConfigValue_eristaCpuVmin: case KipConfigValue_eristaCpuVmin:
case KipConfigValue_eristaCpuUnlock: case KipConfigValue_eristaCpuUnlock:
case KipConfigValue_t7_tWTR_fine_tune:
case KipCrc32: case KipCrc32:
return true; return true;
case HorizonOCConfigValue_BatteryChargeCurrent: case HorizonOCConfigValue_BatteryChargeCurrent:

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@@ -27,6 +27,7 @@
#if IS_MINIMAL == 1 #if IS_MINIMAL == 1
#pragma message("Compiling with minimal features") #pragma message("Compiling with minimal features")
#endif #endif
class RamSubmenuGui; class RamSubmenuGui;
class RamTimingsSubmenuGui; class RamTimingsSubmenuGui;
class RamLatenciesSubmenuGui; class RamLatenciesSubmenuGui;
@@ -650,6 +651,20 @@ protected:
addConfigButton(KipConfigValue_t6_tRTW, "t6 tRTW", ValueRange(0, 10, 1, "", 1), "tRTW", &thresholdsDisabled, {}, {}, false); addConfigButton(KipConfigValue_t6_tRTW, "t6 tRTW", ValueRange(0, 10, 1, "", 1), "tRTW", &thresholdsDisabled, {}, {}, false);
addConfigButton(KipConfigValue_t7_tWTR, "t7 tWTR", ValueRange(0, 10, 1, "", 1), "tWTR", &thresholdsDisabled, {}, {}, false); addConfigButton(KipConfigValue_t7_tWTR, "t7 tWTR", ValueRange(0, 10, 1, "", 1), "tWTR", &thresholdsDisabled, {}, {}, false);
addConfigButton(KipConfigValue_t8_tREFI, "t8 tREFI", ValueRange(0, 6, 1, "", 1), "tREFI", &thresholdsDisabled, {}, {}, false); addConfigButton(KipConfigValue_t8_tREFI, "t8 tREFI", ValueRange(0, 6, 1, "", 1), "tREFI", &thresholdsDisabled, {}, {}, false);
std::vector<NamedValue> t7_tWTR_fine_tune = {
NamedValue("-3", 0xFFFFFFFD),
NamedValue("-2", 0xFFFFFFFE),
NamedValue("-1", 0xFFFFFFFF),
NamedValue(" 0", 0),
NamedValue("+1", 1),
NamedValue("+2", 2),
NamedValue("+3", 3),
};
this->listElement->addItem(new tsl::elm::CategoryHeader("Advanced"));
addConfigButton(KipConfigValue_t7_tWTR_fine_tune, "t7 tWTR Fine Tune", ValueRange(0, 6, 1, "", 0), "t7 tWTR Fine Tune", &thresholdsDisabled, {}, t7_tWTR_fine_tune, false);
#if IS_MINIMAL == 0 #if IS_MINIMAL == 0
if(IsMariko()) { if(IsMariko()) {
this->listElement->addItem(new tsl::elm::CategoryHeader("Experimental")); this->listElement->addItem(new tsl::elm::CategoryHeader("Experimental"));

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@@ -816,6 +816,8 @@ void ClockManager::SetKipData() {
table.eristaGpuVoltArray[i] = this->config->GetConfigValue((SysClkConfigValue)(KipConfigValue_g_volt_e_76800 + i)); table.eristaGpuVoltArray[i] = this->config->GetConfigValue((SysClkConfigValue)(KipConfigValue_g_volt_e_76800 + i));
} }
CUST_WRITE_FIELD_BATCH(&table, t7_tWTR_fine_tune, this->config->GetConfigValue(KipConfigValue_t7_tWTR_fine_tune));
if (!cust_write_table("sdmc:/atmosphere/kips/hoc.kip", &table)) { if (!cust_write_table("sdmc:/atmosphere/kips/hoc.kip", &table)) {
FileUtils::LogLine("[clock_manager] Failed to write KIP file"); FileUtils::LogLine("[clock_manager] Failed to write KIP file");
writeNotification("Horizon OC\nKip write failed"); writeNotification("Horizon OC\nKip write failed");
@@ -908,7 +910,6 @@ void ClockManager::GetKipData() {
initialConfigValues[KipConfigValue_eristaCpuMaxVolt] = cust_get_erista_cpu_max_volt(&table); initialConfigValues[KipConfigValue_eristaCpuMaxVolt] = cust_get_erista_cpu_max_volt(&table);
initialConfigValues[KipConfigValue_eristaCpuUnlock] = cust_get_eristaCpuUnlock(&table); initialConfigValues[KipConfigValue_eristaCpuUnlock] = cust_get_eristaCpuUnlock(&table);
initialConfigValues[KipConfigValue_marikoCpuUVLow] = cust_get_mariko_cpu_uv_low(&table); initialConfigValues[KipConfigValue_marikoCpuUVLow] = cust_get_mariko_cpu_uv_low(&table);
initialConfigValues[KipConfigValue_marikoCpuUVHigh] = cust_get_mariko_cpu_uv_high(&table); initialConfigValues[KipConfigValue_marikoCpuUVHigh] = cust_get_mariko_cpu_uv_high(&table);
initialConfigValues[KipConfigValue_tableConf] = cust_get_table_conf(&table); initialConfigValues[KipConfigValue_tableConf] = cust_get_table_conf(&table);
@@ -926,6 +927,7 @@ void ClockManager::GetKipData() {
initialConfigValues[KipConfigValue_marikoGpuVmax] = cust_get_mariko_gpu_vmax(&table); initialConfigValues[KipConfigValue_marikoGpuVmax] = cust_get_mariko_gpu_vmax(&table);
initialConfigValues[KipConfigValue_commonGpuVoltOffset] = cust_get_common_gpu_offset(&table); initialConfigValues[KipConfigValue_commonGpuVoltOffset] = cust_get_common_gpu_offset(&table);
initialConfigValues[KipConfigValue_gpuSpeedo] = cust_get_gpu_speedo(&table); initialConfigValues[KipConfigValue_gpuSpeedo] = cust_get_gpu_speedo(&table);
initialConfigValues[KipConfigValue_t7_tWTR_fine_tune] = cust_get_tWTR_fine_tune(&table);
} }
// configValues.values[KipConfigValue_mtcConf] = cust_get_mtc_conf(&table); // configValues.values[KipConfigValue_mtcConf] = cust_get_mtc_conf(&table);
@@ -982,6 +984,8 @@ void ClockManager::GetKipData() {
initialConfigValues[KipConfigValue_g_volt_e_76800 + i] = cust_get_erista_gpu_volt(&table, i); initialConfigValues[KipConfigValue_g_volt_e_76800 + i] = cust_get_erista_gpu_volt(&table, i);
} }
configValues.values[KipConfigValue_t7_tWTR_fine_tune] = cust_get_tWTR_fine_tune(&table);
// if(cust_get_cust_rev(&table) == KIP_CUST_REV) // if(cust_get_cust_rev(&table) == KIP_CUST_REV)
// return; // return;

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@@ -77,7 +77,10 @@ typedef struct {
u32 eristaGpuVoltArray[27]; u32 eristaGpuVoltArray[27];
u32 marikoGpuVoltArray[24]; u32 marikoGpuVoltArray[24];
u32 reserved[64];
u32 t7_tWTR_fine_tune;
u32 reserved[60];
} CustomizeTable; } CustomizeTable;
#pragma pack(pop) #pragma pack(pop)
@@ -200,6 +203,7 @@ static inline bool cust_set_tRFC(const char* p, u32 v) { CUST_WRITE_FIELD(p, t5_
static inline bool cust_set_tRTW(const char* p, u32 v) { CUST_WRITE_FIELD(p, t6_tRTW, v); } static inline bool cust_set_tRTW(const char* p, u32 v) { CUST_WRITE_FIELD(p, t6_tRTW, v); }
static inline bool cust_set_tWTR(const char* p, u32 v) { CUST_WRITE_FIELD(p, t7_tWTR, v); } static inline bool cust_set_tWTR(const char* p, u32 v) { CUST_WRITE_FIELD(p, t7_tWTR, v); }
static inline bool cust_set_tREFI(const char* p, u32 v) { CUST_WRITE_FIELD(p, t8_tREFI, v); } static inline bool cust_set_tREFI(const char* p, u32 v) { CUST_WRITE_FIELD(p, t8_tREFI, v); }
static inline bool cust_set_tWTR_fine_tune(const char* p, u32 v) { CUST_WRITE_FIELD(p, t7_tWTR_fine_tune, v); }
static inline bool cust_set_burst_read_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_read_latency, v); } static inline bool cust_set_burst_read_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_read_latency, v); }
static inline bool cust_set_burst_write_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_write_latency, v); } static inline bool cust_set_burst_write_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_write_latency, v); }
@@ -267,6 +271,7 @@ static inline u32 cust_get_tRFC(const CustomizeTable* t) { return CUST_GET_FIELD
static inline u32 cust_get_tRTW(const CustomizeTable* t) { return CUST_GET_FIELD(t, t6_tRTW); } static inline u32 cust_get_tRTW(const CustomizeTable* t) { return CUST_GET_FIELD(t, t6_tRTW); }
static inline u32 cust_get_tWTR(const CustomizeTable* t) { return CUST_GET_FIELD(t, t7_tWTR); } static inline u32 cust_get_tWTR(const CustomizeTable* t) { return CUST_GET_FIELD(t, t7_tWTR); }
static inline u32 cust_get_tREFI(const CustomizeTable* t) { return CUST_GET_FIELD(t, t8_tREFI); } static inline u32 cust_get_tREFI(const CustomizeTable* t) { return CUST_GET_FIELD(t, t8_tREFI); }
static inline u32 cust_get_tWTR_fine_tune(const CustomizeTable* t) { return CUST_GET_FIELD(t, t7_tWTR_fine_tune); }
static inline u32 cust_get_burst_read_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_read_latency); } static inline u32 cust_get_burst_read_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_read_latency); }
static inline u32 cust_get_burst_write_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_write_latency); } static inline u32 cust_get_burst_write_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_write_latency); }