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4 Commits
| Author | SHA1 | Date | |
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0bc9547701 | ||
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96ac254022 | ||
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92f378a80f | ||
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589af01ad8 |
@@ -176,6 +176,8 @@ volatile CustomizeTable C = {
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DEACTIVATED_GPU_FREQ /* 1536 (Disabled by default) */,
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DEACTIVATED_GPU_FREQ /* 1536 (Disabled by default) */,
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},
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},
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.fineTune_t7_tWTR = 0,
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/* You shouldn't have to anything past here. */
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/* You shouldn't have to anything past here. */
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.eristaCpuDvfsTable = {
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.eristaCpuDvfsTable = {
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{ 204000, { 721094, }, { } },
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{ 204000, { 721094, }, { } },
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@@ -121,12 +121,15 @@ typedef struct CustomizeTable {
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u32 commonGpuVoltOffset;
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u32 commonGpuVoltOffset;
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/* TODO: Automatically detect speedo. */
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u32 gpuSpeedo;
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u32 gpuSpeedo;
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u32 eristaGpuVoltArray[27];
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u32 eristaGpuVoltArray[27];
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u32 marikoGpuVoltArray[24];
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u32 marikoGpuVoltArray[24];
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u32 reserved[64];
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u32 fineTune_t7_tWTR;
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u32 reserved[60];
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CustomizeCpuDvfsTable eristaCpuDvfsTable;
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CustomizeCpuDvfsTable eristaCpuDvfsTable;
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CustomizeCpuDvfsTable eristaCpuDvfsTableSLT;
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CustomizeCpuDvfsTable eristaCpuDvfsTableSLT;
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@@ -132,6 +132,7 @@ namespace ams::ldr::hoc {
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const double tRRD = tRRD_values[C.t4_tRRD];
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const double tRRD = tRRD_values[C.t4_tRRD];
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const u32 tRFCpb = tRFC_values[C.t5_tRFC];
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const u32 tRFCpb = tRFC_values[C.t5_tRFC];
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const u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
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const u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
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const s32 finetWTR = C.fineTune_t7_tWTR;
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const u32 tRC = tRAS + tRPpb;
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const u32 tRC = tRAS + tRPpb;
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const u32 tRFCab = tRFCpb * 2;
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const u32 tRFCab = tRFCpb * 2;
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@@ -158,7 +159,7 @@ namespace ams::ldr::hoc {
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const u32 qsafe = (einput_duration + 3) + MAX(MIN(qrstLow * rdv, qrst_duration + qrst_duration), einput);
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const u32 qsafe = (einput_duration + 3) + MAX(MIN(qrstLow * rdv, qrst_duration + qrst_duration), einput);
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const u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5;
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const u32 tW2P = (CEIL(WL * 1.7303) * 2) - 5;
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const u32 tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL_DBI + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
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const u32 tWTPDEN = CEIL(((1.803 / tCK_avg) + MAX(RL_DBI + (2.694 / tCK_avg), static_cast<double>(tW2P))) + (BL / 2));
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const u32 tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL_DBI)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg);
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const u32 tW2R = FLOOR(MAX((5.020 / tCK_avg) + 1.130, WL - MAX(-CEIL(0.258 * (WL - RL_DBI)), 1.964)) * 1.964) + WL - CEIL(tWTR / tCK_avg) + finetWTR;
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const u32 tWTM = CEIL(WL + ((7.570 / tCK_avg) + 8.753));
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const u32 tWTM = CEIL(WL + ((7.570 / tCK_avg) + 8.753));
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const u32 tWATM = (tWTM + (FLOOR(WL / 0.816) * 2.0)) - 4.0;
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const u32 tWATM = (tWTM + (FLOOR(WL / 0.816) * 2.0)) - 4.0;
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@@ -158,6 +158,8 @@ typedef enum {
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KipConfigValue_g_volt_e_1036800,
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KipConfigValue_g_volt_e_1036800,
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KipConfigValue_g_volt_e_1075200,
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KipConfigValue_g_volt_e_1075200,
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KipConfigValue_t7_tWTR_fine_tune,
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KipCrc32,
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KipCrc32,
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HocClkConfigValue_IsFirstLoad,
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HocClkConfigValue_IsFirstLoad,
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SysClkConfigValue_EnumMax,
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SysClkConfigValue_EnumMax,
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@@ -370,6 +372,7 @@ static inline const char* sysclkFormatConfigValue(SysClkConfigValue val, bool pr
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case KipConfigValue_g_volt_e_998400: return pretty ? "Erista GPU Volt 998 MHz" : "g_volt_e_998400";
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case KipConfigValue_g_volt_e_998400: return pretty ? "Erista GPU Volt 998 MHz" : "g_volt_e_998400";
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case KipConfigValue_g_volt_e_1036800: return pretty ? "Erista GPU Volt 1036 MHz" : "g_volt_e_1036800";
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case KipConfigValue_g_volt_e_1036800: return pretty ? "Erista GPU Volt 1036 MHz" : "g_volt_e_1036800";
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case KipConfigValue_g_volt_e_1075200: return pretty ? "Erista GPU Volt 1075 MHz" : "g_volt_e_1075200";
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case KipConfigValue_g_volt_e_1075200: return pretty ? "Erista GPU Volt 1075 MHz" : "g_volt_e_1075200";
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case KipConfigValue_t7_tWTR_fine_tune: return pretty ? "t7 - tWTR Fine Tune" : "t7_tWTR_fine_tune";
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case KipCrc32:
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case KipCrc32:
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return pretty ? "CRC32" : "crc32";
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return pretty ? "CRC32" : "crc32";
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case HocClkConfigValue_IsFirstLoad:
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case HocClkConfigValue_IsFirstLoad:
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@@ -534,6 +537,7 @@ static inline uint64_t sysclkValidConfigValue(SysClkConfigValue val, uint64_t in
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case KipConfigValue_g_volt_e_1075200:
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case KipConfigValue_g_volt_e_1075200:
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case KipConfigValue_eristaCpuVmin:
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case KipConfigValue_eristaCpuVmin:
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case KipConfigValue_eristaCpuUnlock:
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case KipConfigValue_eristaCpuUnlock:
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case KipConfigValue_t7_tWTR_fine_tune:
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case KipCrc32:
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case KipCrc32:
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return true;
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return true;
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case HorizonOCConfigValue_BatteryChargeCurrent:
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case HorizonOCConfigValue_BatteryChargeCurrent:
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@@ -27,6 +27,7 @@
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#if IS_MINIMAL == 1
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#if IS_MINIMAL == 1
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#pragma message("Compiling with minimal features")
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#pragma message("Compiling with minimal features")
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#endif
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#endif
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class RamSubmenuGui;
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class RamSubmenuGui;
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class RamTimingsSubmenuGui;
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class RamTimingsSubmenuGui;
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class RamLatenciesSubmenuGui;
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class RamLatenciesSubmenuGui;
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@@ -650,6 +651,20 @@ protected:
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addConfigButton(KipConfigValue_t6_tRTW, "t6 tRTW", ValueRange(0, 10, 1, "", 1), "tRTW", &thresholdsDisabled, {}, {}, false);
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addConfigButton(KipConfigValue_t6_tRTW, "t6 tRTW", ValueRange(0, 10, 1, "", 1), "tRTW", &thresholdsDisabled, {}, {}, false);
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addConfigButton(KipConfigValue_t7_tWTR, "t7 tWTR", ValueRange(0, 10, 1, "", 1), "tWTR", &thresholdsDisabled, {}, {}, false);
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addConfigButton(KipConfigValue_t7_tWTR, "t7 tWTR", ValueRange(0, 10, 1, "", 1), "tWTR", &thresholdsDisabled, {}, {}, false);
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addConfigButton(KipConfigValue_t8_tREFI, "t8 tREFI", ValueRange(0, 6, 1, "", 1), "tREFI", &thresholdsDisabled, {}, {}, false);
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addConfigButton(KipConfigValue_t8_tREFI, "t8 tREFI", ValueRange(0, 6, 1, "", 1), "tREFI", &thresholdsDisabled, {}, {}, false);
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std::vector<NamedValue> t7_tWTR_fine_tune = {
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NamedValue("-3", 0xFFFFFFFD),
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NamedValue("-2", 0xFFFFFFFE),
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NamedValue("-1", 0xFFFFFFFF),
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NamedValue(" 0", 0),
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NamedValue("+1", 1),
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NamedValue("+2", 2),
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NamedValue("+3", 3),
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};
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this->listElement->addItem(new tsl::elm::CategoryHeader("Advanced"));
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addConfigButton(KipConfigValue_t7_tWTR_fine_tune, "t7 tWTR Fine Tune", ValueRange(0, 6, 1, "", 0), "t7 tWTR Fine Tune", &thresholdsDisabled, {}, t7_tWTR_fine_tune, false);
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#if IS_MINIMAL == 0
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#if IS_MINIMAL == 0
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if(IsMariko()) {
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if(IsMariko()) {
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this->listElement->addItem(new tsl::elm::CategoryHeader("Experimental"));
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this->listElement->addItem(new tsl::elm::CategoryHeader("Experimental"));
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@@ -816,6 +816,8 @@ void ClockManager::SetKipData() {
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table.eristaGpuVoltArray[i] = this->config->GetConfigValue((SysClkConfigValue)(KipConfigValue_g_volt_e_76800 + i));
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table.eristaGpuVoltArray[i] = this->config->GetConfigValue((SysClkConfigValue)(KipConfigValue_g_volt_e_76800 + i));
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}
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}
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CUST_WRITE_FIELD_BATCH(&table, t7_tWTR_fine_tune, this->config->GetConfigValue(KipConfigValue_t7_tWTR_fine_tune));
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if (!cust_write_table("sdmc:/atmosphere/kips/hoc.kip", &table)) {
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if (!cust_write_table("sdmc:/atmosphere/kips/hoc.kip", &table)) {
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FileUtils::LogLine("[clock_manager] Failed to write KIP file");
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FileUtils::LogLine("[clock_manager] Failed to write KIP file");
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writeNotification("Horizon OC\nKip write failed");
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writeNotification("Horizon OC\nKip write failed");
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@@ -908,7 +910,6 @@ void ClockManager::GetKipData() {
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initialConfigValues[KipConfigValue_eristaCpuMaxVolt] = cust_get_erista_cpu_max_volt(&table);
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initialConfigValues[KipConfigValue_eristaCpuMaxVolt] = cust_get_erista_cpu_max_volt(&table);
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initialConfigValues[KipConfigValue_eristaCpuUnlock] = cust_get_eristaCpuUnlock(&table);
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initialConfigValues[KipConfigValue_eristaCpuUnlock] = cust_get_eristaCpuUnlock(&table);
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initialConfigValues[KipConfigValue_marikoCpuUVLow] = cust_get_mariko_cpu_uv_low(&table);
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initialConfigValues[KipConfigValue_marikoCpuUVLow] = cust_get_mariko_cpu_uv_low(&table);
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initialConfigValues[KipConfigValue_marikoCpuUVHigh] = cust_get_mariko_cpu_uv_high(&table);
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initialConfigValues[KipConfigValue_marikoCpuUVHigh] = cust_get_mariko_cpu_uv_high(&table);
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initialConfigValues[KipConfigValue_tableConf] = cust_get_table_conf(&table);
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initialConfigValues[KipConfigValue_tableConf] = cust_get_table_conf(&table);
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@@ -926,6 +927,7 @@ void ClockManager::GetKipData() {
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initialConfigValues[KipConfigValue_marikoGpuVmax] = cust_get_mariko_gpu_vmax(&table);
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initialConfigValues[KipConfigValue_marikoGpuVmax] = cust_get_mariko_gpu_vmax(&table);
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initialConfigValues[KipConfigValue_commonGpuVoltOffset] = cust_get_common_gpu_offset(&table);
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initialConfigValues[KipConfigValue_commonGpuVoltOffset] = cust_get_common_gpu_offset(&table);
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initialConfigValues[KipConfigValue_gpuSpeedo] = cust_get_gpu_speedo(&table);
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initialConfigValues[KipConfigValue_gpuSpeedo] = cust_get_gpu_speedo(&table);
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initialConfigValues[KipConfigValue_t7_tWTR_fine_tune] = cust_get_tWTR_fine_tune(&table);
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}
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}
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// configValues.values[KipConfigValue_mtcConf] = cust_get_mtc_conf(&table);
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// configValues.values[KipConfigValue_mtcConf] = cust_get_mtc_conf(&table);
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@@ -982,6 +984,8 @@ void ClockManager::GetKipData() {
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initialConfigValues[KipConfigValue_g_volt_e_76800 + i] = cust_get_erista_gpu_volt(&table, i);
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initialConfigValues[KipConfigValue_g_volt_e_76800 + i] = cust_get_erista_gpu_volt(&table, i);
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}
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}
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configValues.values[KipConfigValue_t7_tWTR_fine_tune] = cust_get_tWTR_fine_tune(&table);
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// if(cust_get_cust_rev(&table) == KIP_CUST_REV)
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// if(cust_get_cust_rev(&table) == KIP_CUST_REV)
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// return;
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// return;
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@@ -77,7 +77,10 @@ typedef struct {
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u32 eristaGpuVoltArray[27];
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u32 eristaGpuVoltArray[27];
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u32 marikoGpuVoltArray[24];
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u32 marikoGpuVoltArray[24];
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u32 reserved[64];
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u32 t7_tWTR_fine_tune;
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u32 reserved[60];
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} CustomizeTable;
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} CustomizeTable;
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#pragma pack(pop)
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#pragma pack(pop)
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@@ -200,6 +203,7 @@ static inline bool cust_set_tRFC(const char* p, u32 v) { CUST_WRITE_FIELD(p, t5_
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static inline bool cust_set_tRTW(const char* p, u32 v) { CUST_WRITE_FIELD(p, t6_tRTW, v); }
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static inline bool cust_set_tRTW(const char* p, u32 v) { CUST_WRITE_FIELD(p, t6_tRTW, v); }
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static inline bool cust_set_tWTR(const char* p, u32 v) { CUST_WRITE_FIELD(p, t7_tWTR, v); }
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static inline bool cust_set_tWTR(const char* p, u32 v) { CUST_WRITE_FIELD(p, t7_tWTR, v); }
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static inline bool cust_set_tREFI(const char* p, u32 v) { CUST_WRITE_FIELD(p, t8_tREFI, v); }
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static inline bool cust_set_tREFI(const char* p, u32 v) { CUST_WRITE_FIELD(p, t8_tREFI, v); }
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static inline bool cust_set_tWTR_fine_tune(const char* p, u32 v) { CUST_WRITE_FIELD(p, t7_tWTR_fine_tune, v); }
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static inline bool cust_set_burst_read_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_read_latency, v); }
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static inline bool cust_set_burst_read_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_read_latency, v); }
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static inline bool cust_set_burst_write_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_write_latency, v); }
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static inline bool cust_set_burst_write_lat(const char* p, u32 v) { CUST_WRITE_FIELD(p, mem_burst_write_latency, v); }
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@@ -267,6 +271,7 @@ static inline u32 cust_get_tRFC(const CustomizeTable* t) { return CUST_GET_FIELD
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static inline u32 cust_get_tRTW(const CustomizeTable* t) { return CUST_GET_FIELD(t, t6_tRTW); }
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static inline u32 cust_get_tRTW(const CustomizeTable* t) { return CUST_GET_FIELD(t, t6_tRTW); }
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static inline u32 cust_get_tWTR(const CustomizeTable* t) { return CUST_GET_FIELD(t, t7_tWTR); }
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static inline u32 cust_get_tWTR(const CustomizeTable* t) { return CUST_GET_FIELD(t, t7_tWTR); }
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static inline u32 cust_get_tREFI(const CustomizeTable* t) { return CUST_GET_FIELD(t, t8_tREFI); }
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static inline u32 cust_get_tREFI(const CustomizeTable* t) { return CUST_GET_FIELD(t, t8_tREFI); }
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static inline u32 cust_get_tWTR_fine_tune(const CustomizeTable* t) { return CUST_GET_FIELD(t, t7_tWTR_fine_tune); }
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static inline u32 cust_get_burst_read_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_read_latency); }
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static inline u32 cust_get_burst_read_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_read_latency); }
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static inline u32 cust_get_burst_write_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_write_latency); }
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static inline u32 cust_get_burst_write_lat(const CustomizeTable* t) { return CUST_GET_FIELD(t, mem_burst_write_latency); }
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Reference in New Issue
Block a user