diff --git a/Source/Configurator/hoc.kip b/Source/Configurator/hoc.kip
new file mode 100644
index 00000000..405aacaa
Binary files /dev/null and b/Source/Configurator/hoc.kip differ
diff --git a/Source/Configurator/loader_edit.kip b/Source/Configurator/loader_edit.kip
deleted file mode 100644
index d2022b50..00000000
Binary files a/Source/Configurator/loader_edit.kip and /dev/null differ
diff --git a/Source/Configurator/src/ram.py b/Source/Configurator/src/ram.py
index 137818fc..c20f1276 100644
--- a/Source/Configurator/src/ram.py
+++ b/Source/Configurator/src/ram.py
@@ -129,12 +129,21 @@ def populate():
     dpg.add_separator(label="Primary Timings")
 
     dpg.add_combo(
-        items=["0 (1600bl)", "2 (1866bl)", "4 (2133bl)"],
-        default_value="2",
-        label="Base Latency (unused)",
+        items=list(range(0, 12)),
+        default_value="0",
+        label="Burst Latency (read)",
         callback=k.grab_kip_storage_values_no_mult,
-        tag="mem_burst_latency"
+        tag="mem_burst_read_latency"
     )
+
+    dpg.add_combo(
+        items=list(range(0, 12)),
+        default_value="0",
+        label="Burst Latency (write)",
+        callback=k.grab_kip_storage_values_no_mult,
+        tag="mem_burst_write_latency"
+    )
+
     dpg.add_slider_int(label="t1 tRCD", min_value=0, max_value=7, tag="t1_tRCD", callback=k.grab_kip_storage_values_no_mult)
     dpg.add_slider_int(label="t2 tRP", min_value=0, max_value=7, tag="t2_tRP", callback=k.grab_kip_storage_values_no_mult)
     dpg.add_slider_int(label="t3 tRAS", min_value=0, max_value=9, tag="t3_tRAS", callback=k.grab_kip_storage_values_no_mult)
diff --git a/Source/Configurator/src/settings.py b/Source/Configurator/src/settings.py
index 3fbeb8fe..22c98ea7 100644
--- a/Source/Configurator/src/settings.py
+++ b/Source/Configurator/src/settings.py
@@ -83,7 +83,8 @@ variables = [
     ("t6_tRTW", "u32"),
     ("t7_tWTR", "u32"),
     ("t8_tREFI", "u32"),
-    ("mem_burst_latency", "u32"),
+    ("mem_burst_read_latency", "u32"),
+    ("mem_burst_write_latency", "u32"),
     ("marikoCpuHighVmin", "u32"),
     ("marikoCpuLowVmin", "u32"),
     ("eristaGpuVmin", "u32"),
@@ -180,7 +181,8 @@ def load_all_vars():
     c.load_entry_object("t6_tRTW", 5)
     c.load_entry_object("t7_tWTR", 5)
     c.load_entry_object("t8_tREFI", 5)
-    c.load_entry_object("mem_burst_latency", 5)
+    c.load_entry_object("mem_burst_read_latency", 5)
+    c.load_entry_object("mem_burst_write_latency", 5)
     c.load_entry_object("marikoCpuHighVmin", 3)
     c.load_entry_object("marikoCpuLowVmin", 3)
     c.load_entry_object("eristaGpuVmin", 3)