OmniNX/Horizon-OC
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

sysclk: remove old hocclk, bump version

Browse Source
This commit is contained in:
souldbminersmwc
2026-04-01 15:58:40 -04:00
parent 80fa802e88
commit e20bafd6ab
199 changed files with 13967 additions and 657 deletions
Download Patch File Download Diff File Expand all files Collapse all files

248
Source/hoc-clk/common/include/SaltyNX.h Normal file
View File

@@ -0,0 +1,248 @@
/*
* Copyright (c) MasaGratoR
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include "ipc.h"
Handle saltysd_orig;
Result SaltySD_Connect() {
for (int i = 0; i < 200; i++) {
if (!svcConnectToNamedPort(&saltysd_orig, "SaltySD"))
return 0;
svcSleepThread(1000*1000);
}
return 1;
}
Result SaltySD_Term()
{
Result ret;
IpcCommand c;
ipcInitialize(&c);
ipcSendPid(&c);
struct input
{
u64 magic;
u64 cmd_id;
u64 zero;
u64 reserved[2];
} *raw;
raw = (input*)ipcPrepareHeader(&c, sizeof(*raw));
raw->magic = SFCI_MAGIC;
raw->cmd_id = 0;
raw->zero = 0;
ret = ipcDispatch(saltysd_orig);
if (R_SUCCEEDED(ret))
{
IpcParsedCommand r;
ipcParse(&r);
struct output {
u64 magic;
u64 result;
} *resp = (output*)r.Raw;
ret = resp->result;
}
// Session terminated works too.
svcCloseHandle(saltysd_orig);
if (ret == 0xf601) return 0;
return ret;
}
Result SaltySD_CheckIfSharedMemoryAvailable(ptrdiff_t *offset, u64 size)
{
Result ret = 0;
// Send a command
IpcCommand c;
ipcInitialize(&c);
ipcSendPid(&c);
struct input {
u64 magic;
u64 cmd_id;
u64 size;
u32 reserved[2];
} *raw;
raw = (input*)ipcPrepareHeader(&c, sizeof(*raw));
raw->magic = SFCI_MAGIC;
raw->cmd_id = 6;
raw->size = size;
ret = ipcDispatch(saltysd_orig);
if (R_SUCCEEDED(ret)) {
IpcParsedCommand r;
ipcParse(&r);
struct output {
u64 magic;
u64 result;
u64 offset;
} *resp = (output*)r.Raw;
ret = resp->result;
if (!ret)
{
*offset = resp->offset;
}
}
return ret;
}
Result SaltySD_GetSharedMemoryHandle(Handle *retrieve)
{
Result ret = 0;
// Send a command
IpcCommand c;
ipcInitialize(&c);
ipcSendPid(&c);
struct input {
u64 magic;
u64 cmd_id;
u32 reserved[4];
} *raw;
raw = (input*)ipcPrepareHeader(&c, sizeof(*raw));
raw->magic = SFCI_MAGIC;
raw->cmd_id = 7;
ret = ipcDispatch(saltysd_orig);
if (R_SUCCEEDED(ret)) {
IpcParsedCommand r;
ipcParse(&r);
struct output {
u64 magic;
u64 result;
u64 reserved[2];
} *resp = (output*)r.Raw;
ret = resp->result;
if (!ret)
{
*retrieve = r.Handles[0];
}
}
return ret;
}
Result SaltySD_GetDisplayRefreshRate(uint8_t* refreshRate)
{
Result ret = 0;
// Send a command
IpcCommand c;
ipcInitialize(&c);
ipcSendPid(&c);
struct input {
u64 magic;
u64 cmd_id;
u64 zero;
u64 reserved;
} *raw;
raw = (input*)ipcPrepareHeader(&c, sizeof(*raw));
raw->magic = SFCI_MAGIC;
raw->cmd_id = 10;
raw->zero = 0;
ret = ipcDispatch(saltysd_orig);
if (R_SUCCEEDED(ret)) {
IpcParsedCommand r;
ipcParse(&r);
struct output {
u64 magic;
u64 result;
u64 refreshRate;
u64 reserved;
} *resp = (output*)r.Raw;
ret = resp->result;
if (!ret)
{
*refreshRate = (uint8_t)(resp->refreshRate);
}
}
return ret;
}
Result SaltySD_SetDisplayRefreshRate(uint8_t refreshRate)
{
Result ret = 0;
// Send a command
IpcCommand c;
ipcInitialize(&c);
ipcSendPid(&c);
struct input {
u64 magic;
u64 cmd_id;
u64 refreshRate;
u64 reserved;
} *raw;
raw = (input*)ipcPrepareHeader(&c, sizeof(*raw));
raw->magic = SFCI_MAGIC;
raw->cmd_id = 11;
raw->refreshRate = refreshRate;
ret = ipcDispatch(saltysd_orig);
if (R_SUCCEEDED(ret)) {
IpcParsedCommand r;
ipcParse(&r);
struct output {
u64 magic;
u64 result;
u64 reserved[2];
} *resp = (output*)r.Raw;
ret = resp->result;
}
return ret;
}

101
Source/hoc-clk/common/include/battery.h Normal file
View File

@@ -0,0 +1,101 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <switch.h>
#include <inttypes.h>
#include <string.h>
typedef enum {
BatteryFlag_NoHub = BIT(0), // Hub is disconnected
BatteryFlag_Rail = BIT(8), // At least one Joy-con is charging from rail
BatteryFlag_SPDSRC = BIT(12), // OTG
BatteryFlag_ACC = BIT(16) // Accessory
} BatteryChargeFlags;
typedef enum {
PDState_NewPDO = 1, // Received new Power Data Object
PDState_NoPD = 2, // No Power Delivery source is detected
PDState_AcceptedRDO = 3 // Received and accepted Request Data Object
} BatteryPDControllerState;
// Charger type detection
typedef enum {
ChargerType_None = 0,
ChargerType_PD = 1,
ChargerType_TypeC_1500mA = 2,
ChargerType_TypeC_3000mA = 3,
ChargerType_DCP = 4, // Dedicated Charging Port
ChargerType_CDP = 5, // Charging Downstream Port
ChargerType_SDP = 6, // Standard Downstream Port
ChargerType_Apple_500mA = 7,
ChargerType_Apple_1000mA = 8,
ChargerType_Apple_2000mA = 9
} BatteryChargerType;
typedef enum {
PowerRole_Sink = 1, // Device is receiving power
PowerRole_Source = 2 // Device is providing power
} BatteryPowerRole;
typedef struct {
int32_t InputCurrentLimit; // Input (Sink) current limit in mA
int32_t VBUSCurrentLimit; // Output (Source/VBUS/OTG) current limit in mA
int32_t ChargeCurrentLimit; // Battery charging current limit in mA
int32_t ChargeVoltageLimit; // Battery charging voltage limit in mV
int32_t unk_x10; // Unknown field (possibly enum)
int32_t unk_x14; // Unknown field (possibly flags)
BatteryPDControllerState PDControllerState; // PD Controller State
int32_t BatteryTemperature; // Battery temperature in milli-Celsius
int32_t RawBatteryCharge; // Battery charge in percentmille
int32_t VoltageAvg; // Average voltage in mV
int32_t BatteryAge; // Battery health (capacity full/design) in pcm
BatteryPowerRole PowerRole; // Current power role
BatteryChargerType ChargerType; // Type of charger connected
int32_t ChargerVoltageLimit; // Charger voltage limit in mV
int32_t ChargerCurrentLimit; // Charger current limit in mA
BatteryChargeFlags Flags; // Various status flags
} BatteryChargeInfo;
#define IS_BATTERY_CHARGING_ENABLED(info) (((info)->unk_x14 >> 8) & 1)
static inline int batteryInfoGetTemperatureMiliCelsius(BatteryChargeInfo *info) {
return info->BatteryTemperature;
}
static inline float batteryInfoGetChargePercent(BatteryChargeInfo *info) {
return (float)info->RawBatteryCharge / 1000.0f;
}
static inline float batteryInfoGetBatteryHealthPercent(BatteryChargeInfo *info) {
return (float)info->BatteryAge / 1000.0f;
}
static inline bool batteryInfoIsCharging(BatteryChargeInfo *info) {
return IS_BATTERY_CHARGING_ENABLED(info);
}
Result batteryInfoInitialize(void);
void batteryInfoExit(void);
Result batteryInfoGetChargeInfo(BatteryChargeInfo *out);
Result batteryInfoGetChargePercentage(u32 *out);
Result batteryInfoIsEnoughPowerSupplied(bool *out);
Result batteryInfoEnableCharging(void);
Result batteryInfoDisableCharging(void);
Result batteryInfoEnableFastCharging(void);
Result batteryInfoDisableFastCharging(void);
const char* batteryInfoGetChargerTypeString(BatteryChargerType type);
const char* batteryInfoGetPowerRoleString(BatteryPowerRole role);
const char* batteryInfoGetPDStateString(BatteryPDControllerState state);

53
Source/hoc-clk/common/include/cpp_util.hpp Normal file
View File

@@ -0,0 +1,53 @@
/*
* Copyright (c) meha3945 (hanai3bi)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <utility>
template<typename F>
class ScopeGuard {
public:
ScopeGuard(F&& f)
: f(f), engaged(true) {};
~ScopeGuard() {
if (engaged)
f();
};
ScopeGuard(ScopeGuard&& rhs)
: f(std::move(rhs.f)) {};
void dismiss() { engaged = false; }
private:
F f;
bool engaged;
};
struct MakeScopeExit {
template<typename F>
ScopeGuard<F> operator+=(F&& f) {
return ScopeGuard<F>(std::move(f));
};
};
#define STRING_CAT2(x, y) x##y
#define STRING_CAT(x, y) STRING_CAT2(x, y)
#define SCOPE_GUARD MakeScopeExit() += [&]() __attribute__((always_inline))
#define SCOPE_EXIT auto STRING_CAT(scope_exit_, __LINE__) = SCOPE_GUARD

24
Source/hoc-clk/common/include/crc32.h Normal file
View File

@@ -0,0 +1,24 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <stdio.h>
#include <stdint.h>
namespace crc32 {
uint32_t crc32(const uint8_t *data, size_t length);
uint32_t checksum_file(const char *filename);
}

314
Source/hoc-clk/common/include/fuse.h Normal file
View File

@@ -0,0 +1,314 @@
/*
* Copyright (c) 2018 naehrwert
* Copyright (c) 2018 shuffle2
* Copyright (c) 2018 balika011
* Copyright (c) 2019-2025 CTCaer
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _FUSE_H_
#define _FUSE_H_
#ifndef BIT
#define BIT(n) (1U<<(n))
#endif
/*! Fuse registers. */
#define FUSE_CTRL 0x0
#define FUSE_ADDR 0x4
#define FUSE_RDATA 0x8
#define FUSE_WDATA 0xC
#define FUSE_TIME_RD1 0x10
#define FUSE_TIME_RD2 0x14
#define FUSE_TIME_PGM1 0x18
#define FUSE_TIME_PGM2 0x1C
#define FUSE_PRIV2INTFC 0x20
#define FUSE_PRIV2INTFC_START_DATA BIT(0)
#define FUSE_PRIV2INTFC_SKIP_RECORDS BIT(1)
#define FUSE_FUSEBYPASS 0x24
#define FUSE_PRIVATEKEYDISABLE 0x28
#define FUSE_PRIVKEY_DISABLE BIT(0)
#define FUSE_PRIVKEY_TZ_STICKY_BIT BIT(4)
#define FUSE_DISABLEREGPROGRAM 0x2C
#define FUSE_WRITE_ACCESS_SW 0x30
#define FUSE_PWR_GOOD_SW 0x34
#define FUSE_PRIV2RESHIFT 0x3C
#define FUSE_FUSETIME_RD0 0x40
#define FUSE_FUSETIME_RD1 0x44
#define FUSE_FUSETIME_RD2 0x48
#define FUSE_FUSETIME_RD3 0x4C
#define FUSE_PRIVATE_KEY0_NONZERO 0x80
#define FUSE_PRIVATE_KEY1_NONZERO 0x84
#define FUSE_PRIVATE_KEY2_NONZERO 0x88
#define FUSE_PRIVATE_KEY3_NONZERO 0x8C
#define FUSE_PRIVATE_KEY4_NONZERO 0x90
/*! Fuse Cached registers */
#define FUSE_RESERVED_ODM8_B01 0x98 // FUSE_READ_TZ Group 0.
#define FUSE_RESERVED_ODM9_B01 0x9C // FUSE_READ_TZ Group 0.
#define FUSE_RESERVED_ODM10_B01 0xA0 // FUSE_READ_TZ Group 0.
#define FUSE_RESERVED_ODM11_B01 0xA4 // FUSE_READ_TZ Group 0.
#define FUSE_RESERVED_ODM12_B01 0xA8 // FUSE_READ_TZ Group 1? Is value -1?
#define FUSE_RESERVED_ODM13_B01 0xAC // FUSE_READ_TZ Group 1? Is value -1?
#define FUSE_RESERVED_ODM14_B01 0xB0 // FUSE_READ_TZ Group 1? Is value -1?
#define FUSE_RESERVED_ODM15_B01 0xB4 // FUSE_READ_TZ Group 1? Is value -1?
#define FUSE_RESERVED_ODM16_B01 0xB8 // FUSE_READ_TZ Group 2? Is value -1?
#define FUSE_RESERVED_ODM17_B01 0xBC // FUSE_READ_TZ Group 2? Is value -1?
#define FUSE_RESERVED_ODM18_B01 0xC0 // FUSE_READ_TZ Group 2.
#define FUSE_RESERVED_ODM19_B01 0xC4 // FUSE_READ_TZ Group 2.
#define FUSE_RESERVED_ODM20_B01 0xC8 // FUSE_READ_TZ Group 3.
#define FUSE_RESERVED_ODM21_B01 0xCC // FUSE_READ_TZ Group 3.
#define FUSE_KEK00_B01 0xD0
#define FUSE_KEK01_B01 0xD4
#define FUSE_KEK02_B01 0xD8
#define FUSE_KEK03_B01 0xDC
#define FUSE_BEK00_B01 0xE0
#define FUSE_BEK01_B01 0xE4
#define FUSE_BEK02_B01 0xE8
#define FUSE_BEK03_B01 0xEC
#define FUSE_OPT_RAM_RTSEL_TSMCSP_PO4SVT_B01 0xF0
#define FUSE_OPT_RAM_WTSEL_TSMCSP_PO4SVT_B01 0xF4
#define FUSE_OPT_RAM_RTSEL_TSMCPDP_PO4SVT_B01 0xF8
#define FUSE_OPT_RAM_MTSEL_TSMCPDP_PO4SVT_B01 0xFC
#define FUSE_PRODUCTION_MODE 0x100
#define FUSE_JTAG_SECUREID_VALID 0x104
#define FUSE_ODM_LOCK 0x108
#define FUSE_OPT_OPENGL_EN 0x10C
#define FUSE_SKU_INFO 0x110
#define FUSE_CPU_SPEEDO_0_CALIB 0x114
#define FUSE_CPU_IDDQ_CALIB 0x118
#define FUSE_RESERVED_ODM22_B01 0x11C // FUSE_READ_TZ Group 3.
#define FUSE_RESERVED_ODM23_B01 0x120 // FUSE_READ_TZ Group 3.
#define FUSE_RESERVED_ODM24_B01 0x124 // FUSE_READ_TZ Group 4.
#define FUSE_OPT_FT_REV 0x128
#define FUSE_CPU_SPEEDO_1_CALIB 0x12C
#define FUSE_CPU_SPEEDO_2_CALIB 0x130
#define FUSE_SOC_SPEEDO_0_CALIB 0x134
#define FUSE_SOC_SPEEDO_1_CALIB 0x138
#define FUSE_SOC_SPEEDO_2_CALIB 0x13C
#define FUSE_SOC_IDDQ_CALIB 0x140
#define FUSE_RESERVED_ODM25_B01 0x144 // FUSE_READ_TZ Group 4.
#define FUSE_FA 0x148
#define FUSE_RESERVED_PRODUCTION 0x14C
#define FUSE_HDMI_LANE0_CALIB 0x150
#define FUSE_HDMI_LANE1_CALIB 0x154
#define FUSE_HDMI_LANE2_CALIB 0x158
#define FUSE_HDMI_LANE3_CALIB 0x15C
#define FUSE_ENCRYPTION_RATE 0x160
#define FUSE_PUBLIC_KEY0 0x164
#define FUSE_PUBLIC_KEY1 0x168
#define FUSE_PUBLIC_KEY2 0x16C
#define FUSE_PUBLIC_KEY3 0x170
#define FUSE_PUBLIC_KEY4 0x174
#define FUSE_PUBLIC_KEY5 0x178
#define FUSE_PUBLIC_KEY6 0x17C
#define FUSE_PUBLIC_KEY7 0x180
#define FUSE_TSENSOR1_CALIB 0x184 // CPU1.
#define FUSE_TSENSOR2_CALIB 0x188 // CPU2.
#define FUSE_OPT_SECURE_SCC_DIS_B01 0x18C
#define FUSE_OPT_CP_REV 0x190 // FUSE style revision - ATE. 0x101 0x100
#define FUSE_OPT_PFG 0x194
#define FUSE_TSENSOR0_CALIB 0x198 // CPU0.
#define FUSE_FIRST_BOOTROM_PATCH_SIZE 0x19C
#define FUSE_SECURITY_MODE 0x1A0
#define FUSE_PRIVATE_KEY0 0x1A4
#define FUSE_PRIVATE_KEY1 0x1A8
#define FUSE_PRIVATE_KEY2 0x1AC
#define FUSE_PRIVATE_KEY3 0x1B0
#define FUSE_PRIVATE_KEY4 0x1B4
#define FUSE_ARM_JTAG_DIS 0x1B8
#define FUSE_BOOT_DEVICE_INFO 0x1BC
#define FUSE_RESERVED_SW 0x1C0
#define FUSE_OPT_VP9_DISABLE 0x1C4
#define FUSE_RESERVED_ODM0 0x1C8
#define FUSE_RESERVED_ODM1 0x1CC
#define FUSE_RESERVED_ODM2 0x1D0
#define FUSE_RESERVED_ODM3 0x1D4
#define FUSE_RESERVED_ODM4 0x1D8
#define FUSE_RESERVED_ODM5 0x1DC
#define FUSE_RESERVED_ODM6 0x1E0
#define FUSE_RESERVED_ODM7 0x1E4
#define FUSE_OBS_DIS 0x1E8
#define FUSE_OPT_NVJTAG_PROTECTION_ENABLE_B01 0x1EC
#define FUSE_USB_CALIB 0x1F0
#define FUSE_SKU_DIRECT_CONFIG 0x1F4
#define FUSE_KFUSE_PRIVKEY_CTRL 0x1F8
#define FUSE_PACKAGE_INFO 0x1FC // 1: MID, 2: DSC.
#define FUSE_OPT_VENDOR_CODE 0x200
#define FUSE_OPT_FAB_CODE 0x204
#define FUSE_OPT_LOT_CODE_0 0x208
#define FUSE_OPT_LOT_CODE_1 0x20C
#define FUSE_OPT_WAFER_ID 0x210
#define FUSE_OPT_X_COORDINATE 0x214
#define FUSE_OPT_Y_COORDINATE 0x218
#define FUSE_OPT_SEC_DEBUG_EN 0x21C
#define FUSE_OPT_OPS_RESERVED 0x220
#define FUSE_SATA_CALIB 0x224
#define FUSE_SPARE_REGISTER_ODM_B01 0x224
#define FUSE_GPU_IDDQ_CALIB 0x228
#define FUSE_TSENSOR3_CALIB 0x22C // CPU3.
#define FUSE_CLOCK_BONDOUT0 0x230
#define FUSE_CLOCK_BONDOUT1 0x234
#define FUSE_RESERVED_ODM26_B01 0x238 // FUSE_READ_TZ Group 4.
#define FUSE_RESERVED_ODM27_B01 0x23C // FUSE_READ_TZ Group 4.
#define FUSE_RESERVED_ODM28_B01 0x240 // MAX77812 phase configuration. FUSE_READ_TZ Group 5.
#define FUSE_OPT_SAMPLE_TYPE 0x244
#define FUSE_OPT_SUBREVISION 0x248 // "", "p", "q", "r". e.g: A01p.
#define FUSE_OPT_SW_RESERVED_0 0x24C
#define FUSE_OPT_SW_RESERVED_1 0x250
#define FUSE_TSENSOR4_CALIB 0x254 // GPU.
#define FUSE_TSENSOR5_CALIB 0x258 // MEM0.
#define FUSE_TSENSOR6_CALIB 0x25C // MEM1.
#define FUSE_TSENSOR7_CALIB 0x260 // PLLX.
#define FUSE_OPT_PRIV_SEC_DIS 0x264
#define FUSE_PKC_DISABLE 0x268
#define FUSE_BOOT_SECURITY_INFO_B01 0x268
#define FUSE_OPT_RAM_RTSEL_TSMCSP_PO4HVT_B01 0x26C
#define FUSE_OPT_RAM_WTSEL_TSMCSP_PO4HVT_B01 0x270
#define FUSE_OPT_RAM_RTSEL_TSMCPDP_PO4HVT_B01 0x274
#define FUSE_OPT_RAM_MTSEL_TSMCPDP_PO4HVT_B01 0x278
#define FUSE_FUSE2TSEC_DEBUG_DISABLE 0x27C
#define FUSE_TSENSOR_COMMON 0x280
#define FUSE_OPT_CP_BIN 0x284
#define FUSE_OPT_GPU_DISABLE 0x288
#define FUSE_OPT_FT_BIN 0x28C
#define FUSE_OPT_DONE_MAP 0x290
#define FUSE_RESERVED_ODM29_B01 0x294 // FUSE_READ_TZ Group 5? Is value -1?
#define FUSE_APB2JTAG_DISABLE 0x298
#define FUSE_ODM_INFO 0x29C // Debug features disable.
#define FUSE_ARM_CRYPT_DE_FEATURE 0x2A8
#define FUSE_OPT_RAM_WTSEL_TSMCPDP_PO4SVT_B01 0x2B0
#define FUSE_OPT_RAM_RCT_TSMCDP_PO4SVT_B01 0x2B4
#define FUSE_OPT_RAM_WCT_TSMCDP_PO4SVT_B01 0x2B8
#define FUSE_OPT_RAM_KP_TSMCDP_PO4SVT_B01 0x2BC
#define FUSE_WOA_SKU_FLAG 0x2C0
#define FUSE_ECO_RESERVE_1 0x2C4
#define FUSE_GCPLEX_CONFIG_FUSE 0x2C8
#define FUSE_GPU_VPR_AUTO_FETCH_DIS BIT(0)
#define FUSE_GPU_VPR_ENABLED BIT(1)
#define FUSE_GPU_WPR_ENABLED BIT(2)
#define FUSE_PRODUCTION_MONTH 0x2CC
#define FUSE_RAM_REPAIR_INDICATOR 0x2D0
#define FUSE_TSENSOR9_CALIB 0x2D4 // AOTAG.
#define FUSE_VMIN_CALIBRATION 0x2DC
#define FUSE_AGING_SENSOR_CALIBRATION 0x2E0
#define FUSE_DEBUG_AUTHENTICATION 0x2E4
#define FUSE_SECURE_PROVISION_INDEX 0x2E8
#define FUSE_SECURE_PROVISION_INFO 0x2EC
#define FUSE_OPT_GPU_DISABLE_CP1 0x2F0
#define FUSE_SPARE_ENDIS 0x2F4
#define FUSE_ECO_RESERVE_0 0x2F8 // AID.
#define FUSE_RESERVED_CALIB0 0x304 // GPCPLL ADC Calibration.
#define FUSE_RESERVED_CALIB1 0x308
#define FUSE_OPT_GPU_TPC0_DISABLE 0x30C
#define FUSE_OPT_GPU_TPC0_DISABLE_CP1 0x310
#define FUSE_OPT_CPU_DISABLE 0x314
#define FUSE_OPT_CPU_DISABLE_CP1 0x318
#define FUSE_TSENSOR10_CALIB 0x31C
#define FUSE_TSENSOR10_CALIB_AUX 0x320
#define FUSE_OPT_RAM_SVOP_DP 0x324
#define FUSE_OPT_RAM_SVOP_PDP 0x328
#define FUSE_OPT_RAM_SVOP_REG 0x32C
#define FUSE_OPT_RAM_SVOP_SP 0x330
#define FUSE_OPT_RAM_SVOP_SMPDP 0x334
#define FUSE_OPT_RAM_WTSEL_TSMCPDP_PO4HVT_B01 0x324
#define FUSE_OPT_RAM_RCT_TSMCDP_PO4HVT_B01 0x328
#define FUSE_OPT_RAM_WCT_TSMCDP_PO4HVT_B01 0x32c
#define FUSE_OPT_RAM_KP_TSMCDP_PO4HVT_B01 0x330
#define FUSE_OPT_RAM_SVOP_SP_B01 0x334
#define FUSE_OPT_GPU_TPC0_DISABLE_CP2 0x338
#define FUSE_OPT_GPU_TPC1_DISABLE 0x33C
#define FUSE_OPT_GPU_TPC1_DISABLE_CP1 0x340
#define FUSE_OPT_GPU_TPC1_DISABLE_CP2 0x344
#define FUSE_OPT_CPU_DISABLE_CP2 0x348
#define FUSE_OPT_GPU_DISABLE_CP2 0x34C
#define FUSE_USB_CALIB_EXT 0x350
#define FUSE_RESERVED_FIELD 0x354 // RMA.
#define FUSE_SPARE_REALIGNMENT_REG 0x37C
#define FUSE_SPARE_BIT_0 0x380
//...
#define FUSE_SPARE_BIT_31 0x3FC
/*! Fuse commands. */
#define FUSE_IDLE 0x0
#define FUSE_READ 0x1
#define FUSE_WRITE 0x2
#define FUSE_SENSE 0x3
#define FUSE_CMD_MASK 0x3
/*! Fuse status. */
#define FUSE_STATUS_RESET 0
#define FUSE_STATUS_POST_RESET 1
#define FUSE_STATUS_LOAD_ROW0 2
#define FUSE_STATUS_LOAD_ROW1 3
#define FUSE_STATUS_IDLE 4
#define FUSE_STATUS_READ_SETUP 5
#define FUSE_STATUS_READ_STROBE 6
#define FUSE_STATUS_SAMPLE_FUSES 7
#define FUSE_STATUS_READ_HOLD 8
#define FUSE_STATUS_FUSE_SRC_SETUP 9
#define FUSE_STATUS_WRITE_SETUP 10
#define FUSE_STATUS_WRITE_ADDR_SETUP 11
#define FUSE_STATUS_WRITE_PROGRAM 12
#define FUSE_STATUS_WRITE_ADDR_HOLD 13
#define FUSE_STATUS_FUSE_SRC_HOLD 14
#define FUSE_STATUS_LOAD_RIR 15
#define FUSE_STATUS_READ_BEFORE_WRITE_SETUP 16
#define FUSE_STATUS_READ_DEASSERT_PD 17
/*! Fuse cache registers. */
#define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))
#define FUSE_ARRAY_WORDS_NUM 192
#define FUSE_ARRAY_WORDS_NUM_B01 256
enum
{
FUSE_NX_HW_TYPE_ICOSA,
FUSE_NX_HW_TYPE_IOWA,
FUSE_NX_HW_TYPE_HOAG,
FUSE_NX_HW_TYPE_AULA
};
enum
{
FUSE_NX_HW_STATE_PROD,
FUSE_NX_HW_STATE_DEV
};
#endif

62
Source/hoc-clk/common/include/i2c.h Normal file
View File

@@ -0,0 +1,62 @@
/*
* Copyright (c) 2023 KazushiMe
* Licensed under the GPLv2
*/
#pragma once
#include <switch.h>
// To use i2c service, sm and i2c should be intialized via smInitialize() and i2cInitialize().
Result I2cSet_U8(I2cDevice dev, u8 reg, u8 val);
Result I2cRead_OutU8(I2cDevice dev, u8 reg, u8 *out);
Result I2cRead_OutU16(I2cDevice dev, u8 reg, u16 *out);
// Max17050 fuel gauge
float I2c_Max17050_GetBatteryCurrent();
const u8 MAX17050_CURRENT_REG = 0x0A;
// Buck Converter
typedef enum I2c_BuckConverter_Reg {
I2c_Max77620_SD1VOLT_REG = 0x17, // Used for Erista DDR VDDQ+VDD2 / Mariko VDD2
I2c_Max77621_VOLT_REG = 0x00,
I2c_Max77812_CPUVOLT_REG = 0x26,
I2c_Max77812_GPUVOLT_REG = 0x23,
I2c_Max77812_MEMVOLT_REG = 0x25, // Master 3 (GPU 1 + 2, DRAM 3, CPU 4), used for Mariko VDDQ
} I2c_BuckConverter_Reg;
typedef struct I2c_BuckConverter_Domain {
I2cDevice device;
I2c_BuckConverter_Reg reg;
u8 volt_mask;
u32 uv_step;
u32 uv_min;
u32 uv_max;
u8 por_val;
} I2c_BuckConverter_Domain;
const I2c_BuckConverter_Domain I2c_Erista_CPU = { I2cDevice_Max77621Cpu, I2c_Max77621_VOLT_REG, 0x7F, 6250, 606250, 1400000, };
const I2c_BuckConverter_Domain I2c_Erista_GPU = { I2cDevice_Max77621Gpu, I2c_Max77621_VOLT_REG, 0x7F, 6250, 606250, 1400000, };
const I2c_BuckConverter_Domain I2c_Erista_DRAM = { I2cDevice_Max77620Pmic, I2c_Max77620_SD1VOLT_REG, 0x7F, 12500, 600000, 1250000, };
const I2c_BuckConverter_Domain I2c_Mariko_CPU = { I2cDevice_Max77812_2, I2c_Max77812_CPUVOLT_REG, 0xFF, 5000, 250000, 1525000, 0x78 };
const I2c_BuckConverter_Domain I2c_Mariko_GPU = { I2cDevice_Max77812_2, I2c_Max77812_GPUVOLT_REG, 0xFF, 5000, 250000, 1525000, 0x78 };
const I2c_BuckConverter_Domain I2c_Mariko_DRAM_VDDQ = { I2cDevice_Max77812_2, I2c_Max77812_MEMVOLT_REG, 0xFF, 5000, 250000, 700000, 0x78 };
const I2c_BuckConverter_Domain I2c_Mariko_DRAM_VDD2 = { I2cDevice_Max77620Pmic, I2c_Max77620_SD1VOLT_REG, 0x7F, 12500, 600000, 1250000, };
u32 I2c_BuckConverter_GetMvOut(const I2c_BuckConverter_Domain* domain);
Result I2c_BuckConverter_SetMvOut(const I2c_BuckConverter_Domain* domain, u32 mvolt);
// Bq24193 Battery management
u32 I2c_Bq24193_Convert_Raw_mA(u8 raw);
u8 I2c_Bq24193_Convert_mA_Raw(u32 ma);
Result I2c_Bq24193_GetFastChargeCurrentLimit(u32 *ma);
Result I2c_Bq24193_SetFastChargeCurrentLimit(u32 ma);
const u32 MA_RANGE_MIN = 512;
const u32 MA_RANGE_MAX = 4544;
const u8 BQ24193_CHARGE_CURRENT_CONTROL_REG = 0x2;

756
Source/hoc-clk/common/include/ipc.h Normal file
View File

@@ -0,0 +1,756 @@
/**
* @file ipc.h
* @brief Inter-process communication handling
* @author plutoo
* @copyright libnx Authors (ISC License)
*/
#pragma once
#include <switch.h>
/// IPC input header magic
#define SFCI_MAGIC 0x49434653
/// IPC output header magic
#define SFCO_MAGIC 0x4f434653
/// IPC invalid object ID
#define IPC_INVALID_OBJECT_ID UINT32_MAX
///@name IPC request building
///@{
/// IPC command (request) structure.
#define IPC_MAX_BUFFERS 8
#define IPC_MAX_OBJECTS 8
typedef enum {
BufferType_Normal=0, ///< Regular buffer.
BufferType_Type1=1, ///< Allows ProcessMemory and shared TransferMemory.
BufferType_Invalid=2,
BufferType_Type3=3 ///< Same as Type1 except remote process is not allowed to use device-mapping.
} BufferType;
typedef enum {
BufferDirection_Send=0,
BufferDirection_Recv=1,
BufferDirection_Exch=2,
} BufferDirection;
typedef enum {
IpcCommandType_Invalid = 0,
IpcCommandType_LegacyRequest = 1,
IpcCommandType_Close = 2,
IpcCommandType_LegacyControl = 3,
IpcCommandType_Request = 4,
IpcCommandType_Control = 5,
IpcCommandType_RequestWithContext = 6,
IpcCommandType_ControlWithContext = 7,
} IpcCommandType;
typedef enum {
DomainMessageType_Invalid = 0,
DomainMessageType_SendMessage = 1,
DomainMessageType_Close = 2,
} DomainMessageType;
/// IPC domain message header.
typedef struct {
u8 Type;
u8 NumObjectIds;
u16 Length;
u32 ThisObjectId;
u32 Pad[2];
} DomainMessageHeader;
/// IPC domain response header.
typedef struct {
u32 NumObjectIds;
u32 Pad[3];
} DomainResponseHeader;
typedef struct {
size_t NumSend; // A
size_t NumRecv; // B
size_t NumExch; // W
const void* Buffers[IPC_MAX_BUFFERS];
size_t BufferSizes[IPC_MAX_BUFFERS];
BufferType BufferTypes[IPC_MAX_BUFFERS];
size_t NumStaticIn; // X
size_t NumStaticOut; // C
const void* Statics[IPC_MAX_BUFFERS];
size_t StaticSizes[IPC_MAX_BUFFERS];
u8 StaticIndices[IPC_MAX_BUFFERS];
bool SendPid;
size_t NumHandlesCopy;
size_t NumHandlesMove;
Handle Handles[IPC_MAX_OBJECTS];
size_t NumObjectIds;
u32 ObjectIds[IPC_MAX_OBJECTS];
} IpcCommand;
/**
* @brief Initializes an IPC command structure.
* @param cmd IPC command structure.
*/
static inline void ipcInitialize(IpcCommand* cmd) {
*cmd = (IpcCommand){};
}
/// IPC buffer descriptor.
typedef struct {
u32 Size; ///< Size of the buffer.
u32 Addr; ///< Lower 32-bits of the address of the buffer
u32 Packed; ///< Packed data (including higher bits of the address)
} IpcBufferDescriptor;
/// IPC static send-buffer descriptor.
typedef struct {
u32 Packed; ///< Packed data (including higher bits of the address)
u32 Addr; ///< Lower 32-bits of the address
} IpcStaticSendDescriptor;
/// IPC static receive-buffer descriptor.
typedef struct {
u32 Addr; ///< Lower 32-bits of the address of the buffer
u32 Packed; ///< Packed data (including higher bits of the address)
} IpcStaticRecvDescriptor;
/**
* @brief Adds a buffer to an IPC command structure.
* @param cmd IPC command structure.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param type Buffer type.
*/
static inline void ipcAddSendBuffer(IpcCommand* cmd, const void* buffer, size_t size, BufferType type) {
size_t off = cmd->NumSend;
cmd->Buffers[off] = buffer;
cmd->BufferSizes[off] = size;
cmd->BufferTypes[off] = type;
cmd->NumSend++;
}
/**
* @brief Adds a receive-buffer to an IPC command structure.
* @param cmd IPC command structure.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param type Buffer type.
*/
static inline void ipcAddRecvBuffer(IpcCommand* cmd, void* buffer, size_t size, BufferType type) {
size_t off = cmd->NumSend + cmd->NumRecv;
cmd->Buffers[off] = buffer;
cmd->BufferSizes[off] = size;
cmd->BufferTypes[off] = type;
cmd->NumRecv++;
}
/**
* @brief Adds an exchange-buffer to an IPC command structure.
* @param cmd IPC command structure.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param type Buffer type.
*/
static inline void ipcAddExchBuffer(IpcCommand* cmd, void* buffer, size_t size, BufferType type) {
size_t off = cmd->NumSend + cmd->NumRecv + cmd->NumExch;
cmd->Buffers[off] = buffer;
cmd->BufferSizes[off] = size;
cmd->BufferTypes[off] = type;
cmd->NumExch++;
}
/**
* @brief Adds a static-buffer to an IPC command structure.
* @param cmd IPC command structure.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param index Index of buffer.
*/
static inline void ipcAddSendStatic(IpcCommand* cmd, const void* buffer, size_t size, u8 index) {
size_t off = cmd->NumStaticIn;
cmd->Statics[off] = buffer;
cmd->StaticSizes[off] = size;
cmd->StaticIndices[off] = index;
cmd->NumStaticIn++;
}
/**
* @brief Adds a static-receive-buffer to an IPC command structure.
* @param cmd IPC command structure.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param index Index of buffer.
*/
static inline void ipcAddRecvStatic(IpcCommand* cmd, void* buffer, size_t size, u8 index) {
size_t off = cmd->NumStaticIn + cmd->NumStaticOut;
cmd->Statics[off] = buffer;
cmd->StaticSizes[off] = size;
cmd->StaticIndices[off] = index;
cmd->NumStaticOut++;
}
/**
* @brief Adds a smart-buffer (buffer + static-buffer pair) to an IPC command structure.
* @param cmd IPC command structure.
* @param pointer_buffer_size Pointer buffer size.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param index Index of buffer.
*/
static inline void ipcAddSendSmart(IpcCommand* cmd, size_t pointer_buffer_size, const void* buffer, size_t size, u8 index) {
if (pointer_buffer_size != 0 && size <= pointer_buffer_size) {
ipcAddSendBuffer(cmd, NULL, 0, BufferType_Normal);
ipcAddSendStatic(cmd, buffer, size, index);
} else {
ipcAddSendBuffer(cmd, buffer, size, BufferType_Normal);
ipcAddSendStatic(cmd, NULL, 0, index);
}
}
/**
* @brief Adds a smart-receive-buffer (buffer + static-receive-buffer pair) to an IPC command structure.
* @param cmd IPC command structure.
* @param pointer_buffer_size Pointer buffer size.
* @param buffer Address of the buffer.
* @param size Size of the buffer.
* @param index Index of buffer.
*/
static inline void ipcAddRecvSmart(IpcCommand* cmd, size_t pointer_buffer_size, void* buffer, size_t size, u8 index) {
if (pointer_buffer_size != 0 && size <= pointer_buffer_size) {
ipcAddRecvBuffer(cmd, NULL, 0, BufferType_Normal);
ipcAddRecvStatic(cmd, buffer, size, index);
} else {
ipcAddRecvBuffer(cmd, buffer, size, BufferType_Normal);
ipcAddRecvStatic(cmd, NULL, 0, index);
}
}
/**
* @brief Tags an IPC command structure to send the PID.
* @param cmd IPC command structure.
*/
static inline void ipcSendPid(IpcCommand* cmd) {
cmd->SendPid = true;
}
/**
* @brief Adds a copy-handle to be sent through an IPC command structure.
* @param cmd IPC command structure.
* @param h Handle to send.
* @remark The receiving process gets a copy of the handle.
*/
static inline void ipcSendHandleCopy(IpcCommand* cmd, Handle h) {
cmd->Handles[cmd->NumHandlesCopy++] = h;
}
/**
* @brief Adds a move-handle to be sent through an IPC command structure.
* @param cmd IPC command structure.
* @param h Handle to send.
* @remark The sending process loses ownership of the handle, which is transferred to the receiving process.
*/
static inline void ipcSendHandleMove(IpcCommand* cmd, Handle h) {
cmd->Handles[cmd->NumHandlesCopy + cmd->NumHandlesMove++] = h;
}
/**
* @brief Prepares the header of an IPC command structure.
* @param cmd IPC command structure.
* @param sizeof_raw Size in bytes of the raw data structure to embed inside the IPC request
* @return Pointer to the raw embedded data structure in the request, ready to be filled out.
*/
static inline void* ipcPrepareHeader(IpcCommand* cmd, size_t sizeof_raw) {
u32* buf = (u32*)armGetTls();
size_t i;
*buf++ = IpcCommandType_Request | (cmd->NumStaticIn << 16) | (cmd->NumSend << 20) | (cmd->NumRecv << 24) | (cmd->NumExch << 28);
u32* fill_in_size_later = buf;
if (cmd->NumStaticOut > 0) {
*buf = (cmd->NumStaticOut + 2) << 10;
}
else {
*buf = 0;
}
if (cmd->SendPid || cmd->NumHandlesCopy > 0 || cmd->NumHandlesMove > 0) {
*buf++ |= 0x80000000;
*buf++ = (!!cmd->SendPid) | (cmd->NumHandlesCopy << 1) | (cmd->NumHandlesMove << 5);
if (cmd->SendPid)
buf += 2;
for (i=0; i<(cmd->NumHandlesCopy + cmd->NumHandlesMove); i++)
*buf++ = cmd->Handles[i];
}
else {
buf++;
}
for (i=0; i<cmd->NumStaticIn; i++, buf+=2) {
IpcStaticSendDescriptor* desc = (IpcStaticSendDescriptor*) buf;
uintptr_t ptr = (uintptr_t) cmd->Statics[i];
desc->Addr = ptr;
desc->Packed = cmd->StaticIndices[i] | (cmd->StaticSizes[i] << 16) |
(((ptr >> 32) & 15) << 12) | (((ptr >> 36) & 15) << 6);
}
for (i=0; i<(cmd->NumSend + cmd->NumRecv + cmd->NumExch); i++, buf+=3) {
IpcBufferDescriptor* desc = (IpcBufferDescriptor*) buf;
desc->Size = cmd->BufferSizes[i];
uintptr_t ptr = (uintptr_t) cmd->Buffers[i];
desc->Addr = ptr;
desc->Packed = cmd->BufferTypes[i] |
(((ptr >> 32) & 15) << 28) | ((ptr >> 36) << 2);
}
u32 padding = ((16 - (((uintptr_t) buf) & 15)) & 15) / 4;
u32* raw = (u32*) (buf + padding);
size_t raw_size = (sizeof_raw/4) + 4;
buf += raw_size;
u16* buf_u16 = (u16*) buf;
for (i=0; i<cmd->NumStaticOut; i++) {
size_t off = cmd->NumStaticIn + i;
size_t sz = (uintptr_t) cmd->StaticSizes[off];
buf_u16[i] = (sz > 0xFFFF) ? 0 : sz;
}
size_t u16s_size = ((2*cmd->NumStaticOut) + 3)/4;
buf += u16s_size;
raw_size += u16s_size;
*fill_in_size_later |= raw_size;
for (i=0; i<cmd->NumStaticOut; i++, buf+=2) {
IpcStaticRecvDescriptor* desc = (IpcStaticRecvDescriptor*) buf;
size_t off = cmd->NumStaticIn + i;
uintptr_t ptr = (uintptr_t) cmd->Statics[off];
desc->Addr = ptr;
desc->Packed = (ptr >> 32) | (cmd->StaticSizes[off] << 16);
}
return (void*) raw;
}
/**
* @brief Dispatches an IPC request.
* @param session IPC session handle.
* @return Result code.
*/
static inline Result ipcDispatch(Handle session) {
return svcSendSyncRequest(session);
}
///@}
///@name IPC response parsing
///@{
/// IPC parsed command (response) structure.
typedef struct {
IpcCommandType CommandType; ///< Type of the command
bool HasPid; ///< true if the 'Pid' field is filled out.
u64 Pid; ///< PID included in the response (only if HasPid is true)
size_t NumHandles; ///< Number of handles copied.
Handle Handles[IPC_MAX_OBJECTS]; ///< Handles.
bool WasHandleCopied[IPC_MAX_OBJECTS]; ///< true if the handle was moved, false if it was copied.
bool IsDomainRequest; ///< true if the the message is a Domain message.
DomainMessageType InMessageType; ///< Type of the domain message.
u32 InMessageLength; ///< Size of rawdata (for domain messages).
u32 InThisObjectId; ///< Object ID to call the command on (for domain messages).
size_t InNumObjectIds; ///< Number of object IDs (for domain messages).
u32 InObjectIds[IPC_MAX_OBJECTS]; ///< Object IDs (for domain messages).
bool IsDomainResponse; ///< true if the the message is a Domain response.
size_t OutNumObjectIds; ///< Number of object IDs (for domain responses).
u32 OutObjectIds[IPC_MAX_OBJECTS]; ///< Object IDs (for domain responses).
size_t NumBuffers; ///< Number of buffers in the response.
void* Buffers[IPC_MAX_BUFFERS]; ///< Pointers to the buffers.
size_t BufferSizes[IPC_MAX_BUFFERS]; ///< Sizes of the buffers.
BufferType BufferTypes[IPC_MAX_BUFFERS]; ///< Types of the buffers.
BufferDirection BufferDirections[IPC_MAX_BUFFERS]; ///< Direction of each buffer.
size_t NumStatics; ///< Number of statics in the response.
void* Statics[IPC_MAX_BUFFERS]; ///< Pointers to the statics.
size_t StaticSizes[IPC_MAX_BUFFERS]; ///< Sizes of the statics.
u8 StaticIndices[IPC_MAX_BUFFERS]; ///< Indices of the statics.
size_t NumStaticsOut; ///< Number of output statics available in the response.
void* Raw; ///< Pointer to the raw embedded data structure in the response.
void* RawWithoutPadding; ///< Pointer to the raw embedded data structure, without padding.
size_t RawSize; ///< Size of the raw embedded data.
} IpcParsedCommand;
/**
* @brief Parse an IPC command response into an IPC parsed command structure.
* @param r IPC parsed command structure to fill in.
* @return Result code.
*/
static inline Result ipcParse(IpcParsedCommand* r) {
u32* buf = (u32*)armGetTls();
u32 ctrl0 = *buf++;
u32 ctrl1 = *buf++;
size_t i;
r->IsDomainRequest = false;
r->IsDomainResponse = false;
r->CommandType = (IpcCommandType) (ctrl0 & 0xffff);
r->HasPid = false;
r->RawSize = (ctrl1 & 0x1ff) * 4;
r->NumHandles = 0;
r->NumStaticsOut = (ctrl1 >> 10) & 15;
if (r->NumStaticsOut >> 1) r->NumStaticsOut--; // Value 2 -> Single descriptor
if (r->NumStaticsOut >> 1) r->NumStaticsOut--; // Value 3+ -> (Value - 2) descriptors
if (ctrl1 & 0x80000000) {
u32 ctrl2 = *buf++;
if (ctrl2 & 1) {
r->HasPid = true;
r->Pid = *buf++;
r->Pid |= ((u64)(*buf++)) << 32;
}
size_t num_handles_copy = ((ctrl2 >> 1) & 15);
size_t num_handles_move = ((ctrl2 >> 5) & 15);
size_t num_handles = num_handles_copy + num_handles_move;
u32* buf_after_handles = buf + num_handles;
if (num_handles > IPC_MAX_OBJECTS)
num_handles = IPC_MAX_OBJECTS;
for (i=0; i<num_handles; i++)
{
r->Handles[i] = *(buf+i);
r->WasHandleCopied[i] = (i < num_handles_copy);
}
r->NumHandles = num_handles;
buf = buf_after_handles;
}
size_t num_statics = (ctrl0 >> 16) & 15;
u32* buf_after_statics = buf + num_statics*2;
if (num_statics > IPC_MAX_BUFFERS)
num_statics = IPC_MAX_BUFFERS;
for (i=0; i<num_statics; i++, buf+=2) {
IpcStaticSendDescriptor* desc = (IpcStaticSendDescriptor*) buf;
u64 packed = (u64) desc->Packed;
r->Statics[i] = (void*) (desc->Addr | (((packed >> 12) & 15) << 32) | (((packed >> 6) & 15) << 36));
r->StaticSizes[i] = packed >> 16;
r->StaticIndices[i] = packed & 63;
}
r->NumStatics = num_statics;
buf = buf_after_statics;
size_t num_bufs_send = (ctrl0 >> 20) & 15;
size_t num_bufs_recv = (ctrl0 >> 24) & 15;
size_t num_bufs_exch = (ctrl0 >> 28) & 15;
size_t num_bufs = num_bufs_send + num_bufs_recv + num_bufs_exch;
r->Raw = (void*)(((uintptr_t)(buf + num_bufs*3) + 15) &~ 15);
r->RawWithoutPadding = (void*)((uintptr_t)(buf + num_bufs*3));
if (num_bufs > IPC_MAX_BUFFERS)
num_bufs = IPC_MAX_BUFFERS;
for (i=0; i<num_bufs; i++, buf+=3) {
IpcBufferDescriptor* desc = (IpcBufferDescriptor*) buf;
u64 packed = (u64) desc->Packed;
r->Buffers[i] = (void*) (desc->Addr | ((packed >> 28) << 32) | (((packed >> 2) & 15) << 36));
r->BufferSizes[i] = desc->Size;
r->BufferTypes[i] = (BufferType) (packed & 3);
if (i < num_bufs_send)
r->BufferDirections[i] = BufferDirection_Send;
else if (i < (num_bufs_send + num_bufs_recv))
r->BufferDirections[i] = BufferDirection_Recv;
else
r->BufferDirections[i] = BufferDirection_Exch;
}
r->NumBuffers = num_bufs;
return 0;
}
/**
* @brief Queries the size of an IPC pointer buffer.
* @param session IPC session handle.
* @param size Output variable in which to store the size.
* @return Result code.
*/
static inline Result ipcQueryPointerBufferSize(Handle session, size_t *size) {
u32* buf = (u32*)armGetTls();
buf[0] = IpcCommandType_Control;
buf[1] = 8;
buf[2] = 0;
buf[3] = 0;
buf[4] = SFCI_MAGIC;
buf[5] = 0;
buf[6] = 3;
buf[7] = 0;
Result rc = ipcDispatch(session);
if (R_SUCCEEDED(rc)) {
IpcParsedCommand r;
ipcParse(&r);
struct ipcQueryPointerBufferSizeResponse {
u64 magic;
u64 result;
u32 size;
} *raw = (struct ipcQueryPointerBufferSizeResponse*)r.Raw;
rc = raw->result;
if (R_SUCCEEDED(rc)) {
*size = raw->size & 0xffff;
}
}
return rc;
}
/**
* @brief Closes the IPC session with proper clean up.
* @param session IPC session handle.
* @return Result code.
*/
static inline Result ipcCloseSession(Handle session) {
u32* buf = (u32*)armGetTls();
buf[0] = IpcCommandType_Close;
buf[1] = 0;
return ipcDispatch(session);
}
/**
* @brief Clones an IPC session.
* @param session IPC session handle.
* @param unk Unknown.
* @param new_session_out Output cloned IPC session handle.
* @return Result code.
*/
static inline Result ipcCloneSession(Handle session, u32 unk, Handle* new_session_out) {
u32* buf = (u32*)armGetTls();
buf[0] = IpcCommandType_Control;
buf[1] = 9;
buf[2] = 0;
buf[3] = 0;
buf[4] = SFCI_MAGIC;
buf[5] = 0;
buf[6] = 4;
buf[7] = 0;
buf[8] = unk;
Result rc = ipcDispatch(session);
if (R_SUCCEEDED(rc)) {
IpcParsedCommand r;
ipcParse(&r);
struct ipcCloneSessionResponse {
u64 magic;
u64 result;
} *raw = (struct ipcCloneSessionResponse*)r.Raw;
rc = raw->result;
if (R_SUCCEEDED(rc) && new_session_out) {
*new_session_out = r.Handles[0];
}
}
return rc;
}
///@}
///@name IPC domain handling
///@{
/**
* @brief Converts an IPC session handle into a domain.
* @param session IPC session handle.
* @param object_id_out Output variable in which to store the object ID.
* @return Result code.
*/
static inline Result ipcConvertSessionToDomain(Handle session, u32* object_id_out) {
u32* buf = (u32*)armGetTls();
buf[0] = IpcCommandType_Control;
buf[1] = 8;
buf[4] = SFCI_MAGIC;
buf[5] = 0;
buf[6] = 0;
buf[7] = 0;
Result rc = ipcDispatch(session);
if (R_SUCCEEDED(rc)) {
IpcParsedCommand r;
ipcParse(&r);
struct ipcConvertSessionToDomainResponse {
u64 magic;
u64 result;
u32 object_id;
} *raw = (struct ipcConvertSessionToDomainResponse*)r.Raw;
rc = raw->result;
if (R_SUCCEEDED(rc)) {
*object_id_out = raw->object_id;
}
}
return rc;
}
/**
* @brief Adds an object ID to be sent through an IPC domain command structure.
* @param cmd IPC domain command structure.
* @param object_id Object ID to send.
*/
static inline void ipcSendObjectId(IpcCommand* cmd, u32 object_id) {
cmd->ObjectIds[cmd->NumObjectIds++] = object_id;
}
/**
* @brief Prepares the header of an IPC command structure (domain version).
* @param cmd IPC command structure.
* @param sizeof_raw Size in bytes of the raw data structure to embed inside the IPC request
* @param object_id Domain object ID.
* @return Pointer to the raw embedded data structure in the request, ready to be filled out.
*/
static inline void* ipcPrepareHeaderForDomain(IpcCommand* cmd, size_t sizeof_raw, u32 object_id) {
void* raw = ipcPrepareHeader(cmd, sizeof_raw + sizeof(DomainMessageHeader) + cmd->NumObjectIds*sizeof(u32));
DomainMessageHeader* hdr = (DomainMessageHeader*) raw;
u32 *object_ids = (u32*)(((uintptr_t) raw) + sizeof(DomainMessageHeader) + sizeof_raw);
hdr->Type = DomainMessageType_SendMessage;
hdr->NumObjectIds = (u8)cmd->NumObjectIds;
hdr->Length = sizeof_raw;
hdr->ThisObjectId = object_id;
hdr->Pad[0] = hdr->Pad[1] = 0;
for(size_t i = 0; i < cmd->NumObjectIds; i++)
object_ids[i] = cmd->ObjectIds[i];
return (void*)(((uintptr_t) raw) + sizeof(DomainMessageHeader));
}
/**
* @brief Parse an IPC command request into an IPC parsed command structure (domain version).
* @param r IPC parsed command structure to fill in.
* @return Result code.
*/
static inline Result ipcParseDomainRequest(IpcParsedCommand* r) {
Result rc = ipcParse(r);
DomainMessageHeader *hdr;
u32 *object_ids;
if(R_FAILED(rc))
return rc;
hdr = (DomainMessageHeader*) r->Raw;
object_ids = (u32*)(((uintptr_t) hdr) + sizeof(DomainMessageHeader) + hdr->Length);
r->Raw = (void*)(((uintptr_t) r->Raw) + sizeof(DomainMessageHeader));
r->IsDomainRequest = true;
r->InMessageType = (DomainMessageType)(hdr->Type);
switch (r->InMessageType) {
case DomainMessageType_SendMessage:
case DomainMessageType_Close:
break;
default:
return MAKERESULT(Module_Libnx, LibnxError_DomainMessageUnknownType);
}
r->InThisObjectId = hdr->ThisObjectId;
r->InNumObjectIds = hdr->NumObjectIds > 8 ? 8 : hdr->NumObjectIds;
if ((uintptr_t)object_ids + sizeof(u32) * r->InNumObjectIds - (uintptr_t)armGetTls() >= 0x100) {
return MAKERESULT(Module_Libnx, LibnxError_DomainMessageTooManyObjectIds);
}
for(size_t i = 0; i < r->InNumObjectIds; i++)
r->InObjectIds[i] = object_ids[i];
return rc;
}
/**
* @brief Parse an IPC command response into an IPC parsed command structure (domain version).
* @param r IPC parsed command structure to fill in.
* @param sizeof_raw Size in bytes of the raw data structure.
* @return Result code.
*/
static inline Result ipcParseDomainResponse(IpcParsedCommand* r, size_t sizeof_raw) {
Result rc = ipcParse(r);
DomainResponseHeader *hdr;
u32 *object_ids;
if(R_FAILED(rc))
return rc;
hdr = (DomainResponseHeader*) r->Raw;
r->Raw = (void*)(((uintptr_t) r->Raw) + sizeof(DomainResponseHeader));
object_ids = (u32*)(((uintptr_t) r->Raw) + sizeof_raw);//Official sw doesn't align this.
r->IsDomainResponse = true;
r->OutNumObjectIds = hdr->NumObjectIds > 8 ? 8 : hdr->NumObjectIds;
if ((uintptr_t)object_ids + sizeof(u32) * r->OutNumObjectIds - (uintptr_t)armGetTls() >= 0x100) {
return MAKERESULT(Module_Libnx, LibnxError_DomainMessageTooManyObjectIds);
}
for(size_t i = 0; i < r->OutNumObjectIds; i++)
r->OutObjectIds[i] = object_ids[i];
return rc;
}
/**
* @brief Closes a domain object by ID.
* @param session IPC session handle.
* @param object_id ID of the object to close.
* @return Result code.
*/
static inline Result ipcCloseObjectById(Handle session, u32 object_id) {
IpcCommand c;
DomainMessageHeader* hdr;
ipcInitialize(&c);
hdr = (DomainMessageHeader*)ipcPrepareHeader(&c, sizeof(DomainMessageHeader));
hdr->Type = DomainMessageType_Close;
hdr->NumObjectIds = 0;
hdr->Length = 0;
hdr->ThisObjectId = object_id;
hdr->Pad[0] = hdr->Pad[1] = 0;
return ipcDispatch(session); // this command has no associated response
}
///@}

41
Source/hoc-clk/common/include/memmem.h Normal file
View File

@@ -0,0 +1,41 @@
/*
MIT License
Copyright (c) 2024 Roy Merkel
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
copies of the Software, and to permit persons to whom the Software is
furnished to do so, subject to the following conditions:
The above copyright notice and this permission notice shall be included in all
copies or substantial portions of the Software.
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
SOFTWARE.
*/
#ifndef MEMMEM_IMPL_H
#define MEMMEM_IMPL_H
#include <stddef.h>
#ifdef __cplusplus
extern "C" {
#endif
void *memmem_impl(const void *haystack, size_t haystacklen,
const void *needle, size_t needlelen);
#ifdef __cplusplus
}
#endif
#endif

25
Source/hoc-clk/common/include/notification.h Normal file
View File

@@ -0,0 +1,25 @@
/*
* Copyright (c) ppkantorski (bord2death)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <string>
#include <ctime>
#include <cstdio>
namespace notification {
void writeNotification(const std::string& message);
}

113
Source/hoc-clk/common/include/pcv_types.h Normal file
View File

@@ -0,0 +1,113 @@
/*
* Copyright (c) ppkantorski (bord2death)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
/*
* SDx actual min is 625 mV. Multipliers 0/1 reserved.
* SD0 max is 1400 mV
* SD1 max is 1550 mV
* SD2 max is 3787.5 mV
* SD3 max is 3787.5 mV
*/
/*
* Switch Power domains (max77620):
* Name | Usage | uV step | uV min | uV default | uV max | Init
*-------+---------------+---------+--------+------------+---------+------------------
* sd0 | SoC | 12500 | 600000 | 625000 | 1400000 | 1.125V (pkg1.1)
* sd1 | SDRAM | 12500 | 600000 | 1125000 | 1125000 | 1.1V (pkg1.1)
* sd2 | ldo{0-1, 7-8} | 12500 | 600000 | 1325000 | 1350000 | 1.325V (pcv)
* sd3 | 1.8V general | 12500 | 600000 | 1800000 | 1800000 |
* ldo0 | Display Panel | 25000 | 800000 | 1200000 | 1200000 | 1.2V (pkg1.1)
* ldo1 | XUSB, PCIE | 25000 | 800000 | 1050000 | 1050000 | 1.05V (pcv)
* ldo2 | SDMMC1 | 50000 | 800000 | 1800000 | 3300000 |
* ldo3 | GC ASIC | 50000 | 800000 | 3100000 | 3100000 | 3.1V (pcv)
* ldo4 | RTC | 12500 | 800000 | 850000 | 850000 | 0.85V (AO, pcv)
* ldo5 | GC Card | 50000 | 800000 | 1800000 | 1800000 | 1.8V (pcv)
* ldo6 | Touch, ALS | 50000 | 800000 | 2900000 | 2900000 | 2.9V (pcv)
* ldo7 | XUSB | 50000 | 800000 | 1050000 | 1050000 | 1.05V (pcv)
* ldo8 | XUSB, DP, MCU | 50000 | 800000 | 1050000 | 2800000 | 1.05V/2.8V (pcv)
*/
// GPIOs T210: 3: 3.3V, 5: CPU PMIC, 6: GPU PMIC, 7: DSI/VI 1.2V powered by ldo0.
/*
* OTP: T210 - T210B01:
* SD0: 1.0V 1.05V - SoC. EN Based on FPSSRC.
* SD1: 1.15V 1.1V - DRAM for T210. EN Based on FPSSRC.
* SD2: 1.35V 1.35V
* SD3: 1.8V 1.8V
* All powered off?
* LDO0: -- -- - Display
* LDO1: 1.05V 1.05V
* LDO2: -- -- - SD
* LDO3: 3.1V 3.1V - GC ASIC
* LDO4: 1.0V 0.8V - Needed for RTC domain on T210.
* LDO5: 3.1V 3.1V
* LDO6: 2.8V 2.9V - Touch.
* LDO7: 1.05V 1.0V
* LDO8: 1.05V 1.0V
*/
/*
* MAX77620_AME_GPIO: control GPIO modes (bits 0 - 7 correspond to GPIO0 - GPIO7); 0 -> GPIO, 1 -> alt-mode
* MAX77620_REG_GPIOx: 0x9 sets output and enable
*/
typedef enum {
PcvPowerDomain_Max77620_Sd0 = 0,
PcvPowerDomain_Max77620_Sd1 = 1,
PcvPowerDomain_Max77620_Sd2 = 2,
PcvPowerDomain_Max77620_Sd3 = 3,
PcvPowerDomain_Max77620_Ldo0 = 4,
PcvPowerDomain_Max77620_Ldo1 = 5,
PcvPowerDomain_Max77620_Ldo2 = 6,
PcvPowerDomain_Max77620_Ldo3 = 7,
PcvPowerDomain_Max77620_Ldo4 = 8,
PcvPowerDomain_Max77620_Ldo5 = 9,
PcvPowerDomain_Max77620_Ldo6 = 10,
PcvPowerDomain_Max77620_Ldo7 = 11,
PcvPowerDomain_Max77620_Ldo8 = 12,
PcvPowerDomain_Max77621_Cpu = 13,
PcvPowerDomain_Max77621_Gpu = 14,
PcvPowerDomain_Max77812_Cpu = 15,
PcvPowerDomain_Max77812_Gpu = 16,
PcvPowerDomain_Max77812_Dram = 17,
} PowerDomain;
typedef enum {
PcvPowerDomainId_Max77620_Sd0 = 0x3A000080,
PcvPowerDomainId_Max77620_Sd1 = 0x3A000081, // vdd2
PcvPowerDomainId_Max77620_Sd2 = 0x3A000082,
PcvPowerDomainId_Max77620_Sd3 = 0x3A000083,
PcvPowerDomainId_Max77620_Ldo0 = 0x3A0000A0,
PcvPowerDomainId_Max77620_Ldo1 = 0x3A0000A1,
PcvPowerDomainId_Max77620_Ldo2 = 0x3A0000A2,
PcvPowerDomainId_Max77620_Ldo3 = 0x3A0000A3,
PcvPowerDomainId_Max77620_Ldo4 = 0x3A0000A4,
PcvPowerDomainId_Max77620_Ldo5 = 0x3A0000A5,
PcvPowerDomainId_Max77620_Ldo6 = 0x3A0000A6,
PcvPowerDomainId_Max77620_Ldo7 = 0x3A0000A7,
PcvPowerDomainId_Max77620_Ldo8 = 0x3A0000A8,
PcvPowerDomainId_Max77621_Cpu = 0x3A000003,
PcvPowerDomainId_Max77621_Gpu = 0x3A000004,
PcvPowerDomainId_Max77812_Cpu = 0x3A000003,
PcvPowerDomainId_Max77812_Gpu = 0x3A000004,
PcvPowerDomainId_Max77812_Dram = 0x3A000005, // vddq
} PowerDomainId;

39
Source/hoc-clk/common/include/pwm.h Normal file
View File

@@ -0,0 +1,39 @@
/*
* Copyright (c) MasaGratoR
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <switch.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
Service s;
} PwmChannelSession;
Result pwmInitialize(void);
void pwmExit(void);
Service* pwmGetServiceSession(void);
Result pwmOpenSession2(PwmChannelSession *out, u32 device_code);
Result pwmChannelSessionGetDutyCycle(PwmChannelSession *c, double* out);
void pwmChannelSessionClose(PwmChannelSession *c);
#ifdef __cplusplus
} // extern "C"
#endif

527
Source/hoc-clk/common/include/registers.h Normal file
View File

@@ -0,0 +1,527 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* Copyright (c) Linux 4 Tegra & Linux 4 Switch contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#define EMC_INTSTATUS_0 0x0
#define EMC_INTMASK_0 0x4
#define EMC_DBG_0 0x8
#define EMC_CFG_0 0xC
#define EMC_ADR_CFG_0 0x10
#define EMC_REFCTRL_0 0x20
#define EMC_PIN_0 0x24
#define EMC_TIMING_CONTROL_0 0x28
#define EMC_RC_0 0x2C
#define EMC_RFC_0 0x30
#define EMC_RAS_0 0x34
#define EMC_RP_0 0x38
#define EMC_R2W_0 0x3C
#define EMC_W2R_0 0x40
#define EMC_R2P_0 0x44
#define EMC_W2P_0 0x48
#define EMC_RD_RCD_0 0x4C
#define EMC_WR_RCD_0 0x50
#define EMC_RRD_0 0x54
#define EMC_REXT_0 0x58
#define EMC_WDV_0 0x5C
#define EMC_QUSE_0 0x60
#define EMC_QRST_0 0x64
#define EMC_QSAFE_0 0x68
#define EMC_RDV_0 0x6C
#define EMC_REFRESH_0 0x70
#define EMC_BURST_REFRESH_NUM_0 0x74
#define EMC_PDEX2WR_0 0x78
#define EMC_PDEX2RD_0 0x7C
#define EMC_PCHG2PDEN_0 0x80
#define EMC_ACT2PDEN_0 0x84
#define EMC_AR2PDEN_0 0x88
#define EMC_RW2PDEN_0 0x8C
#define EMC_TXSR_0 0x90
#define EMC_TCKE_0 0x94
#define EMC_TFAW_0 0x98
#define EMC_TRPAB_0 0x9C
#define EMC_TCLKSTABLE_0 0xA0
#define EMC_TCLKSTOP_0 0xA4
#define EMC_TREFBW_0 0xA8
#define EMC_TPPD_0 0xAC
#define EMC_ODT_WRITE_0 0xB0
#define EMC_PDEX2MRR_0 0xB4
#define EMC_WEXT_0 0xB8
#define EMC_RFC_SLR_0 0xC0
#define EMC_MRS_WAIT_CNT2_0 0xC4
#define EMC_MRS_WAIT_CNT_0 0xC8
#define EMC_MRS_0 0xCC
#define EMC_EMRS_0 0xD0
#define EMC_REF_0 0xD4
#define EMC_PRE_0 0xD8
#define EMC_NOP_0 0xDC
#define EMC_SELF_REF_0 0xE0
#define EMC_DPD_0 0xE4
#define EMC_MRW_0 0xE8
#define EMC_MRR_0 0xEC
#define EMC_CMDQ_0 0xF0
#define EMC_MC2EMCQ_0 0xF4
#define EMC_FBIO_SPARE_0 0x100
#define EMC_FBIO_CFG5_0 0x104
#define EMC_FBIO_CFG6_0 0x114
#define EMC_PDEX2CKE_0 0x118
#define EMC_CKE2PDEN_0 0x11C
#define EMC_CFG_RSV_0 0x120
#define EMC_ACPD_CONTROL_0 0x124
#define EMC_MPC_0 0x128
#define EMC_EMRS2_0 0x12C
#define EMC_EMRS3_0 0x130
#define EMC_MRW2_0 0x134
#define EMC_MRW3_0 0x138
#define EMC_MRW4_0 0x13C
#define EMC_CLKEN_OVERRIDE_0 0x140
#define EMC_R2R_0 0x144
#define EMC_W2W_0 0x148
#define EMC_EINPUT_0 0x14C
#define EMC_EINPUT_DURATION_0 0x150
#define EMC_PUTERM_EXTRA_0 0x154
#define EMC_TCKESR_0 0x158
#define EMC_TPD_0 0x15C
#define EMC_AUTO_CAL_CONFIG_0 0x2A4
#define EMC_AUTO_CAL_INTERVAL_0 0x2A8
#define EMC_AUTO_CAL_STATUS_0 0x2AC
#define EMC_REQ_CTRL_0 0x2B0
#define EMC_EMC_STATUS_0 0x2B4
#define EMC_CFG_2_0 0x2B8
#define EMC_CFG_DIG_DLL_0 0x2BC
#define EMC_CFG_DIG_DLL_PERIOD_0 0x2C0
#define EMC_DIG_DLL_STATUS_0 0x2C4
#define EMC_CFG_DIG_DLL_1_0 0x2C8
#define EMC_RDV_MASK_0 0x2CC
#define EMC_WDV_MASK_0 0x2D0
#define EMC_RDV_EARLY_MASK_0 0x2D4
#define EMC_RDV_EARLY_0 0x2D8
#define EMC_AUTO_CAL_CONFIG8_0 0x2DC
#define EMC_ZCAL_INTERVAL_0 0x2E0
#define EMC_ZCAL_WAIT_CNT_0 0x2E4
#define EMC_ZCAL_MRW_CMD_0 0x2E8
#define EMC_ZQ_CAL_0 0x2EC
#define EMC_XM2COMPPADCTRL3_0 0x2F4
#define EMC_AUTO_CAL_VREF_SEL_0_0 0x2F8
#define EMC_AUTO_CAL_VREF_SEL_1_0 0x300
#define EMC_XM2COMPPADCTRL_0 0x30C
#define EMC_FDPD_CTRL_DQ_0 0x310
#define EMC_FDPD_CTRL_CMD_0 0x314
#define EMC_PMACRO_CMD_BRICK_CTRL_FDPD_0 0x318
#define EMC_PMACRO_DATA_BRICK_CTRL_FDPD_0 0x31C
#define EMC_SCRATCH0_0 0x324
#define EMC_PMACRO_BRICK_CTRL_RFU1_0 0x330
#define EMC_PMACRO_BRICK_CTRL_RFU2_0 0x334
#define EMC_CMD_MAPPING_CMD0_0_0 0x380
#define EMC_CMD_MAPPING_CMD0_1_0 0x384
#define EMC_CMD_MAPPING_CMD0_2_0 0x388
#define EMC_CMD_MAPPING_CMD1_0_0 0x38C
#define EMC_CMD_MAPPING_CMD1_1_0 0x390
#define EMC_CMD_MAPPING_CMD1_2_0 0x394
#define EMC_CMD_MAPPING_CMD2_0_0 0x398
#define EMC_CMD_MAPPING_CMD2_1_0 0x39C
#define EMC_CMD_MAPPING_CMD2_2_0 0x3A0
#define EMC_CMD_MAPPING_CMD3_0_0 0x3A4
#define EMC_CMD_MAPPING_CMD3_1_0 0x3A8
#define EMC_CMD_MAPPING_CMD3_2_0 0x3AC
#define EMC_CMD_MAPPING_BYTE_0 0x3B0
#define EMC_TR_TIMING_0_0 0x3B4
#define EMC_TR_CTRL_0_0 0x3B8
#define EMC_TR_CTRL_1_0 0x3BC
#define EMC_SWITCH_BACK_CTRL_0 0x3C0
#define EMC_TR_RDV_0 0x3C4
#define EMC_STALL_THEN_EXE_BEFORE_CLKCHANGE_0 0x3C8
#define EMC_STALL_THEN_EXE_AFTER_CLKCHANGE_0 0x3CC
#define EMC_UNSTALL_RW_AFTER_CLKCHANGE_0 0x3D0
#define EMC_AUTO_CAL_ 0x3D4
#define EMC_SEL_DPD_CTRL_0 0x3D8
#define EMC_PRE_REFRESH_REQ_CNT_0 0x3DC
#define EMC_DYN_SELF_REF_CONTROL_0 0x3E0
#define EMC_TXSRDLL_0 0x3E4
#define EMC_CCFIFO_ADDR_0 0x3E8
#define EMC_CCFIFO_DATA_0 0x3EC
#define EMC_CCFIFO_STATUS_0 0x3F0
#define EMC_TR_QPOP_0 0x3F4
#define EMC_TR_RDV_MASK_0 0x3F8
#define EMC_TR_QSAFE_0 0x3FC
#define EMC_TR_QRST_0 0x400
#define EMC_SWIZZLE_RANK0_BYTE0_0 0x404
#define EMC_SWIZZLE_RANK0_BYTE1_0 0x408
#define EMC_SWIZZLE_RANK0_BYTE2_0 0x40C
#define EMC_SWIZZLE_RANK0_BYTE3_0 0x410
#define EMC_SWIZZLE_RANK1_BYTE0_0 0x418
#define EMC_SWIZZLE_RANK1_BYTE1_0 0x41C
#define EMC_SWIZZLE_RANK1_BYTE2_0 0x420
#define EMC_SWIZZLE_RANK1_BYTE3_0 0x424
#define EMC_ISSUE_QRST_0 0x428
#define EMC_PMC_SCRATCH1_0 0x440
#define EMC_PMC_SCRATCH2_0 0x444
#define EMC_PMC_SCRATCH3_0 0x448
#define EMC_AUTO_CAL_CONFIG2_0 0x458
#define EMC_AUTO_CAL_CONFIG3_0 0x45C
#define EMC_TR_DVFS_0 0x460
#define EMC_AUTO_CAL_CHANNEL_0 0x464
#define EMC_IBDLY_0 0x468
#define EMC_OBDLY_0 0x46C
#define EMC_TXDSRVTTGEN_0 0x480
#define EMC_WE_DURATION_0 0x48C
#define EMC_WS_DURATION_0 0x490
#define EMC_WEV_0 0x494
#define EMC_WSV_0 0x498
#define EMC_CFG_3_0 0x49C
#define EMC_MRW5_0 0x4A0
#define EMC_MRW6_0 0x4A4
#define EMC_MRW7_0 0x4A8
#define EMC_MRW8_0 0x4AC
#define EMC_MRW9_0 0x4B0
#define EMC_MRW10_0 0x4B4
#define EMC_MRW11_0 0x4B8
#define EMC_MRW12_0 0x4BC
#define EMC_MRW13_0 0x4C0
#define EMC_MRW14_0 0x4C4
#define EMC_MRW15_0 0x4D0
#define EMC_CFG_SYNC_0 0x4D4
#define EMC_FDPD_CTRL_CMD_NO_RAMP_0 0x4D8
#define EMC_WDV_CHK_0 0x4E0
#define EMC_CFG_PIPE_2_0 0x554
#define EMC_CFG_PIPE_CLK_0 0x558
#define EMC_CFG_PIPE_1_0 0x55C
#define EMC_CFG_PIPE_0 0x560
#define EMC_QPOP_0 0x564
#define EMC_QUSE_WIDTH_0 0x568
#define EMC_PUTERM_WIDTH_0 0x56C
#define EMC_BGBIAS_CTL0_0 0x570
#define EMC_AUTO_CAL_CONFIG7_0 0x574
#define EMC_XM2COMPPADCTRL2_0 0x578
#define EMC_COMP_PAD_SW_CTRL_0 0x57C
#define EMC_REFCTRL2_0 0x580
#define EMC_FBIO_CFG7_0 0x584
#define EMC_DATA_BRLSHFT_0_0 0x588
#define EMC_DATA_BRLSHFT_1_0 0x58C
#define EMC_RFCPB_0 0x590
#define EMC_DQS_BRLSHFT_0_0 0x594
#define EMC_DQS_BRLSHFT_1_0 0x598
#define EMC_CMD_BRLSHFT_0_0 0x59C
#define EMC_CMD_BRLSHFT_1_0 0x5A0
#define EMC_CMD_BRLSHFT_2_0 0x5A4
#define EMC_CMD_BRLSHFT_3_0 0x5A8
#define EMC_QUSE_BRLSHFT_0_0 0x5AC
#define EMC_AUTO_CAL_CONFIG4_0 0x5B0
#define EMC_AUTO_CAL_CONFIG5_0 0x5B4
#define EMC_QUSE_BRLSHFT_1_0 0x5B8
#define EMC_QUSE_BRLSHFT_2_0 0x5BC
#define EMC_CCDMW_0 0x5C0
#define EMC_QUSE_BRLSHFT_3_0 0x5C4
#define EMC_FBIO_CFG8_0 0x5C8
#define EMC_AUTO_CAL_CONFIG6_0 0x5CC
#define EMC_PROTOBIST_CONFIG_ADR_1_0 0x5D0
#define EMC_PROTOBIST_CONFIG_ADR_2_0 0x5D4
#define EMC_PROTOBIST_MISC_0 0x5D8
#define EMC_PROTOBIST_WDATA_LOWER_0 0x5DC
#define EMC_PROTOBIST_WDATA_UPPER_0 0x5E0
#define EMC_PROTOBIST_RDATA_0 0x5EC
#define EMC_DLL_CFG_0_0 0x5E4
#define EMC_DLL_CFG_1_0 0x5E8
#define EMC_CONFIG_SAMPLE_DELAY_0 0x5F0
#define EMC_CFG_UPDATE_0 0x5F4
#define EMC_PMACRO_QUSE_DDLL_RANK0_0_0 0x600
#define EMC_PMACRO_QUSE_DDLL_RANK0_1_0 0x604
#define EMC_PMACRO_QUSE_DDLL_RANK0_2_0 0x608
#define EMC_PMACRO_QUSE_DDLL_RANK0_3_0 0x60C
#define EMC_PMACRO_QUSE_DDLL_RANK0_4_0 0x610
#define EMC_PMACRO_QUSE_DDLL_RANK0_5_0 0x614
#define EMC_PMACRO_QUSE_DDLL_RANK1_0_0 0x620
#define EMC_PMACRO_QUSE_DDLL_RANK1_1_0 0x624
#define EMC_PMACRO_QUSE_DDLL_RANK1_2_0 0x628
#define EMC_PMACRO_QUSE_DDLL_RANK1_3_0 0x62C
#define EMC_PMACRO_QUSE_DDLL_RANK1_4_0 0x630
#define EMC_PMACRO_QUSE_DDLL_RANK1_5_0 0x634
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_0_0 0x640
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_1_0 0x644
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_2_0 0x648
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_3_0 0x64C
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_4_0 0x650
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK0_5_0 0x654
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_0_0 0x660
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_1_0 0x664
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_2_0 0x668
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_3_0 0x66C
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_4_0 0x670
#define EMC_PMACRO_OB_DDLL_LONG_DQ_RANK1_5_0 0x674
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_0_0 0x680
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_1_0 0x684
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_2_0 0x688
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_3_0 0x68C
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_4_0 0x690
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK0_5_0 0x694
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_0_0 0x6A0
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_1_0 0x6A4
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_2_0 0x6A8
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_3_0 0x6AC
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_4_0 0x6B0
#define EMC_PMACRO_OB_DDLL_LONG_DQS_RANK1_5_0 0x6B4
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_0_0 0x6C0
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_1_0 0x6C4
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_2_0 0x6C8
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_3_0 0x6CC
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_4_0 0x6D0
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK0_5_0 0x6D4
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_0_0 0x6E0
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_1_0 0x6E4
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_2_0 0x6E8
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_3_0 0x6EC
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_4_0 0x6F0
#define EMC_PMACRO_IB_DDLL_LONG_DQS_RANK1_5_0 0x6F4
#define EMC_PMACRO_AUTOCAL_CFG_0_0 0x700
#define EMC_PMACRO_AUTOCAL_CFG_1_0 0x704
#define EMC_PMACRO_AUTOCAL_CFG_2_0 0x708
#define EMC_PMACRO_TX_PWRD_0_0 0x720
#define EMC_PMACRO_TX_PWRD_1_0 0x724
#define EMC_PMACRO_TX_PWRD_2_0 0x728
#define EMC_PMACRO_TX_PWRD_3_0 0x72C
#define EMC_PMACRO_TX_PWRD_4_0 0x730
#define EMC_PMACRO_TX_PWRD_5_0 0x734
#define EMC_PMACRO_TX_SEL_CLK_SRC_0_0 0x740
#define EMC_PMACRO_TX_SEL_CLK_SRC_1_0 0x744
#define EMC_PMACRO_TX_SEL_CLK_SRC_2_0 0x748
#define EMC_PMACRO_TX_SEL_CLK_SRC_3_0 0x74C
#define EMC_PMACRO_TX_SEL_CLK_SRC_4_0 0x750
#define EMC_PMACRO_TX_SEL_CLK_SRC_5_0 0x754
#define EMC_PMACRO_DDLL_BYPASS_0 0x760
#define EMC_PMACRO_DDLL_PWRD_0_0 0x770
#define EMC_PMACRO_DDLL_PWRD_1_0 0x774
#define EMC_PMACRO_DDLL_PWRD_2_0 0x778
#define EMC_PMACRO_CMD_CTRL_0_0 0x780
#define EMC_PMACRO_CMD_CTRL_1_0 0x784
#define EMC_PMACRO_CMD_CTRL_2_0 0x788
#define MC_REGISTER_BASE 0x70019000
#define MC_REGISTER_REGION_SIZE 0x1000
#define MC_INTSTATUS_0 0x000
#define MC_INTMASK_0 0x004
#define MC_ERR_STATUS_0 0x008
#define MC_ERR_ADR_0 0x00C
#define MC_SMMU_CONFIG_0 0x010
#define MC_SMMU_PTB_ASID_0 0x01C
#define MC_SMMU_PTB_DATA_0 0x020
#define MC_SMMU_TLB_FLUSH_0 0x030
#define MC_SMMU_PTC_FLUSH_0_0 0x034
#define MC_EMEM_CFG_0 0x050
#define MC_EMEM_ADR_CFG_0 0x054
#define MC_EMEM_ARB_CFG_0 0x090
#define MC_EMEM_ARB_OUTSTANDING_REQ_0 0x094
#define MC_EMEM_ARB_TIMING_RCD_0 0x098
#define MC_EMEM_ARB_TIMING_RP_0 0x09C
#define MC_EMEM_ARB_TIMING_RC_0 0x0A0
#define MC_EMEM_ARB_TIMING_RAS_0 0x0A4
#define MC_EMEM_ARB_TIMING_FAW_0 0x0A8
#define MC_EMEM_ARB_TIMING_RRD_0 0x0AC
#define MC_EMEM_ARB_TIMING_RAP2PRE_0 0x0B0
#define MC_EMEM_ARB_TIMING_WAP2PRE_0 0x0B4
#define MC_EMEM_ARB_TIMING_R2R_0 0x0B8
#define MC_EMEM_ARB_TIMING_W2W_0 0x0BC
#define MC_EMEM_ARB_TIMING_R2W_0 0x0C0
#define MC_EMEM_ARB_TIMING_W2R_0 0x0C4
#define MC_EMEM_ARB_MISC2_0 0x0C8
#define MC_EMEM_ARB_DA_TURNS_0 0x0D0
#define MC_EMEM_ARB_DA_COVERS_0 0x0D4
#define MC_EMEM_ARB_MISC0_0 0x0D8
#define MC_EMEM_ARB_MISC1_0 0x0DC
#define MC_TIMING_CONTROL_0 0xFC
#define MC_EMEM_ARB_RING1_THROTTLE_0 0x0E0
#define MC_CLIENT_HOTRESET_CTRL_0 0x200
#define MC_CLIENT_HOTRESET_STATUS_0 0x204
#define MC_SMMU_AFI_ASID_0 0x238
#define MC_SMMU_DC_ASID_0 0x240
#define MC_SMMU_DCB_ASID_0 0x244
#define MC_SMMU_HC_ASID_0 0x250
#define MC_SMMU_HDA_ASID_0 0x254
#define MC_SMMU_ISP2_ASID_0 0x258
#define MC_SMMU_MSENC_NVENC_ASID_0 0x264
#define MC_SMMU_NV_ASID_0 0x268
#define MC_SMMU_NV2_ASID_0 0x26C
#define MC_SMMU_PPCS_ASID_0 0x270
#define MC_SMMU_SATA_ASID_0 0x274
#define MC_SMMU_VI_ASID_0 0x280
#define MC_SMMU_VIC_ASID_0 0x284
#define MC_SMMU_XUSB_HOST_ASID_0 0x288
#define MC_SMMU_XUSB_DEV_ASID_0 0x28C
#define MC_SMMU_TSEC_ASID_0 0x294
#define MC_LATENCY_ALLOWANCE_AVPC_0 0x2E4
#define MC_LATENCY_ALLOWANCE_DC_0 0x2E8
#define MC_LATENCY_ALLOWANCE_DC_1 0x2EC
#define MC_LATENCY_ALLOWANCE_DCB_0 0x2F4
#define MC_LATENCY_ALLOWANCE_DCB_1 0x2F8
#define MC_LATENCY_ALLOWANCE_HC_0 0x310
#define MC_LATENCY_ALLOWANCE_HC_1 0x314
#define MC_LATENCY_ALLOWANCE_MPCORE_0 0x320
#define MC_LATENCY_ALLOWANCE_NVENC_0 0x328
#define MC_LATENCY_ALLOWANCE_PPCS_0 0x344
#define MC_LATENCY_ALLOWANCE_PPCS_1 0x348
#define MC_LATENCY_ALLOWANCE_ISP2_0 0x370
#define MC_LATENCY_ALLOWANCE_ISP2_1 0x374
#define MC_LATENCY_ALLOWANCE_XUSB_0 0x37C
#define MC_LATENCY_ALLOWANCE_XUSB_1 0x380
#define MC_LATENCY_ALLOWANCE_TSEC_0 0x390
#define MC_LATENCY_ALLOWANCE_VIC_0 0x394
#define MC_LATENCY_ALLOWANCE_VI2_0 0x398
#define MC_LATENCY_ALLOWANCE_GPU_0 0x3AC
#define MC_LATENCY_ALLOWANCE_SDMMCA_0 0x3B8
#define MC_LATENCY_ALLOWANCE_SDMMCAA_0 0x3BC
#define MC_LATENCY_ALLOWANCE_SDMMC_0 0x3C0
#define MC_LATENCY_ALLOWANCE_SDMMCAB_0 0x3C4
#define MC_LATENCY_ALLOWANCE_NVDEC_0 0x3D8
#define MC_LATENCY_ALLOWANCE_GPU2_0 0x3E8
#define MC_DIS_PTSA_RATE_0 0x41C
#define MC_DIS_PTSA_MIN_0 0x420
#define MC_DIS_PTSA_MAX_0 0x424
#define MC_DISB_PTSA_RATE_0 0x428
#define MC_DISB_PTSA_MIN_0 0x42C
#define MC_DISB_PTSA_MAX_0 0x430
#define MC_VE_PTSA_RATE_0 0x434
#define MC_VE_PTSA_MIN_0 0x438
#define MC_VE_PTSA_MAX_0 0x43C
#define MC_MLL_MPCORER_PTSA_RATE_0 0x44C
#define MC_RING1_PTSA_RATE_0 0x47C
#define MC_RING1_PTSA_MIN_0 0x480
#define MC_RING1_PTSA_MAX_0 0x484
#define MC_PCX_PTSA_RATE_0 0x4AC
#define MC_PCX_PTSA_MIN_0 0x4B0
#define MC_PCX_PTSA_MAX_0 0x4B4
#define MC_MSE_PTSA_RATE_0 0x4C4
#define MC_MSE_PTSA_MIN_0 0x4C8
#define MC_MSE_PTSA_MAX_0 0x4CC
#define MC_AHB_PTSA_RATE_0 0x4DC
#define MC_AHB_PTSA_MIN_0 0x4E0
#define MC_AHB_PTSA_MAX_0 0x4E4
#define MC_APB_PTSA_RATE_0 0x4E8
#define MC_APB_PTSA_MIN_0 0x4EC
#define MC_APB_PTSA_MAX_0 0x4F0
#define MC_FTOP_PTSA_RATE_0 0x50C
#define MC_HOST_PTSA_RATE_0 0x518
#define MC_HOST_PTSA_MIN_0 0x51C
#define MC_HOST_PTSA_MAX_0 0x520
#define MC_USBX_PTSA_RATE_0 0x524
#define MC_USBX_PTSA_MIN_0 0x528
#define MC_USBX_PTSA_MAX_0 0x52C
#define MC_USBD_PTSA_RATE_0 0x530
#define MC_USBD_PTSA_MIN_0 0x534
#define MC_USBD_PTSA_MAX_0 0x538
#define MC_GK_PTSA_RATE_0 0x53C
#define MC_GK_PTSA_MIN_0 0x540
#define MC_GK_PTSA_MAX_0 0x544
#define MC_AUD_PTSA_RATE_0 0x548
#define MC_AUD_PTSA_MIN_0 0x54C
#define MC_AUD_PTSA_MAX_0 0x550
#define MC_VICPC_PTSA_RATE_0 0x554
#define MC_VICPC_PTSA_MIN_0 0x558
#define MC_VICPC_PTSA_MAX_0 0x55C
#define MC_JPG_PTSA_RATE_0 0x584
#define MC_JPG_PTSA_MIN_0 0x588
#define MC_JPG_PTSA_MAX_0 0x58C
#define MC_GK2_PTSA_RATE_0 0x610
#define MC_GK2_PTSA_MIN_0 0x614
#define MC_GK2_PTSA_MAX_0 0x618
#define MC_SDM_PTSA_RATE_0 0x61C
#define MC_SDM_PTSA_MIN_0 0x620
#define MC_SDM_PTSA_MAX_0 0x624
#define MC_HDAPC_PTSA_RATE_0 0x628
#define MC_HDAPC_PTSA_MIN_0 0x62C
#define MC_HDAPC_PTSA_MAX_0 0x630
#define MC_SEC_CARVEOUT_BOM_0 0x670
#define MC_SEC_CARVEOUT_SIZE_MB_0 0x674
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0A_0 0x690
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0AB_0 0x694
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0B_0 0x698
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0BB_0 0x69C
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0C_0 0x6A0
#define MC_SCALED_LATENCY_ALLOWANCE_DISPLAY0CB_0 0x6A4
#define MC_EMEM_ARB_TIMING_RFCPB_0 0x6C0
#define MC_EMEM_ARB_TIMING_CCDMW_0 0x6C4
#define MC_EMEM_ARB_REFPB_HP_CTRL_0 0x6F0
#define MC_EMEM_ARB_REFPB_BANK_CTRL_0 0x6F4
#define MC_PTSA_GRANT_DECREMENT_0 0x960
#define MC_CLIENT_HOTRESET_CTRL_1 0x970
#define MC_CLIENT_HOTRESET_STATUS_1 0x974
#define MC_SMMU_PTC_FLUSH_1 0x9B8
#define MC_SMMU_DC1_ASID_0 0xA88
#define MC_SMMU_SDMMC1A_ASID_0 0xA94
#define MC_SMMU_SDMMC2A_ASID_0 0xA98
#define MC_SMMU_SDMMC3A_ASID_0 0xA9C
#define MC_SMMU_SDMMC4A_ASID_0 0xAA0
#define MC_SMMU_ISP2B_ASID_0 0xAA4
#define MC_SMMU_GPU_ASID_0 0xAA8
#define MC_SMMU_GPUB_ASID_0 0xAAC
#define MC_SMMU_PPCS2_ASID_0 0xAB0
#define MC_SMMU_NVDEC_ASID_0 0xAB4
#define MC_SMMU_APE_ASID_0 0xAB8
#define MC_SMMU_SE_ASID_0 0xABC
#define MC_SMMU_NVJPG_ASID_0 0xAC0
#define MC_SMMU_HC1_ASID_0 0xAC4
#define MC_SMMU_SE1_ASID_0 0xAC8
#define MC_SMMU_AXIAP_ASID_0 0xACC
#define MC_SMMU_ETR_ASID_0 0xAD0
#define MC_SMMU_TSECB_ASID_0 0xAD4
#define MC_SMMU_TSEC1_ASID_0 0xAD8
#define MC_SMMU_TSECB1_ASID_0 0xADC
#define MC_SMMU_NVDEC1_ASID_0 0xAE0
#define MC_EMEM_ARB_DHYST_CTRL_0 0xBCC
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_0 0xBD0
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_1 0xBD4
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_2 0xBD8
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_3 0xBDC
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_4 0xBE0
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_5 0xBE4
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_6 0xBE8
#define MC_EMEM_ARB_DHYST_TIMEOUT_UTIL_7 0xBEC
#define MC_ERR_GENERALIZED_CARVEOUT_STATUS_0 0xC00
#define MC_SECURITY_CARVEOUT2_BOM_0 0xC5C
#define MC_SECURITY_CARVEOUT3_BOM_0 0xCAC
#define CLDVFS_REGION_BASE 0x70110000
#define CLDVFS_REGION_SIZE 0x1000
#define CL_DVFS_CTRL_0 0x0
#define CL_DVFS_CONFIG_0 0x4
#define CL_DVFS_PARAMS_0 0x8
#define CL_DVFS_TUNE0_0 0xC
#define CL_DVFS_TUNE1_0 0x10
#define CL_DVFS_FREQ_REQ_0 0x14
#define CL_DVFS_SCALE_RAMP_0 0x18
#define CL_DVFS_DROOP_CTRL_0 0x1C
#define CL_DVFS_OUTPUT_CFG_0 0x20
#define CL_DVFS_OUTPUT_FORCE_0 0x24
#define CL_DVFS_MONITOR_CTRL_0 0x28
#define CL_DVFS_MONITOR_DATA_0 0x2C
#define CL_DVFS_I2C_CFG_0 0x40
#define CL_DVFS_I2C_VDD_REG_ADDR_0 0x44
#define CL_DVFS_I2C_STS_0 0x48
#define CL_DVFS_INTR_STS_0 0x5C
#define CL_DVFS_INTR_EN_0 0x60
#define DVFS_DFLL_THROTTLE_CTRL_0 0x64
#define DVFS_DFLL_THROTTLE_LIGHT_0 0x68
#define DVFS_DFLL_THROTTLE_MEDIUM_0 0x6C
#define DVFS_DFLL_THROTTLE_HEAVY_0 0x70
#define DVFS_CC4_HVC_0 0x74
#define CL_DVFS_MONITOR_DATA_0 0x2C
#define CL_DVFS_I2C_CFG_0 0x40
#define CL_DVFS_I2C_VDD_REG_ADDR_0 0x44
#define CL_DVFS_I2C_STS_0 0x48
#define CL_DVFS_INTR_STS_0 0x5C
#define CL_DVFS_I2C_CLK_DIVISOR_REGISTER_0 0x16C

38
Source/hoc-clk/common/include/rgltr.h Normal file
View File

@@ -0,0 +1,38 @@
/*
* Copyright (c) ppkantorski (bord2death)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <switch.h>
#include "pcv_types.h"
typedef struct {
Service s;
} RgltrSession;
Result rgltrInitialize(void);
void rgltrExit(void);
Service* rgltrGetServiceSession(void);
Result rgltrOpenSession(RgltrSession* session_out, PowerDomainId module_id);
void rgltrCloseSession(RgltrSession* session);
Result rgltrGetVoltage(RgltrSession* session, u32 *out_volt);
Result rgltrGetPowerModuleNumLimit(u32 *out);
Result rgltrGetVoltageEnabled(RgltrSession* session, u32 *out);
Result rgltrRequestVoltage(RgltrSession* session, u32 microvolt);
Result rgltrCancelVoltageRequest(RgltrSession* session);

32
Source/hoc-clk/common/include/rgltr_services.h Normal file
View File

@@ -0,0 +1,32 @@
/*
* Copyright (c) ppkantorski (bord2death)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <switch.h> // for Service, Result, hosversionBefore(), smGetService(), serviceClose(), etc.
#include "rgltr.h" // for RgltrSession, PowerDomainId, etc.
extern Service g_rgltrSrv;
Result rgltrInitialize(void);
void rgltrExit(void);
Result rgltrOpenSession(RgltrSession* session_out, PowerDomainId module_id);
Result rgltrGetVoltage(RgltrSession* session, u32* out_volt);
void rgltrCloseSession(RgltrSession* session);

82
Source/hoc-clk/common/include/service_guard.h Normal file
View File

@@ -0,0 +1,82 @@
/*
* Copyright (c) MasaGratoR
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#ifdef __cplusplus
extern "C" {
#endif
#include <switch/types.h>
#include <switch/result.h>
#include <switch/kernel/mutex.h>
#include <switch/sf/service.h>
#include <switch/services/sm.h>
typedef struct ServiceGuard {
Mutex mutex;
u32 refCount;
} ServiceGuard;
NX_INLINE bool serviceGuardBeginInit(ServiceGuard* g)
{
mutexLock(&g->mutex);
return (g->refCount++) == 0;
}
NX_INLINE Result serviceGuardEndInit(ServiceGuard* g, Result rc, void (*cleanupFunc)(void))
{
if (R_FAILED(rc)) {
cleanupFunc();
--g->refCount;
}
mutexUnlock(&g->mutex);
return rc;
}
NX_INLINE void serviceGuardExit(ServiceGuard* g, void (*cleanupFunc)(void))
{
mutexLock(&g->mutex);
if (g->refCount && (--g->refCount) == 0)
cleanupFunc();
mutexUnlock(&g->mutex);
}
#define NX_GENERATE_SERVICE_GUARD_PARAMS(name, _paramdecl, _parampass) \
\
static ServiceGuard g_##name##Guard; \
NX_INLINE Result _##name##Initialize _paramdecl; \
static void _##name##Cleanup(void); \
\
Result name##Initialize _paramdecl \
{ \
Result rc = 0; \
if (serviceGuardBeginInit(&g_##name##Guard)) \
rc = _##name##Initialize _parampass; \
return serviceGuardEndInit(&g_##name##Guard, rc, _##name##Cleanup); \
} \
\
void name##Exit(void) \
{ \
serviceGuardExit(&g_##name##Guard, _##name##Cleanup); \
}
#define NX_GENERATE_SERVICE_GUARD(name) NX_GENERATE_SERVICE_GUARD_PARAMS(name, (void), ())
#ifdef __cplusplus
}
#endif

55
Source/hoc-clk/common/include/sysclk.h Normal file
View File

@@ -0,0 +1,55 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include <cstdint>
#include <switch.h> // include libnx
#ifdef __cplusplus
#include "cpp_util.hpp"
extern "C" {
#endif
// typedef std::uint32_t Result;
// typedef std::uint32_t u32;
// typedef std::int32_t s32;
// typedef std::uint64_t u64;
// typedef std::int64_t s64;
// typedef std::uint8_t u8;
// typedef std::int16_t s16;
// typedef std::uint16_t u16;
#include "sysclk/ipc.h"
#include "sysclk/board.h"
#include "sysclk/clock_manager.h"
#include "sysclk/apm.h"
#include "sysclk/config.h"
#include "sysclk/errors.h"
#include "sysclk/psm_ext.h"
#ifdef __cplusplus
}
#endif

39
Source/hoc-clk/common/include/sysclk/apm.h Normal file
View File

@@ -0,0 +1,39 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include "board.h"
typedef struct {
uint32_t id;
uint32_t cpu_hz;
uint32_t gpu_hz;
uint32_t mem_hz;
} SysClkApmConfiguration;
extern SysClkApmConfiguration sysclk_g_apm_configurations[];

279
Source/hoc-clk/common/include/sysclk/board.h Normal file
View File

@@ -0,0 +1,279 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include <switch/types.h>
typedef enum
{
SysClkSocType_Erista = 0,
SysClkSocType_Mariko,
SysClkSocType_EnumMax
} SysClkSocType;
typedef enum
{
HorizonOCConsoleType_Icosa = 0,
HorizonOCConsoleType_Copper,
HorizonOCConsoleType_Hoag,
HorizonOCConsoleType_Iowa,
HorizonOCConsoleType_Calcio,
HorizonOCConsoleType_Aula,
HorizonOCConsoleType_EnumMax,
} HorizonOCConsoleType;
typedef enum {
HocClkVoltage_SOC = 0,
HocClkVoltage_EMCVDD2,
HocClkVoltage_CPU,
HocClkVoltage_GPU,
HocClkVoltage_EMCVDDQ_MarikoOnly,
HocClkVoltage_Display,
HocClkVoltage_Battery,
HocClkVoltage_EnumMax,
} HocClkVoltage;
typedef enum
{
SysClkProfile_Handheld = 0,
SysClkProfile_HandheldCharging,
SysClkProfile_HandheldChargingUSB,
SysClkProfile_HandheldChargingOfficial,
SysClkProfile_Docked,
SysClkProfile_EnumMax
} SysClkProfile;
typedef enum
{
SysClkModule_CPU = 0,
SysClkModule_GPU,
SysClkModule_MEM,
HorizonOCModule_Governor,
HorizonOCModule_Display,
SysClkModule_EnumMax,
} SysClkModule;
typedef enum
{
SysClkThermalSensor_SOC = 0,
SysClkThermalSensor_PCB,
SysClkThermalSensor_Skin,
HorizonOCThermalSensor_Battery,
HorizonOCThermalSensor_PMIC,
HorizonOCThermalSensor_CPU,
HorizonOCThermalSensor_GPU,
HorizonOCThermalSensor_MEM,
HorizonOCThermalSensor_PLLX,
SysClkThermalSensor_EnumMax
} SysClkThermalSensor;
typedef enum
{
SysClkPowerSensor_Now = 0,
SysClkPowerSensor_Avg,
SysClkPowerSensor_EnumMax
} SysClkPowerSensor;
typedef enum
{
SysClkPartLoad_EMC = 0,
SysClkPartLoad_EMCCpu,
HocClkPartLoad_GPU,
HocClkPartLoad_CPUMax,
HocClkPartLoad_BAT,
HocClkPartLoad_FAN,
SysClkPartLoad_EnumMax
} SysClkPartLoad;
typedef enum {
HorizonOCSpeedo_CPU = 0,
HorizonOCSpeedo_GPU,
HorizonOCSpeedo_SOC,
HorizonOCSpeedo_EnumMax,
} HorizonOCSpeedo;
typedef enum {
GPUUVLevel_NoUV = 0,
GPUUVLevel_SLT,
GPUUVLevel_HiOPT,
GPUUVLevel_EnumMax,
} GPUUndervoltLevel;
enum {
DVFSMode_Disabled = 0,
DVFSMode_Hijack,
// DVFSMode_OfficialService,
// DVFSMode_Hack,
DVFSMode_EnumMax,
};
typedef enum {
GpuSchedulingMode_DoNotOverride = 0,
GpuSchedulingMode_Enabled,
GpuSchedulingMode_Disabled,
GpuSchedulingMode_EnumMax,
} GpuSchedulingMode;
typedef enum {
GpuSchedulingOverrideMethod_Ini = 0,
GpuSchedulingOverrideMethod_NvService,
GpuSchedulingOverrideMethod_EnumMax,
} GpuSchedulingOverrideMethod;
typedef enum {
ComponentGovernor_DoNotOverride = 0,
ComponentGovernor_Disabled = 1,
ComponentGovernor_Enabled = 2,
ComponentGovernor_EnumMax,
} ComponentGovernorState;
typedef enum {
RamDisplayMode_VDD2VDDQ = 0,
RamDisplayMode_VDD2Usage,
RamDisplayMode_VDDQUsage,
RamDisplayMode_EnumMax,
} RamDisplayMode;
#define SYSCLK_ENUM_VALID(n, v) ((v) < n##_EnumMax)
// Packed u32
// Bits 0-7 - CPU
// Bits 8-15 - GPU
// Bits 16-23 - VRR
// Bits 24-32 - unused
inline u32 GovernorStatePack(u8 cpu, u8 gpu, u8 vrr) {
return (u32)cpu | ((u32)gpu << 8) | ((u32)vrr << 16);
}
inline u8 GovernorStateCpu(u32 p) {
return (u8)(p & 0xFF);
}
inline u8 GovernorStateGpu(u32 p) {
return (u8)((p >> 8) & 0xFF);
}
inline u8 GovernorStateVrr(u32 p) {
return (u8)((p >> 16) & 0xFF);
}
static inline const char* sysclkFormatModule(SysClkModule module, bool pretty)
{
switch(module)
{
case SysClkModule_CPU:
return pretty ? "CPU" : "cpu";
case SysClkModule_GPU:
return pretty ? "GPU" : "gpu";
case SysClkModule_MEM:
return pretty ? "Memory" : "mem";
case HorizonOCModule_Display:
return pretty ? "Display" : "display";
case HorizonOCModule_Governor:
return pretty ? "Governor" : "governor";
default:
return "null";
}
}
static inline const char* sysclkFormatThermalSensor(SysClkThermalSensor thermSensor, bool pretty)
{
switch(thermSensor)
{
case SysClkThermalSensor_SOC:
return pretty ? "SOC" : "soc";
case SysClkThermalSensor_PCB:
return pretty ? "PCB" : "pcb";
case SysClkThermalSensor_Skin:
return pretty ? "Skin" : "skin";
case HorizonOCThermalSensor_Battery:
return pretty ? "BAT" : "battery";
case HorizonOCThermalSensor_PMIC:
return pretty ? "PMIC" : "pmic";
case HorizonOCThermalSensor_CPU:
return pretty ? "CPU" : "cpu";
case HorizonOCThermalSensor_GPU:
return pretty ? "GPU" : "gpu";
case HorizonOCThermalSensor_MEM:
return pretty ? "MEM" : "mem";
default:
return NULL;
}
}
static inline const char* sysclkFormatPowerSensor(SysClkPowerSensor powSensor, bool pretty)
{
switch(powSensor)
{
case SysClkPowerSensor_Now:
return pretty ? "Now" : "now";
case SysClkPowerSensor_Avg:
return pretty ? "Avg" : "avg";
default:
return NULL;
}
}
static inline const char* sysclkFormatProfile(SysClkProfile profile, bool pretty)
{
switch(profile)
{
case SysClkProfile_Docked:
return pretty ? "Docked" : "docked";
case SysClkProfile_Handheld:
return pretty ? "Handheld" : "handheld";
case SysClkProfile_HandheldCharging:
return pretty ? "Charging" : "handheld_charging";
case SysClkProfile_HandheldChargingUSB:
return pretty ? "USB Charger" : "handheld_charging_usb";
case SysClkProfile_HandheldChargingOfficial:
return pretty ? "PD Charger" : "handheld_charging_official";
default:
return NULL;
}
}
static inline const char* hocClkFormatVoltage(HocClkVoltage voltage, bool pretty)
{
switch(voltage)
{
case HocClkVoltage_CPU:
return pretty ? "CPU" : "cpu";
case HocClkVoltage_GPU:
return pretty ? "GPU" : "gpu";
case HocClkVoltage_EMCVDD2:
return pretty ? "VDD2" : "emcvdd2";
case HocClkVoltage_EMCVDDQ_MarikoOnly:
return pretty ? "VDDQ" : "vddq";
case HocClkVoltage_SOC:
return pretty ? "SOC" : "soc";
case HocClkVoltage_Display:
return pretty ? "Display" : "display";
default:
return NULL;
}
}

57
Source/hoc-clk/common/include/sysclk/client/ipc.h Normal file
View File

@@ -0,0 +1,57 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include "types.h"
#include "../config.h"
#include "../board.h"
#include "../ipc.h"
bool sysclkIpcRunning();
Result sysclkIpcInitialize(void);
void sysclkIpcExit(void);
Result sysclkIpcGetAPIVersion(u32* out_ver);
Result sysclkIpcGetVersionString(char* out, size_t len);
Result sysclkIpcGetCurrentContext(SysClkContext* out_context);
Result sysclkIpcGetProfileCount(u64 tid, u8* out_count);
Result sysclkIpcSetEnabled(bool enabled);
Result sysclkIpcExitCmd();
Result sysclkIpcSetOverride(SysClkModule module, u32 hz);
Result sysclkIpcGetProfiles(u64 tid, SysClkTitleProfileList* out_profiles);
Result sysclkIpcSetProfiles(u64 tid, SysClkTitleProfileList* profiles);
Result sysclkIpcGetConfigValues(SysClkConfigValueList* out_configValues);
Result sysclkIpcSetConfigValues(SysClkConfigValueList* configValues);
Result sysclkIpcGetFreqList(SysClkModule module, u32* list, u32 maxCount, u32* outCount);
Result hocClkIpcSetKipData();
Result hocClkIpcGetKipData();
static inline Result sysclkIpcRemoveOverride(SysClkModule module)
{
return sysclkIpcSetOverride(module, 0);
}

46
Source/hoc-clk/common/include/sysclk/client/types.h Normal file
View File

@@ -0,0 +1,46 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#ifdef __SWITCH__
#include <switch/types.h>
#include <switch/result.h>
#else
#define R_FAILED(res) ((res) != 0)
#define R_SUCCEEDED(res) ((res) == 0)
typedef std::uint32_t Result;
typedef std::uint32_t u32;
typedef std::int32_t s32;
typedef std::uint64_t u64;
typedef std::uint8_t u8;
#endif

73
Source/hoc-clk/common/include/sysclk/clock_manager.h Normal file
View File

@@ -0,0 +1,73 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include <stdint.h>
#include "board.h"
typedef struct
{
uint64_t applicationId;
SysClkProfile profile;
uint32_t freqs[SysClkModule_EnumMax];
uint32_t realFreqs[SysClkModule_EnumMax];
uint32_t overrideFreqs[SysClkModule_EnumMax];
uint32_t temps[SysClkThermalSensor_EnumMax];
int32_t power[SysClkPowerSensor_EnumMax];
uint32_t partLoad[SysClkPartLoad_EnumMax];
uint32_t voltages[HocClkVoltage_EnumMax];
u16 speedos[HorizonOCSpeedo_EnumMax];
u16 iddq[HorizonOCSpeedo_EnumMax];
u16 waferX;
u16 waferY;
// Misc stuff
GpuSchedulingMode gpuSchedulingMode;
bool isSysDockInstalled;
bool isSaltyNXInstalled;
bool isUsingRetroSuper;
u8 maxDisplayFreq;
u8 dramID;
bool isDram8GB;
// FPS / Resolution
u8 fps;
u16 resolutionHeight;
} SysClkContext;
typedef struct
{
union {
uint32_t mhz[+SysClkProfile_EnumMax * +SysClkModule_EnumMax];
uint32_t mhzMap[+SysClkProfile_EnumMax][+SysClkModule_EnumMax];
};
} SysClkTitleProfileList;
#define SYSCLK_FREQ_LIST_MAX 32
#define GLOBAL_PROFILE_ID 0xA111111111111111

594
Source/hoc-clk/common/include/sysclk/config.h Normal file
View File

@@ -0,0 +1,594 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include <stdint.h>
#include <stddef.h>
typedef enum {
SysClkConfigValue_PollingIntervalMs = 0,
SysClkConfigValue_TempLogIntervalMs,
SysClkConfigValue_FreqLogIntervalMs,
SysClkConfigValue_PowerLogIntervalMs,
SysClkConfigValue_CsvWriteIntervalMs,
HocClkConfigValue_UncappedClocks,
HocClkConfigValue_OverwriteBoostMode,
HocClkConfigValue_EristaMaxCpuClock,
HocClkConfigValue_MarikoMaxCpuClock,
HocClkConfigValue_ThermalThrottle,
HocClkConfigValue_ThermalThrottleThreshold,
HocClkConfigValue_HandheldTDP,
HocClkConfigValue_HandheldTDPLimit,
HocClkConfigValue_LiteTDPLimit,
HorizonOCConfigValue_BatteryChargeCurrent,
HorizonOCConfigValue_OverwriteRefreshRate,
HorizonOCConfigValue_MaxDisplayClockH,
HorizonOCConfigValue_DVFSMode,
HorizonOCConfigValue_DVFSOffset,
HorizonOCConfigValue_LiveCpuUv,
HorizonOCConfigValue_EnableExperimentalSettings,
HorizonOCConfigValue_GPUScheduling,
HorizonOCConfigValue_GPUSchedulingMethod,
HorizonOCConfigValue_RAMVoltUsageDisplayMode,
HorizonOCConfigValue_CpuGovernorMinimumFreq,
KipConfigValue_custRev,
// KipConfigValue_mtcConf,
KipConfigValue_hpMode,
KipConfigValue_commonEmcMemVolt,
KipConfigValue_eristaEmcMaxClock,
KipConfigValue_eristaEmcMaxClock1,
KipConfigValue_eristaEmcMaxClock2,
KipConfigValue_marikoEmcMaxClock,
KipConfigValue_marikoEmcVddqVolt,
KipConfigValue_emcDvbShift,
KipConfigValue_t1_tRCD,
KipConfigValue_t2_tRP,
KipConfigValue_t3_tRAS,
KipConfigValue_t4_tRRD,
KipConfigValue_t5_tRFC,
KipConfigValue_t6_tRTW,
KipConfigValue_t7_tWTR,
KipConfigValue_t8_tREFI,
KipConfigValue_mem_burst_read_latency,
KipConfigValue_mem_burst_write_latency,
KipConfigValue_eristaCpuUV,
KipConfigValue_eristaCpuVmin,
KipConfigValue_eristaCpuMaxVolt,
KipConfigValue_eristaCpuUnlock,
KipConfigValue_marikoCpuUVLow,
KipConfigValue_marikoCpuUVHigh,
KipConfigValue_tableConf,
KipConfigValue_marikoCpuLowVmin,
KipConfigValue_marikoCpuHighVmin,
KipConfigValue_marikoCpuMaxVolt,
KipConfigValue_marikoCpuMaxClock,
KipConfigValue_eristaCpuBoostClock,
KipConfigValue_marikoCpuBoostClock,
KipConfigValue_eristaGpuUV,
KipConfigValue_eristaGpuVmin,
KipConfigValue_marikoGpuUV,
KipConfigValue_marikoGpuVmin,
KipConfigValue_marikoGpuVmax,
KipConfigValue_commonGpuVoltOffset,
KipConfigValue_gpuSpeedo,
KipConfigValue_g_volt_76800,
KipConfigValue_g_volt_153600,
KipConfigValue_g_volt_230400,
KipConfigValue_g_volt_307200,
KipConfigValue_g_volt_384000,
KipConfigValue_g_volt_460800,
KipConfigValue_g_volt_537600,
KipConfigValue_g_volt_614400,
KipConfigValue_g_volt_691200,
KipConfigValue_g_volt_768000,
KipConfigValue_g_volt_844800,
KipConfigValue_g_volt_921600,
KipConfigValue_g_volt_998400,
KipConfigValue_g_volt_1075200,
KipConfigValue_g_volt_1152000,
KipConfigValue_g_volt_1228800,
KipConfigValue_g_volt_1267200,
KipConfigValue_g_volt_1305600,
KipConfigValue_g_volt_1344000,
KipConfigValue_g_volt_1382400,
KipConfigValue_g_volt_1420800,
KipConfigValue_g_volt_1459200,
KipConfigValue_g_volt_1497600,
KipConfigValue_g_volt_1536000,
KipConfigValue_g_volt_e_76800,
KipConfigValue_g_volt_e_115200,
KipConfigValue_g_volt_e_153600,
KipConfigValue_g_volt_e_192000,
KipConfigValue_g_volt_e_230400,
KipConfigValue_g_volt_e_268800,
KipConfigValue_g_volt_e_307200,
KipConfigValue_g_volt_e_345600,
KipConfigValue_g_volt_e_384000,
KipConfigValue_g_volt_e_422400,
KipConfigValue_g_volt_e_460800,
KipConfigValue_g_volt_e_499200,
KipConfigValue_g_volt_e_537600,
KipConfigValue_g_volt_e_576000,
KipConfigValue_g_volt_e_614400,
KipConfigValue_g_volt_e_652800,
KipConfigValue_g_volt_e_691200,
KipConfigValue_g_volt_e_729600,
KipConfigValue_g_volt_e_768000,
KipConfigValue_g_volt_e_806400,
KipConfigValue_g_volt_e_844800,
KipConfigValue_g_volt_e_883200,
KipConfigValue_g_volt_e_921600,
KipConfigValue_g_volt_e_960000,
KipConfigValue_g_volt_e_998400,
KipConfigValue_g_volt_e_1036800,
KipConfigValue_g_volt_e_1075200,
KipConfigValue_t6_tRTW_fine_tune,
KipConfigValue_t7_tWTR_fine_tune,
KipCrc32,
HocClkConfigValue_IsFirstLoad,
SysClkConfigValue_EnumMax,
} SysClkConfigValue;
typedef struct {
uint64_t values[SysClkConfigValue_EnumMax];
} SysClkConfigValueList;
static inline const char* sysclkFormatConfigValue(SysClkConfigValue val, bool pretty)
{
switch(val)
{
case SysClkConfigValue_PollingIntervalMs:
return pretty ? "Polling Interval (ms)" : "poll_interval_ms";
case SysClkConfigValue_TempLogIntervalMs:
return pretty ? "Temperature logging interval (ms)" : "temp_log_interval_ms";
case SysClkConfigValue_FreqLogIntervalMs:
return pretty ? "Frequency logging interval (ms)" : "freq_log_interval_ms";
case SysClkConfigValue_PowerLogIntervalMs:
return pretty ? "Power logging interval (ms)" : "power_log_interval_ms";
case SysClkConfigValue_CsvWriteIntervalMs:
return pretty ? "CSV write interval (ms)" : "csv_write_interval_ms";
case HocClkConfigValue_UncappedClocks:
return pretty ? "Uncapped Clocks" : "uncapped_clocks";
case HocClkConfigValue_OverwriteBoostMode:
return pretty ? "Overwrite Boost Mode" : "ow_boost";
case HocClkConfigValue_EristaMaxCpuClock:
return pretty ? "CPU Max Clock" : "cpu_max_e";
case HocClkConfigValue_MarikoMaxCpuClock:
return pretty ? "CPU Max Display Clock" : "cpu_max_m";
case HocClkConfigValue_ThermalThrottle:
return pretty ? "Thermal Throttle" : "thermal_throttle";
case HocClkConfigValue_ThermalThrottleThreshold:
return pretty ? "Thermal Throttle Threshold" : "thermal_throttle_threshold";
case HocClkConfigValue_HandheldTDP:
return pretty ? "Handheld TDP" : "handheld_tdp";
case HocClkConfigValue_HandheldTDPLimit:
return pretty ? "Handheld TDP Limit" : "tdp_limit";
case HocClkConfigValue_LiteTDPLimit:
return pretty ? "Handheld TDP Limit" : "tdp_limit_l";
case HorizonOCConfigValue_BatteryChargeCurrent:
return pretty ? "Battery Charge Current" : "bat_charge_current";
case HorizonOCConfigValue_OverwriteRefreshRate:
return pretty ? "Display Refresh Rate Changing" : "drr_changing";
case HorizonOCConfigValue_MaxDisplayClockH:
return pretty ? "Max Display Clock (Handheld)" : "drr_max_clock";
case HorizonOCConfigValue_DVFSMode:
return pretty ? "DVFS Mode" : "dvfs_mode";
case HorizonOCConfigValue_DVFSOffset:
return pretty ? "DVFS Offset" : "dvfs_offset";
case HorizonOCConfigValue_GPUScheduling:
return pretty ? "GPU Scheduling" : "gpu_scheduling";
case HorizonOCConfigValue_GPUSchedulingMethod:
return pretty ? "GPU Scheduling Method" : "gpu_sched_method";
case HorizonOCConfigValue_LiveCpuUv:
return pretty ? "Live CPU Undervolt" : "live_cpu_uv";
case HorizonOCConfigValue_EnableExperimentalSettings:
return pretty ? "Enable Experimental Settings" : "enable_experimental_settings";
case HorizonOCConfigValue_RAMVoltUsageDisplayMode:
return pretty ? "RAM Voltage / Usage Display Mode" : "ram_volt_usage_display_mode";
case HorizonOCConfigValue_CpuGovernorMinimumFreq:
return pretty ? "CPU Governor Minimum Frequency" : "cpu_gov_min_freq";
// KIP config values
case KipConfigValue_custRev:
return pretty ? "Custom Revision" : "kip_cust_rev";
// case KipConfigValue_mtcConf:
// return pretty ? "MTC Config" : "kip_mtc_conf";
case KipConfigValue_hpMode:
return pretty ? "HP Mode" : "kip_hp_mode";
// EMC
case KipConfigValue_commonEmcMemVolt:
return pretty ? "Common EMC/MEM Voltage" : "common_emc_mem_volt";
case KipConfigValue_eristaEmcMaxClock:
return pretty ? "Erista EMC Max Clock 1" : "erista_emc_max_clock";
case KipConfigValue_eristaEmcMaxClock1:
return pretty ? "Erista EMC Max Clock 2" : "erista_emc_max_clock1";
case KipConfigValue_eristaEmcMaxClock2:
return pretty ? "Erista EMC Max Clock 3" : "erista_emc_max_clock2";
case KipConfigValue_marikoEmcMaxClock:
return pretty ? "Mariko EMC Max Clock" : "mariko_emc_max_clock";
case KipConfigValue_marikoEmcVddqVolt:
return pretty ? "Mariko EMC VDDQ Voltage" : "mariko_emc_vddq_volt";
case KipConfigValue_emcDvbShift:
return pretty ? "EMC DVB Shift" : "emc_dvb_shift";
// Memory timings
case KipConfigValue_t1_tRCD:
return pretty ? "t1 - tRCD" : "t1_trcd";
case KipConfigValue_t2_tRP:
return pretty ? "t2 - tRP" : "t2_trp";
case KipConfigValue_t3_tRAS:
return pretty ? "t3 - tRAS" : "t3_tras";
case KipConfigValue_t4_tRRD:
return pretty ? "t4 - tRRD" : "t4_trrd";
case KipConfigValue_t5_tRFC:
return pretty ? "t5 - tRFC" : "t5_trfc";
case KipConfigValue_t6_tRTW:
return pretty ? "t6 - tRTW" : "t6_trtw";
case KipConfigValue_t7_tWTR:
return pretty ? "t7 - tWTR" : "t7_twtr";
case KipConfigValue_t8_tREFI:
return pretty ? "t8 - tREFI" : "t8_trefi";
case KipConfigValue_mem_burst_read_latency:
return pretty ? "Memory Burst Read Latency" : "mem_burst_read_latency";
case KipConfigValue_mem_burst_write_latency:
return pretty ? "Memory Burst Write Latency" : "mem_burst_write_latency";
// CPU – Erista
case KipConfigValue_eristaCpuUV:
return pretty ? "Erista CPU Undervolt" : "erista_cpu_uv";
case KipConfigValue_eristaCpuVmin:
return pretty ? "Erista CPU vMin" : "erista_cpu_vmin";
case KipConfigValue_eristaCpuMaxVolt:
return pretty ? "Erista CPU Max Voltage" : "erista_cpu_max_volt";
case KipConfigValue_eristaCpuUnlock:
return pretty ? "Erista CPU Unlock" : "erista_cpu_unlock";
// CPU – Mariko
case KipConfigValue_marikoCpuUVLow:
return pretty ? "Mariko CPU Undervolt (Low)" : "mariko_cpu_uv_low";
case KipConfigValue_marikoCpuUVHigh:
return pretty ? "Mariko CPU Undervolt (High)" : "mariko_cpu_uv_high";
case KipConfigValue_tableConf:
return pretty ? "Table Config" : "kip_table_conf";
case KipConfigValue_marikoCpuLowVmin:
return pretty ? "Mariko CPU Low Vmin" : "mariko_cpu_low_vmin";
case KipConfigValue_marikoCpuHighVmin:
return pretty ? "Mariko CPU High Vmin" : "mariko_cpu_high_vmin";
case KipConfigValue_marikoCpuMaxVolt:
return pretty ? "Mariko CPU Max Voltage" : "mariko_cpu_max_volt";
case KipConfigValue_eristaCpuBoostClock:
return pretty ? "Erista CPU Boost Clock" : "erista_cpu_boost_clock";
case KipConfigValue_marikoCpuBoostClock:
return pretty ? "Mariko CPU Boost Clock" : "mariko_cpu_boost_clock";
case KipConfigValue_marikoCpuMaxClock:
return pretty ? "Mariko CPU Max Clock" : "mariko_cpu_max_clock";
// GPU – Erista
case KipConfigValue_eristaGpuUV:
return pretty ? "Erista GPU Undervolt" : "erista_gpu_uv";
case KipConfigValue_eristaGpuVmin:
return pretty ? "Erista GPU Vmin" : "erista_gpu_vmin";
// GPU – Mariko
case KipConfigValue_marikoGpuUV:
return pretty ? "Mariko GPU Undervolt" : "mariko_gpu_uv";
case KipConfigValue_marikoGpuVmin:
return pretty ? "Mariko GPU Vmin" : "mariko_gpu_vmin";
case KipConfigValue_marikoGpuVmax:
return pretty ? "Mariko GPU Vmax" : "mariko_gpu_vmax";
case KipConfigValue_commonGpuVoltOffset:
return pretty ? "Common GPU Voltage Offset" : "common_gpu_volt_offset";
case KipConfigValue_gpuSpeedo:
return pretty ? "GPU Speedo" : "gpu_speedo";
// Mariko GPU voltages (24)
case KipConfigValue_g_volt_76800: return pretty ? "Mariko GPU Volt 76 MHz" : "g_volt_76800";
case KipConfigValue_g_volt_153600: return pretty ? "Mariko GPU Volt 153 MHz" : "g_volt_153600";
case KipConfigValue_g_volt_230400: return pretty ? "Mariko GPU Volt 230 MHz" : "g_volt_230400";
case KipConfigValue_g_volt_307200: return pretty ? "Mariko GPU Volt 307 MHz" : "g_volt_307200";
case KipConfigValue_g_volt_384000: return pretty ? "Mariko GPU Volt 384 MHz" : "g_volt_384000";
case KipConfigValue_g_volt_460800: return pretty ? "Mariko GPU Volt 460 MHz" : "g_volt_460800";
case KipConfigValue_g_volt_537600: return pretty ? "Mariko GPU Volt 537 MHz" : "g_volt_537600";
case KipConfigValue_g_volt_614400: return pretty ? "Mariko GPU Volt 614 MHz" : "g_volt_614400";
case KipConfigValue_g_volt_691200: return pretty ? "Mariko GPU Volt 691 MHz" : "g_volt_691200";
case KipConfigValue_g_volt_768000: return pretty ? "Mariko GPU Volt 768 MHz" : "g_volt_768000";
case KipConfigValue_g_volt_844800: return pretty ? "Mariko GPU Volt 844 MHz" : "g_volt_844800";
case KipConfigValue_g_volt_921600: return pretty ? "Mariko GPU Volt 921 MHz" : "g_volt_921600";
case KipConfigValue_g_volt_998400: return pretty ? "Mariko GPU Volt 998 MHz" : "g_volt_998400";
case KipConfigValue_g_volt_1075200: return pretty ? "Mariko GPU Volt 1075 MHz" : "g_volt_1075200";
case KipConfigValue_g_volt_1152000: return pretty ? "Mariko GPU Volt 1152 MHz" : "g_volt_1152000";
case KipConfigValue_g_volt_1228800: return pretty ? "Mariko GPU Volt 1228 MHz" : "g_volt_1228800";
case KipConfigValue_g_volt_1267200: return pretty ? "Mariko GPU Volt 1267 MHz" : "g_volt_1267200";
case KipConfigValue_g_volt_1305600: return pretty ? "Mariko GPU Volt 1305 MHz" : "g_volt_1305600";
case KipConfigValue_g_volt_1344000: return pretty ? "Mariko GPU Volt 1344 MHz" : "g_volt_1344000";
case KipConfigValue_g_volt_1382400: return pretty ? "Mariko GPU Volt 1382 MHz" : "g_volt_1382400";
case KipConfigValue_g_volt_1420800: return pretty ? "Mariko GPU Volt 1420 MHz" : "g_volt_1420800";
case KipConfigValue_g_volt_1459200: return pretty ? "Mariko GPU Volt 1459 MHz" : "g_volt_1459200";
case KipConfigValue_g_volt_1497600: return pretty ? "Mariko GPU Volt 1497 MHz" : "g_volt_1497600";
case KipConfigValue_g_volt_1536000: return pretty ? "Mariko GPU Volt 1536 MHz" : "g_volt_1536000";
// Erista GPU voltages (27)
case KipConfigValue_g_volt_e_76800: return pretty ? "Erista GPU Volt 76 MHz" : "g_volt_e_76800";
case KipConfigValue_g_volt_e_115200: return pretty ? "Erista GPU Volt 115 MHz" : "g_volt_e_115200";
case KipConfigValue_g_volt_e_153600: return pretty ? "Erista GPU Volt 153 MHz" : "g_volt_e_153600";
case KipConfigValue_g_volt_e_192000: return pretty ? "Erista GPU Volt 192 MHz" : "g_volt_e_192000";
case KipConfigValue_g_volt_e_230400: return pretty ? "Erista GPU Volt 230 MHz" : "g_volt_e_230400";
case KipConfigValue_g_volt_e_268800: return pretty ? "Erista GPU Volt 268 MHz" : "g_volt_e_268800";
case KipConfigValue_g_volt_e_307200: return pretty ? "Erista GPU Volt 307 MHz" : "g_volt_e_307200";
case KipConfigValue_g_volt_e_345600: return pretty ? "Erista GPU Volt 345 MHz" : "g_volt_e_345600";
case KipConfigValue_g_volt_e_384000: return pretty ? "Erista GPU Volt 384 MHz" : "g_volt_e_384000";
case KipConfigValue_g_volt_e_422400: return pretty ? "Erista GPU Volt 422 MHz" : "g_volt_e_422400";
case KipConfigValue_g_volt_e_460800: return pretty ? "Erista GPU Volt 460 MHz" : "g_volt_e_460800";
case KipConfigValue_g_volt_e_499200: return pretty ? "Erista GPU Volt 499 MHz" : "g_volt_e_499200";
case KipConfigValue_g_volt_e_537600: return pretty ? "Erista GPU Volt 537 MHz" : "g_volt_e_537600";
case KipConfigValue_g_volt_e_576000: return pretty ? "Erista GPU Volt 576 MHz" : "g_volt_e_576000";
case KipConfigValue_g_volt_e_614400: return pretty ? "Erista GPU Volt 614 MHz" : "g_volt_e_614400";
case KipConfigValue_g_volt_e_652800: return pretty ? "Erista GPU Volt 652 MHz" : "g_volt_e_652800";
case KipConfigValue_g_volt_e_691200: return pretty ? "Erista GPU Volt 691 MHz" : "g_volt_e_691200";
case KipConfigValue_g_volt_e_729600: return pretty ? "Erista GPU Volt 729 MHz" : "g_volt_e_729600";
case KipConfigValue_g_volt_e_768000: return pretty ? "Erista GPU Volt 768 MHz" : "g_volt_e_768000";
case KipConfigValue_g_volt_e_806400: return pretty ? "Erista GPU Volt 806 MHz" : "g_volt_e_806400";
case KipConfigValue_g_volt_e_844800: return pretty ? "Erista GPU Volt 844 MHz" : "g_volt_e_844800";
case KipConfigValue_g_volt_e_883200: return pretty ? "Erista GPU Volt 883 MHz" : "g_volt_e_883200";
case KipConfigValue_g_volt_e_921600: return pretty ? "Erista GPU Volt 921 MHz" : "g_volt_e_921600";
case KipConfigValue_g_volt_e_960000: return pretty ? "Erista GPU Volt 960 MHz" : "g_volt_e_960000";
case KipConfigValue_g_volt_e_998400: return pretty ? "Erista GPU Volt 998 MHz" : "g_volt_e_998400";
case KipConfigValue_g_volt_e_1036800: return pretty ? "Erista GPU Volt 1036 MHz" : "g_volt_e_1036800";
case KipConfigValue_g_volt_e_1075200: return pretty ? "Erista GPU Volt 1075 MHz" : "g_volt_e_1075200";
case KipConfigValue_t6_tRTW_fine_tune: return pretty ? "t6 - tRTW Fine Tune" : "t6_tRTW_fine_fune";
case KipConfigValue_t7_tWTR_fine_tune: return pretty ? "t7 - tWTR Fine Tune" : "t7_tWTR_fine_tune";
case KipCrc32:
return pretty ? "CRC32" : "crc32";
case HocClkConfigValue_IsFirstLoad:
return pretty ? "Is First Load" : "is_first_load";
default:
return pretty ? "[cfg] no enum format string" : "err_no_format_string";
}
}
static inline uint64_t sysclkDefaultConfigValue(SysClkConfigValue val)
{
switch(val)
{
case SysClkConfigValue_PollingIntervalMs:
return 300ULL;
case SysClkConfigValue_TempLogIntervalMs:
case SysClkConfigValue_FreqLogIntervalMs:
case SysClkConfigValue_PowerLogIntervalMs:
case SysClkConfigValue_CsvWriteIntervalMs:
case HocClkConfigValue_UncappedClocks:
case HocClkConfigValue_OverwriteBoostMode:
case HorizonOCConfigValue_BatteryChargeCurrent:
case HorizonOCConfigValue_OverwriteRefreshRate:
case HorizonOCConfigValue_GPUScheduling:
case HorizonOCConfigValue_LiveCpuUv:
case HorizonOCConfigValue_GPUSchedulingMethod:
return 0ULL;
case HocClkConfigValue_EristaMaxCpuClock:
return 1785ULL;
case HocClkConfigValue_MarikoMaxCpuClock:
return 1963ULL;
case HocClkConfigValue_ThermalThrottle:
case HocClkConfigValue_HandheldTDP:
case HocClkConfigValue_IsFirstLoad:
case HorizonOCConfigValue_DVFSMode:
return 1ULL;
case HocClkConfigValue_ThermalThrottleThreshold:
return 70ULL;
case HocClkConfigValue_HandheldTDPLimit:
return 9600ULL; // 8600mW will trigger on erista stock, so raise it a bit
case HocClkConfigValue_LiteTDPLimit:
return 6400ULL; // 0.5C
case HorizonOCConfigValue_CpuGovernorMinimumFreq:
return 612000000ULL; // 612MHz
case HorizonOCConfigValue_MaxDisplayClockH:
return 60ULL;
default:
return 0ULL;
}
}
static inline uint64_t sysclkValidConfigValue(SysClkConfigValue val, uint64_t input)
{
switch(val)
{
case HocClkConfigValue_EristaMaxCpuClock:
case HocClkConfigValue_MarikoMaxCpuClock:
case HocClkConfigValue_ThermalThrottleThreshold:
case HocClkConfigValue_HandheldTDPLimit:
case HocClkConfigValue_LiteTDPLimit:
case SysClkConfigValue_PollingIntervalMs:
case HorizonOCConfigValue_MaxDisplayClockH:
return input > 0;
case SysClkConfigValue_TempLogIntervalMs:
case SysClkConfigValue_FreqLogIntervalMs:
case SysClkConfigValue_PowerLogIntervalMs:
case SysClkConfigValue_CsvWriteIntervalMs:
case HocClkConfigValue_UncappedClocks:
case HocClkConfigValue_OverwriteBoostMode:
case HocClkConfigValue_ThermalThrottle:
case HocClkConfigValue_HandheldTDP:
case HorizonOCConfigValue_OverwriteRefreshRate:
case HocClkConfigValue_IsFirstLoad:
case HorizonOCConfigValue_EnableExperimentalSettings:
case HorizonOCConfigValue_LiveCpuUv:
case HorizonOCConfigValue_GPUSchedulingMethod:
return (input & 0x1) == input;
case KipConfigValue_custRev:
// case KipConfigValue_mtcConf:
case KipConfigValue_hpMode:
case KipConfigValue_commonEmcMemVolt:
case KipConfigValue_eristaEmcMaxClock:
case KipConfigValue_eristaEmcMaxClock1:
case KipConfigValue_eristaEmcMaxClock2:
case KipConfigValue_marikoEmcMaxClock:
case KipConfigValue_marikoEmcVddqVolt:
case KipConfigValue_emcDvbShift:
case KipConfigValue_t1_tRCD:
case KipConfigValue_t2_tRP:
case KipConfigValue_t3_tRAS:
case KipConfigValue_t4_tRRD:
case KipConfigValue_t5_tRFC:
case KipConfigValue_t6_tRTW:
case KipConfigValue_t7_tWTR:
case KipConfigValue_t8_tREFI:
case KipConfigValue_mem_burst_read_latency:
case KipConfigValue_mem_burst_write_latency:
case KipConfigValue_eristaCpuUV:
case KipConfigValue_eristaCpuMaxVolt:
case KipConfigValue_marikoCpuUVLow:
case KipConfigValue_marikoCpuUVHigh:
case KipConfigValue_tableConf:
case KipConfigValue_marikoCpuLowVmin:
case KipConfigValue_marikoCpuHighVmin:
case KipConfigValue_marikoCpuMaxVolt:
case KipConfigValue_eristaCpuBoostClock:
case KipConfigValue_marikoCpuBoostClock:
case KipConfigValue_marikoCpuMaxClock:
case KipConfigValue_eristaGpuUV:
case KipConfigValue_eristaGpuVmin:
case KipConfigValue_marikoGpuUV:
case KipConfigValue_marikoGpuVmin:
case KipConfigValue_marikoGpuVmax:
case KipConfigValue_commonGpuVoltOffset:
case KipConfigValue_gpuSpeedo:
case KipConfigValue_g_volt_76800:
case KipConfigValue_g_volt_153600:
case KipConfigValue_g_volt_230400:
case KipConfigValue_g_volt_307200:
case KipConfigValue_g_volt_384000:
case KipConfigValue_g_volt_460800:
case KipConfigValue_g_volt_537600:
case KipConfigValue_g_volt_614400:
case KipConfigValue_g_volt_691200:
case KipConfigValue_g_volt_768000:
case KipConfigValue_g_volt_844800:
case KipConfigValue_g_volt_921600:
case KipConfigValue_g_volt_998400:
case KipConfigValue_g_volt_1075200:
case KipConfigValue_g_volt_1152000:
case KipConfigValue_g_volt_1228800:
case KipConfigValue_g_volt_1267200:
case KipConfigValue_g_volt_1305600:
case KipConfigValue_g_volt_1344000:
case KipConfigValue_g_volt_1382400:
case KipConfigValue_g_volt_1420800:
case KipConfigValue_g_volt_1459200:
case KipConfigValue_g_volt_1497600:
case KipConfigValue_g_volt_1536000:
case KipConfigValue_g_volt_e_76800:
case KipConfigValue_g_volt_e_115200:
case KipConfigValue_g_volt_e_153600:
case KipConfigValue_g_volt_e_192000:
case KipConfigValue_g_volt_e_230400:
case KipConfigValue_g_volt_e_268800:
case KipConfigValue_g_volt_e_307200:
case KipConfigValue_g_volt_e_345600:
case KipConfigValue_g_volt_e_384000:
case KipConfigValue_g_volt_e_422400:
case KipConfigValue_g_volt_e_460800:
case KipConfigValue_g_volt_e_499200:
case KipConfigValue_g_volt_e_537600:
case KipConfigValue_g_volt_e_576000:
case KipConfigValue_g_volt_e_614400:
case KipConfigValue_g_volt_e_652800:
case KipConfigValue_g_volt_e_691200:
case KipConfigValue_g_volt_e_729600:
case KipConfigValue_g_volt_e_768000:
case KipConfigValue_g_volt_e_806400:
case KipConfigValue_g_volt_e_844800:
case KipConfigValue_g_volt_e_883200:
case KipConfigValue_g_volt_e_921600:
case KipConfigValue_g_volt_e_960000:
case KipConfigValue_g_volt_e_998400:
case KipConfigValue_g_volt_e_1036800:
case KipConfigValue_g_volt_e_1075200:
case KipConfigValue_eristaCpuVmin:
case KipConfigValue_eristaCpuUnlock:
case KipConfigValue_t6_tRTW_fine_tune:
case KipConfigValue_t7_tWTR_fine_tune:
case KipCrc32:
case HorizonOCConfigValue_DVFSMode:
case HorizonOCConfigValue_DVFSOffset:
case HorizonOCConfigValue_GPUScheduling:
case HorizonOCConfigValue_RAMVoltUsageDisplayMode:
case HorizonOCConfigValue_CpuGovernorMinimumFreq:
return true;
case HorizonOCConfigValue_BatteryChargeCurrent:
return ((input >= 1024) && (input <= 3072)) || !input;
default:
return false;
}
}

39
Source/hoc-clk/common/include/sysclk/errors.h Normal file
View File

@@ -0,0 +1,39 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#define SYSCLK_ERROR_MODULE 388
#define SYSCLK_ERROR(desc) ((SYSCLK_ERROR_MODULE & 0x1FF) | (SysClkError_##desc & 0x1FFF)<<9)
typedef enum
{
SysClkError_Generic = 0,
SysClkError_ConfigNotLoaded = 1,
SysClkError_ConfigSaveFailed = 2,
// HocClkError_SocThermFail = 3,
} SysClkError;

72
Source/hoc-clk/common/include/sysclk/ipc.h Normal file
View File

@@ -0,0 +1,72 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
/* --------------------------------------------------------------------------
* "THE BEER-WARE LICENSE" (Revision 42):
* <p-sam@d3vs.net>, <natinusala@gmail.com>, <m4x@m4xw.net>
* wrote this file. As long as you retain this notice you can do whatever you
* want with this stuff. If you meet any of us some day, and you think this
* stuff is worth it, you can buy us a beer in return. - The sys-clk authors
* --------------------------------------------------------------------------
*/
#pragma once
#include <stdint.h>
#include "board.h"
#include "clock_manager.h"
#define SYSCLK_IPC_API_VERSION 1
#define SYSCLK_IPC_SERVICE_NAME "hoc:clk"
enum SysClkIpcCmd
{
SysClkIpcCmd_GetApiVersion = 0,
SysClkIpcCmd_GetVersionString = 1,
SysClkIpcCmd_GetCurrentContext = 2,
SysClkIpcCmd_Exit = 3,
SysClkIpcCmd_GetProfileCount = 4,
SysClkIpcCmd_GetProfiles = 5,
SysClkIpcCmd_SetProfiles = 6,
SysClkIpcCmd_SetEnabled = 7,
SysClkIpcCmd_SetOverride = 8,
SysClkIpcCmd_GetConfigValues = 9,
SysClkIpcCmd_SetConfigValues = 10,
SysClkIpcCmd_GetFreqList = 11,
HocClkIpcCmd_SetKipData = 12,
HocClkIpcCmd_GetKipData = 13,
};
typedef struct
{
uint64_t tid;
SysClkTitleProfileList profiles;
} SysClkIpc_SetProfiles_Args;
typedef struct
{
SysClkModule module;
uint32_t hz;
} SysClkIpc_SetOverride_Args;
typedef struct
{
SysClkModule module;
uint32_t maxCount;
} SysClkIpc_GetFreqList_Args;

94
Source/hoc-clk/common/include/sysclk/psm_ext.h Normal file
View File

@@ -0,0 +1,94 @@
/*
* Copyright (c) KazushiMe
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#pragma once
#include <switch.h>
typedef enum {
PsmPDC_NewPDO = 1, //Received new Power Data Object
PsmPDC_NoPD = 2, //No Power Delivery source is detected
PsmPDC_AcceptedRDO = 3 //Received and accepted Request Data Object
} PsmChargeInfoPDC; //BM92T series
typedef enum {
PsmPowerRole_Sink = 1,
PsmPowerRole_Source = 2
} PsmPowerRole;
const char* PsmPowerRoleToStr(PsmPowerRole role);
typedef enum {
PsmInfoChargerType_None = 0,
PsmInfoChargerType_PD = 1,
PsmInfoChargerType_TypeC_1500mA = 2,
PsmInfoChargerType_TypeC_3000mA = 3,
PsmInfoChargerType_DCP = 4,
PsmInfoChargerType_CDP = 5,
PsmInfoChargerType_SDP = 6,
PsmInfoChargerType_Apple_500mA = 7,
PsmInfoChargerType_Apple_1000mA = 8,
PsmInfoChargerType_Apple_2000mA = 9
} PsmInfoChargerType;
const char* PsmInfoChargerTypeToStr(PsmInfoChargerType type);
typedef enum {
PsmFlags_NoHub = BIT(0), //If hub is disconnected
PsmFlags_Rail = BIT(8), //At least one Joy-con is charging from rail
PsmFlags_SPDSRC = BIT(12), //OTG
PsmFlags_ACC = BIT(16) //Accessory
} PsmChargeInfoFlags;
typedef struct {
int32_t InputCurrentLimit; //Input (Sink) current limit in mA
int32_t VBUSCurrentLimit; //Output (Source/VBUS/OTG) current limit in mA
int32_t ChargeCurrentLimit; //Battery charging current limit in mA (512mA when Docked, 768mA when BatteryTemperature < 17.0 C)
int32_t ChargeVoltageLimit; //Battery charging voltage limit in mV (3952mV when BatteryTemperature >= 51.0 C)
int32_t unk_x10; //Possibly an emum, getting the same value as PowerRole in all tested cases
int32_t unk_x14; //Possibly flags
PsmChargeInfoPDC PDCState; //Power Delivery Controller State
int32_t BatteryTemperature; //Battery temperature in milli C
int32_t RawBatteryCharge; //Raw battery charged capacity per cent-mille (i.e. 100% = 100000 pcm)
int32_t VoltageAvg; //Voltage avg in mV (more in Notes)
int32_t BatteryAge; //Battery age (capacity full / capacity design) per cent-mille (i.e. 100% = 100000 pcm)
PsmPowerRole PowerRole;
PsmInfoChargerType ChargerType;
int32_t ChargerVoltageLimit; //Charger and external device voltage limit in mV
int32_t ChargerCurrentLimit; //Charger and external device current limit in mA
PsmChargeInfoFlags Flags; //Unknown flags
} PsmChargeInfo;
typedef enum {
Psm_EnableBatteryCharging = 2,
Psm_DisableBatteryCharging = 3,
Psm_EnableFastBatteryCharging = 10,
Psm_DisableFastBatteryCharging = 11,
Psm_GetBatteryChargeInfoFields = 17,
} IPsmServerCmd;
bool PsmIsChargerConnected(const PsmChargeInfo* info);
bool PsmIsCharging(const PsmChargeInfo* info);
typedef enum {
PsmBatteryState_Discharging,
PsmBatteryState_ChargingPaused,
PsmBatteryState_FastCharging
} PsmBatteryState;
PsmBatteryState PsmGetBatteryState(const PsmChargeInfo* info);
const char* PsmGetBatteryStateIcon(const PsmChargeInfo* info);