GPU Max frequency is now 1497.6MHz; RAM clocks could be set in sys-clk-OC (1331 and Max); DRAM manu as suffixes in loader.kip file names for references; README
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@@ -197,11 +197,11 @@ namespace ams::ldr {
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ADJUST_PROPORTIONAL(TARGET_TABLE, REF_TABLE, shadow_regs_ca_train.PARAM) \
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ADJUST_PROPORTIONAL(TARGET_TABLE, REF_TABLE, shadow_regs_rdwr_train.PARAM)
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/* Calculate DIVM and DIVN */
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/* Calculate DIVM and DIVN (clock DIVisors) */
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/* Assume oscillator (PLLMB_IN) is 38.4 MHz */
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/* PLLMB_OUT = PLLMB_IN / DIVM * DIVN */
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u32 divn = GetEmcClock() / 38400;
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u32 divm = 1;
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u32 divn = GetEmcClock() / 38400;
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if (GetEmcClock() - divn * 38400 >= 38400 / 2) {
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divm = 2;
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divn = divn * 2 + 1;
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@@ -212,7 +212,7 @@ namespace ams::ldr {
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pcv::MarikoMtcTable* mtc_table_1600 = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[j]);
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pcv::MarikoMtcTable* mtc_table_1331 = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[j] - pcv::MtcTableOffset);
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/* Normal and reasonable values */
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/* Patch parameters that seem like timings */
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rc);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rfc);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rfcpb);
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@@ -280,6 +280,7 @@ namespace ams::ldr {
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, min_mrs_wait);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, latency);
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/* Patch clock divisors */
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mtc_table_1600->pllmb_divm = divm;
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mtc_table_1600->pllmb_divn = divn;
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}
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@@ -288,16 +289,16 @@ namespace ams::ldr {
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}
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}
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EmcClock = GetEmcClock() * 1000;
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// u32 PtmEmcClock = GetEmcClock() * 1000;
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u32 CpuBoostClock = GetCpuBoostClock() * 1000;
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for (u32 i = 0; i < sizeof(PtmModuleId)/sizeof(ro::ModuleId); i++) {
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if (std::memcmp(std::addressof(PtmModuleId[i]), std::addressof(module_id), sizeof(module_id)) == 0) {
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for (u32 j = 0; j < 16; j++) {
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &EmcClock, sizeof(EmcClock));
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &EmcClock, sizeof(EmcClock));
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}
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// for (u32 j = 0; j < 16; j++) {
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// std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &PtmEmcClock, sizeof(PtmEmcClock));
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// std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &PtmEmcClock, sizeof(PtmEmcClock));
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// }
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for (u32 j = 0; j < 2; j++) {
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::CpuBoostOffset + ptm::OffsetInterval * j), &CpuBoostClock, sizeof(CpuBoostClock));
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::CpuBoostOffset + ptm::OffsetInterval * j + 0x4), &CpuBoostClock, sizeof(CpuBoostClock));
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