diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp b/Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp index 1ad2f66a..eb6ef7fc 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/customize.cpp @@ -26,12 +26,11 @@ #define DISABLED 0 #define DEACTIVATED_GPU_FREQ 2000 #define CPU_MAX_MAX_VOLT 1235000 -#define GPU_MIN_MIN_VOLT 480000 + namespace ams::ldr::oc { volatile CustomizeTable C = { -.mtcConf = AUTO_ADJ_BL, .hpMode = DISABLED, .commonEmcMemVolt = 1175000, // LPDDR4X JEDEC Specification @@ -53,12 +52,15 @@ volatile CustomizeTable C = { .t8_tREFI = 0, /* Set to 4 read and 2 write for 1866bl. */ -/* For 2133bl: 8 read and 4 write. */ +/* For 2131bl: 8 read and 4 write. */ .mem_burst_read_latency = 8, .mem_burst_write_latency = 4, .eristaCpuUV = 0, -.eristaCpuMaxVolt = 1235, +.eristaCpuVmin = 800, +.eristaCpuMaxVolt = 1200, +/* Unlocks up to 2295 Mhz CPU, usage is not recommended. */ +.eristaCpuUnlock = DISABLED, .marikoCpuUVLow = 0, // No undervolt .marikoCpuUVHigh = 0, // No undervolt @@ -74,13 +76,12 @@ volatile CustomizeTable C = { .marikoCpuMaxClock = 2397000, .eristaCpuBoostClock = 1785000, // Default boost clock -.marikoCpuBoostClock = 1963000, // Default boost clock +.marikoCpuBoostClock = 1963500, // Default boost clock .eristaGpuUV = 0, -.eristaGpuVmin = 810, +.eristaGpuVmin = 800, .marikoGpuUV = 0, - /* For automatic vmin detection, set this to AUTO. */ .marikoGpuVmin = 610, @@ -104,31 +105,31 @@ volatile CustomizeTable C = { /* You can overwrite auto with any voltage (in mv) of your choice - offset will not be applied. */ .eristaGpuVoltArray = { AUTO /* 76 */, - AUTO /* 115 */, + // AUTO /* 115 */, AUTO /* 153 */, - AUTO /* 192 */, + // AUTO /* 192 */, AUTO /* 230 */, - AUTO /* 269 */, + // AUTO /* 269 */, AUTO /* 307 */, - AUTO /* 346 */, + // AUTO /* 346 */, AUTO /* 384 */, - AUTO /* 422 */, + // AUTO /* 422 */, AUTO /* 460 */, - AUTO /* 499 */, + // AUTO /* 499 */, AUTO /* 537 */, - AUTO /* 576 */, + // AUTO /* 576 */, AUTO /* 614 */, - AUTO /* 652 */, + // AUTO /* 652 */, AUTO /* 691 */, - AUTO /* 729 */, + // AUTO /* 729 */, AUTO /* 768 */, - AUTO /* 806 */, + // AUTO /* 806 */, AUTO /* 844 */, - AUTO /* 883 */, + // AUTO /* 883 */, AUTO /* 921 */, - DEACTIVATED_GPU_FREQ /* 960 (Disabled by default) */, + // DEACTIVATED_GPU_FREQ /* 960 (Disabled by default) */, DEACTIVATED_GPU_FREQ /* 998 (Disabled by default) */, - DEACTIVATED_GPU_FREQ /* 1036 (Disabled by default) */, + // DEACTIVATED_GPU_FREQ /* 1036 (Disabled by default) */, DEACTIVATED_GPU_FREQ /* 1075 (Disabled by default) */, }, @@ -149,7 +150,7 @@ volatile CustomizeTable C = { AUTO /* 1075 */, AUTO /* 1152 */, AUTO /* 1228 */, - AUTO /* 1267 */, + AUTO /* 1267 (Disabled by default) */, DEACTIVATED_GPU_FREQ /* 1305 (Disabled by default) */, DEACTIVATED_GPU_FREQ /* 1344 (Disabled by default) */, DEACTIVATED_GPU_FREQ /* 1382 (Disabled by default) */, @@ -159,30 +160,51 @@ volatile CustomizeTable C = { DEACTIVATED_GPU_FREQ /* 1536 (Disabled by default) */, }, -/* You shouldn't have to modify anything past here. */ - +/* You shouldn't have to anything past here. */ .eristaCpuDvfsTable = { - { 204000, { 721094 }, {} }, - { 306000, { 754040 }, {} }, - { 408000, { 786986 }, {} }, - { 510000, { 819932 }, {} }, - { 612000, { 852878 }, {} }, - { 714000, { 885824 }, {} }, - { 816000, { 918770 }, {} }, - { 918000, { 951716 }, {} }, - { 1020000, { 984662 }, { -2875621, 358099, -8585 } }, - { 1122000, { 1017608 }, { -52225, 104159, -2816 } }, - { 1224000, { 1050554 }, { 1076868, 8356, -727 } }, - { 1326000, { 1083500 }, { 2208191, -84659, 1240 } }, - { 1428000, { 1116446 }, { 2519460, -105063, 1611 } }, - { 1581000, { 1130000 }, { 2889664, -122173, 1834 } }, - { 1683000, { 1168000 }, { 5100873, -279186, 4747 } }, - { 1785000, { 1227500 }, { 5100873, -279186, 4747 } }, - { 1887000, { CPU_MAX_MAX_VOLT }, { 5100873, -279186, 4747 } }, - { 1963500, { CPU_MAX_MAX_VOLT }, { 5100873, -279186, 4747 } }, - { 2091000, { CPU_MAX_MAX_VOLT }, { 5100873, -279186, 4747 } }, - { 2193000, { CPU_MAX_MAX_VOLT }, { 5100873, -279186, 4747 } }, - { 2295000, { CPU_MAX_MAX_VOLT }, { 5100873, -279186, 4747 } }, + { 204000, { 721094, }, { } }, + { 306000, { 754040, }, { } }, + { 408000, { 786986, }, { } }, + { 510000, { 819932, }, { } }, + { 612000, { 852878, }, { } }, + { 714000, { 885824, }, { } }, + { 816000, { 918770, }, { } }, + { 918000, { 951716, }, { } }, + { 1020000, { 984662, }, { -2875621, 358099, -8585, } }, + { 1122000, { 1017608, }, { -52225, 104159, -2816, } }, + { 1224000, { 1050554, }, { 1076868, 8356, -727, } }, + { 1326000, { 1083500, }, { 2208191, -84659, 1240, } }, + { 1428000, { 1116446, }, { 2519460, -105063, 1611, } }, + { 1581000, { 1130000, }, { 2889664, -122173, 1834, } }, + { 1683000, { 1168000, }, { 5100873, -279186, 4747, } }, + { 1785000, { 1225000, }, { 5100873, -279186, 4747, } }, + // { 1887000, { 1225000, }, { 5100873, -279186, 4747, } }, + // { 1989000, { 1227500, }, { 5100873, -279186, 4747, } }, + // { 2091000, { 1256250, }, { 5100873, -279186, 4747, } }, +}, + +.eristaCpuDvfsTableSLT = { + { 204000, { 721094, }, { } }, + { 306000, { 754040, }, { } }, + { 408000, { 786986, }, { } }, + { 510000, { 819932, }, { } }, + { 612000, { 852878, }, { } }, + { 714000, { 885824, }, { } }, + { 816000, { 918770, }, { } }, + { 918000, { 951716, }, { } }, + { 1020000, { 984662, }, { -2875621, 358099, -8585, } }, + { 1122000, { 1017608, }, { -52225, 104159, -2816, } }, + { 1224000, { 1050554, }, { 1076868, 8356, -727, } }, + { 1326000, { 1083500, }, { 2208191, -84659, 1240, } }, + { 1428000, { 1116446, }, { 2519460, -105063, 1611, } }, + { 1581000, { 1130000, }, { 2889664, -122173, 1834, } }, + { 1683000, { 1168000, }, { 5100873, -279186, 4747, } }, + { 1785000, { 1225000, }, { 5100873, -279186, 4747, } }, + { 1887000, { 1225000, }, { 5100873, -279186, 4747, } }, + { 1989000, { 1227500, }, { 5100873, -279186, 4747, } }, + { 2091000, { 1256250, }, { 5100873, -279186, 4747, } }, + { 2193000, { 1256250, }, { 5100873, -279186, 4747, } }, + { 2295000, { 1256250, }, { 5100873, -279186, 4747, } }, }, .marikoCpuDvfsTable = { @@ -323,96 +345,59 @@ volatile CustomizeTable C = { }, .eristaGpuDvfsTable = { - { 76800, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 115200, { }, { 856185, 8144, -940, 808, -21583, 226 } }, - { 153600, { }, { 856185, 8144, -940, 808, -21583, 226 } }, - { 192000, { }, { 898077, 8144, -940, 808, -21583, 226 } }, - { 230400, { }, { 898077, 8144, -940, 808, -21583, 226 } }, - { 268800, { }, { 939968, 8144, -940, 808, -21583, 226 } }, - { 307200, { }, { 939968, 8144, -940, 808, -21583, 226 } }, - { 345600, { }, { 981860, 8144, -940, 808, -21583, 226 } }, - { 384000, { }, { 981860, 8144, -940, 808, -21583, 226 } }, - { 422400, { }, { 1023751, 8144, -940, 808, -21583, 226 } }, - { 460800, { }, { 1023751, 8144, -940, 808, -21583, 226 } }, - { 499200, { }, { 1065642, 8144, -940, 808, -21583, 226 } }, - { 537600, { }, { 1065642, 8144, -940, 808, -21583, 226 } }, - { 576000, { }, { 1107534, 8144, -940, 808, -21583, 226 } }, - { 614400, { }, { 1107534, 8144, -940, 808, -21583, 226 } }, - { 652800, { }, { 1149425, 8144, -940, 808, -21583, 226 } }, - { 691200, { }, { 1149425, 8144, -940, 808, -21583, 226 } }, - { 729600, { }, { 1191317, 8144, -940, 808, -21583, 226 } }, - { 768000, { }, { 1191317, 8144, -940, 808, -21583, 226 } }, - { 806400, { }, { 1233208, 8144, -940, 808, -21583, 226 } }, - { 844800, { }, { 1233208, 8144, -940, 808, -21583, 226 } }, - { 883200, { }, { 1275100, 8144, -940, 808, -21583, 226 } }, - { 921600, { }, { 1275100, 8144, -940, 808, -21583, 226 } }, -// { 998400, { }, { 1316991, 8144, -940, 808, -21583, 226 } }, -// { 1075200, { }, { 1358882, 8144, -940, 808, -21583, 226 } }, + { 76800, { }, { 814294, 8144, -940, 808, -21583, 226, } }, + { 153600, { }, { 856185, 8144, -940, 808, -21583, 226, } }, + { 230400, { }, { 898077, 8144, -940, 808, -21583, 226, } }, + { 307200, { }, { 939968, 8144, -940, 808, -21583, 226, } }, + { 384000, { }, { 981860, 8144, -940, 808, -21583, 226, } }, + { 460800, { }, { 1023751, 8144, -940, 808, -21583, 226, } }, + { 537600, { }, { 1065642, 8144, -940, 808, -21583, 226, } }, + { 614400, { }, { 1107534, 8144, -940, 808, -21583, 226, } }, + { 691200, { }, { 1149425, 8144, -940, 808, -21583, 226, } }, + { 768000, { }, { 1191317, 8144, -940, 808, -21583, 226, } }, + { 844800, { }, { 1233208, 8144, -940, 808, -21583, 226, } }, + { 921600, { }, { 1275100, 8144, -940, 808, -21583, 226, } }, + // { 998400, { }, { 1316991, 8144, -940, 808, -21583, 226, } }, }, .eristaGpuDvfsTableSLT = { - { 76800, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 115200, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 153600, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 192000, { }, { 856185, 8144, -940, 808, -21583, 226 } }, - { 230400, { }, { 856185, 8144, -940, 808, -21583, 226 } }, - { 268800, { }, { 898077, 8144, -940, 808, -21583, 226 } }, - { 307200, { }, { 898077, 8144, -940, 808, -21583, 226 } }, - { 345600, { }, { 939968, 8144, -940, 808, -21583, 226 } }, - { 384000, { }, { 939968, 8144, -940, 808, -21583, 226 } }, - { 422400, { }, { 981860, 8144, -940, 808, -21583, 226 } }, - { 460800, { }, { 981860, 8144, -940, 808, -21583, 226 } }, - { 499200, { }, { 1023751, 8144, -940, 808, -21583, 226 } }, - { 537600, { }, { 1023751, 8144, -940, 808, -21583, 226 } }, - { 576000, { }, { 1065642, 8144, -940, 808, -21583, 226 } }, - { 614400, { }, { 1065642, 8144, -940, 808, -21583, 226 } }, - { 652800, { }, { 1107534, 8144, -940, 808, -21583, 226 } }, - { 691200, { }, { 1107534, 8144, -940, 808, -21583, 226 } }, - { 729600, { }, { 1149425, 8144, -940, 808, -21583, 226 } }, - { 768000, { }, { 1149425, 8144, -940, 808, -21583, 226 } }, - { 806400, { }, { 1191317, 8144, -940, 808, -21583, 226 } }, - { 844800, { }, { 1191317, 8144, -940, 808, -21583, 226 } }, - { 883200, { }, { 1233208, 8144, -940, 808, -21583, 226 } }, - { 921600, { }, { 1233208, 8144, -940, 808, -21583, 226 } }, - { 960000, { }, { 1275100, 8144, -940, 808, -21583, 226 } }, - { 998400, { }, { 1275100, 8144, -940, 808, -21583, 226 } }, -// { 1075200, { }, { 1316991, 8144, -940, 808, -21583, 226 } }, + { 76800, { }, { 814294, 8144, -940, 0, 0, 226, } }, + { 153600, { }, { 856185, 8144, -940, 0, 0, 226, } }, + { 230400, { }, { 908077, 8144, -940, 0, 0, 226, } }, + { 307200, { }, { 934968, 8144, -940, 0, 0, 226, } }, + { 384000, { }, { 952860, 8144, -940, 0, 0, 226, } }, + { 460800, { }, { 978751, 8144, -940, 0, 0, 226, } }, + { 537600, { }, { 990642, 8144, -940, 0, 0, 226, } }, + { 614400, { }, { 1017534, 8144, -940, 0, 0, 226, } }, + { 691200, { }, { 1042425, 8144, -940, 0, 0, 226, } }, + { 768000, { }, { 1066317, 8144, -940, 0, 0, 226, } }, + { 844800, { }, { 1093208, 8144, -940, 0, 0, 226, } }, + { 921600, { }, { 1118100, 8144, -940, 0, 0, 226, } }, + // { 998400, { }, { 1156991, 8144, -940, 0, 0, 226, } }, }, -.eristaGpuDvfsTableHigh = { - { 76800, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 115200, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 153600, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 192000, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 230400, { }, { 814294, 8144, -940, 808, -21583, 226 } }, - { 268800, { }, { 856185, 8144, -940, 808, -21583, 226 } }, - { 307200, { }, { 856185, 8144, -940, 808, -21583, 226 } }, - { 345600, { }, { 898077, 8144, -940, 808, -21583, 226 } }, - { 384000, { }, { 898077, 8144, -940, 808, -21583, 226 } }, - { 422400, { }, { 939968, 8144, -940, 808, -21583, 226 } }, - { 460800, { }, { 939968, 8144, -940, 808, -21583, 226 } }, - { 499200, { }, { 981860, 8144, -940, 808, -21583, 226 } }, - { 537600, { }, { 981860, 8144, -940, 808, -21583, 226 } }, - { 576000, { }, { 1023751, 8144, -940, 808, -21583, 226 } }, - { 614400, { }, { 1023751, 8144, -940, 808, -21583, 226 } }, - { 652800, { }, { 1065642, 8144, -940, 808, -21583, 226 } }, - { 691200, { }, { 1065642, 8144, -940, 808, -21583, 226 } }, - { 729600, { }, { 1107534, 8144, -940, 808, -21583, 226 } }, - { 768000, { }, { 1107534, 8144, -940, 808, -21583, 226 } }, - { 806400, { }, { 1149425, 8144, -940, 808, -21583, 226 } }, - { 844800, { }, { 1149425, 8144, -940, 808, -21583, 226 } }, - { 883200, { }, { 1191317, 8144, -940, 808, -21583, 226 } }, - { 921600, { }, { 1191317, 8144, -940, 808, -21583, 226 } }, - { 960000, { }, { 1233208, 8144, -940, 808, -21583, 226 } }, - { 998400, { }, { 1233208, 8144, -940, 808, -21583, 226 } }, - { 1036800, { }, { 1275100, 8144, -940, 808, -21583, 226 } }, - { 1075200, { }, { 1275100, 8144, -940, 808, -21583, 226 } }, +.eristaGpuDvfsTableHiOPT = { + { 76800, { }, { 814294, 8144, -940, 0, 0, 226, } }, + { 153600, { }, { 856185, 8144, -940, 0, 0, 226, } }, + { 230400, { }, { 908077, 8144, -940, 0, 0, 226, } }, + { 307200, { }, { 934968, 8144, -940, 0, 0, 226, } }, + { 384000, { }, { 952860, 8144, -940, 0, 0, 226, } }, + { 460800, { }, { 978751, 8144, -940, 0, 0, 226, } }, + { 537600, { }, { 990642, 8144, -940, 0, 0, 226, } }, + { 614400, { }, { 1017534, 8144, -940, 0, 0, 226, } }, + { 691200, { }, { 1042425, 8144, -940, 0, 0, 226, } }, + { 768000, { }, { 1066317, 8144, -940, 0, 0, 226, } }, + { 844800, { }, { 1093208, 8144, -940, 0, 0, 226, } }, + { 921600, { }, { 1118100, 8144, -940, 0, 0, 226, } }, + { 998400, { }, { 1156991, 8144, -940, 0, 0, 226, } }, + { 1075200, { }, { } }, + // { 1152000, { }, { } }, }, .marikoGpuDvfsTable = { - { 76800, { }, { GPU_MIN_MIN_VOLT, } }, - { 153600, { }, { GPU_MIN_MIN_VOLT, } }, - { 230400, { }, { GPU_MIN_MIN_VOLT, } }, + { 76800, { }, { 480000, } }, + { 153600, { }, { 480000, } }, + { 230400, { }, { 480000, } }, { 307200, { }, { 738712, -7304, -552, 119, -3750, -2 } }, { 384000, { }, { 758712, -7304, -552, 119, -3750, -2 } }, { 460800, { }, { 778712, -7304, -552, 119, -3750, -2 } }, @@ -425,14 +410,14 @@ volatile CustomizeTable C = { { 998400, { }, { 1065665,-16075, -497,-179, 3213, 9 } }, { 1075200, { }, { 1132576,-16093, -648, 0, 1077, 40 } }, { 1152000, { }, { 1180029,-14534, -830, 0, 1469, 110 } }, -// { 1228800, { }, { 1248293,-16383, -859, 0, 3722, 313 } }, -// { 1267200, { }, { 1286399,-17475, -867, 0, 3681, 559 } }, + { 1228800, { }, { 1248293,-16383, -859, 0, 3722, 313 } }, + { 1267200, { }, { 1286399,-17475, -867, 0, 3681, 559 } }, }, .marikoGpuDvfsTableSLT = { - { 76800, { }, { GPU_MIN_MIN_VOLT, } }, - { 153600, { }, { GPU_MIN_MIN_VOLT, } }, - { 230400, { }, { GPU_MIN_MIN_VOLT, } }, + { 76800, { }, { 480000, } }, + { 153600, { }, { 480000, } }, + { 230400, { }, { 480000, } }, { 307200, { }, { 738712, -7304, -552, 119, -3750, -2 } }, { 384000, { }, { 758712, -7304, -552, 119, -3750, -2 } }, { 460800, { }, { 778712, -7304, -552, 119, -3750, -2 } }, @@ -450,9 +435,9 @@ volatile CustomizeTable C = { }, .marikoGpuDvfsTableHiOPT = { - { 76800, { }, { GPU_MIN_MIN_VOLT, } }, - { 153600, { }, { GPU_MIN_MIN_VOLT, } }, - { 230400, { }, { GPU_MIN_MIN_VOLT, } }, + { 76800, { }, { 480000, } }, + { 153600, { }, { 480000, } }, + { 230400, { }, { 480000, } }, { 307200, { }, { 738712, -7304, -552, 119, -3750, -2 } }, { 384000, { }, { 758712, -7304, -552, 119, -3750, -2 } }, { 460800, { }, { 778712, -7304, -552, 119, -3750, -2 } }, diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp b/Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp index 8ab0acaf..19609e90 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/customize.hpp @@ -51,7 +51,7 @@ constexpr uint32_t ERISTA_MTC_MAGIC = 0x43544D45; // EMTC constexpr uint32_t MARIKO_MTC_MAGIC = 0x43544D4D; // MMTC typedef struct CustomizeTable { - u8 cust[16] = {'H', 'O', 'C', 'K', 'I', 'P', 'C', 'U', 'S', 'T', '\0', '\0', '\0', '\0'}; + u8 cust[4] = {'C', 'U', 'S', 'T'}; u32 custRev = CUST_REV; u32 mtcConf; @@ -78,7 +78,9 @@ typedef struct CustomizeTable { u32 mem_burst_write_latency; u32 eristaCpuUV; + u32 eristaCpuVmin; u32 eristaCpuMaxVolt; + u32 eristaCpuUnlock; u32 marikoCpuUVLow; u32 marikoCpuUVHigh; @@ -109,6 +111,7 @@ typedef struct CustomizeTable { u32 marikoGpuVoltArray[24]; CustomizeCpuDvfsTable eristaCpuDvfsTable; + CustomizeCpuDvfsTable eristaCpuDvfsTableSLT; CustomizeCpuDvfsTable marikoCpuDvfsTable; CustomizeCpuDvfsTable marikoCpuDvfsTableSLT; @@ -118,7 +121,7 @@ typedef struct CustomizeTable { CustomizeGpuDvfsTable eristaGpuDvfsTable; CustomizeGpuDvfsTable eristaGpuDvfsTableSLT; - CustomizeGpuDvfsTable eristaGpuDvfsTableHigh; + CustomizeGpuDvfsTable eristaGpuDvfsTableHiOPT; CustomizeGpuDvfsTable marikoGpuDvfsTable; CustomizeGpuDvfsTable marikoGpuDvfsTableSLT; diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.cpp b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.cpp index 0dcd1ed7..3260df31 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.cpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.cpp @@ -73,8 +73,8 @@ Result MemVoltHandler(u32* ptr) { } void SafetyCheck() { - // if (C.custRev != CUST_REV) - // CRASH("Triggered"); + if (C.custRev != CUST_REV) + CRASH("Triggered"); struct sValidator { volatile u32 value; @@ -116,7 +116,7 @@ void SafetyCheck() { break; case 2: case 3: - eristaGpuDvfsMaxFreq = static_cast(GetDvfsTableLastEntry(C.eristaGpuDvfsTableHigh)->freq); + eristaGpuDvfsMaxFreq = static_cast(GetDvfsTableLastEntry(C.eristaGpuDvfsTableHiOPT)->freq); break; default: eristaGpuDvfsMaxFreq = static_cast(GetDvfsTableLastEntry(C.eristaGpuDvfsTable)->freq); diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.hpp b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.hpp index 3b909f40..434add2f 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.hpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv.hpp @@ -54,11 +54,11 @@ namespace ams::ldr::oc::pcv { static const u32 cpuVoltagePatchValues[] = { 850, 38, 1120, 1000, 100, 1000, 0 }; static const s32 cpuVoltagePatchOffsets[] = { -2, -1, 5, 6, 7, 8, 9 }; - static_assert(sizeof(cpuVoltagePatchValues) == sizeof(cpuVoltagePatchOffsets), "Invalid CpuVoltagePatch size"); + static_assert(sizeof(cpuVoltagePatchValues) == sizeof(cpuVoltagePatchOffsets), "Invalid cpuVoltagePatch size"); static const u32 cpuVoltageSecondaryPatchValues[] = { 800, 1120, 0, 800, 1120, 0, 620, 1120, 20000, 620, 1120, 70000, 950, 1132, 0, 950 }; static const s32 cpuVoltageSecondaryPatchOffsets[] = { -6, -5, -4, -3, -2, -1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 }; - static_assert(sizeof(cpuVoltageSecondaryPatchValues) == sizeof(cpuVoltageSecondaryPatchOffsets), "Invalid secondary CpuVoltagePatch size"); + static_assert(sizeof(cpuVoltageSecondaryPatchValues) == sizeof(cpuVoltageSecondaryPatchOffsets), "Invalid secondary cpuVoltagePatch size"); static const u32 allowedCpuMaxFrequencies[] = { 2'397'000, 2'499'000, 2'601'000, 2'703'000, }; @@ -86,7 +86,7 @@ namespace ams::ldr::oc::pcv { constexpr u32 GpuClkPllMax = 1300'000'000; constexpr u32 GpuClkPllLimit = 2'600'000; - constexpr int GpuVminOfficial = 610; + constexpr u32 GpuVminOfficial = 610; static const u32 gpuDVFSPattern[] = { 1050, 1000, 100, 1000, 10, }; static const u32 gpuVoltThermalPattern[] = { 800, 1120, 0, 610, 1120, 20000, 610, 1120, 30000, 610, 1120, 50000, 610, 1120, 70000, 610, 1120, 90000, }; @@ -200,20 +200,30 @@ namespace ams::ldr::oc::pcv { { }, }; - constexpr int GpuVminOfficial = 810; constexpr u32 CpuVoltOfficial = 1235; + constexpr u32 CpuVminOfficial = 825; + constexpr u32 CpuVoltL4T = 1235'000; - constexpr u16 CpuMinVolts[] = {950, 850, 825, 810}; + static const u32 cpuVoltDvfsPattern[] = { 1227, 1000, 100, 1000, 0 }; + static const u32 cpuVoltDvfsOffsets[] = { 5, 6, 7, 9, 8 }; + static_assert(sizeof(cpuVoltDvfsPattern) == sizeof(cpuVoltDvfsOffsets), "Invalid cpuVoltDvfsPattern"); - inline bool CpuMaxVoltPatternFn(u32 *ptr32) { - u32 val = *ptr32; - return (val == 1132 || val == 1170 || val == 1227); - } + static const u32 cpuVoltageThermalPattern[] = { 950, 1132, 0, 950, 1227, 0, 825, 1227, 15000, 825, 1170, 60000, 825, 1132, 80000 }; + static_assert(sizeof(cpuVoltageThermalPattern) == 0x3c, "invalid cpuVoltageThermalPattern size"); constexpr u32 GpuClkPllLimit = 921'600'000; + constexpr u32 GpuVminOfficial = 810; + + static const u32 gpuVoltDvfsPattern[] = { 1150, 1000, 100, 1000, 10, }; + static const u32 gpuVoltDvfsOffsets[] = { 1, 2, 3, 4, 5, }; + static_assert(sizeof(gpuVoltDvfsPattern) == sizeof(gpuVoltDvfsOffsets), "Invalid gpuVoltDvfsPattern"); + + static const u32 gpuVoltThermalPattern[] = { 950, 1132, 0, 810, 1132, 15000, 810, 1132, 30000, 810, 1132, 50000, 810, 1132, 70000, 810, 1132, 105000 }; + static_assert(sizeof(gpuVoltThermalPattern) == 0x48, "invalid gpuVoltageThermalPattern size"); + /* GPU Max Clock asm Pattern: * @@ -249,7 +259,7 @@ namespace ams::ldr::oc::pcv { inline bool GpuMaxClockPatternFn(u32 *ptr32) { return asm_compare_no_rd(*ptr32, asm_pattern[0]); - } + }; constexpr cvb_entry_t GpuCvbTableDefault[] = { // NA_FREQ_CVB_TABLE @@ -276,10 +286,19 @@ namespace ams::ldr::oc::pcv { void Patch(uintptr_t mapped_nso, size_t nso_size); } + inline auto MatchesPattern = [](u32 *base, const auto &offsets, const auto &values) { + for (size_t i = 0; i < std::size(values); ++i) { + if (*(base + offsets[i]) != values[i]) { + return false; + } + } + return true; + }; + template Result CpuFreqCvbTable(u32 *ptr) { cvb_entry_t *default_table = isMariko ? (cvb_entry_t *)(&mariko::CpuCvbTableDefault) : (cvb_entry_t *)(&erista::CpuCvbTableDefault); - cvb_entry_t *customize_table = const_cast(C.marikoCpuDvfsTableHelios); + cvb_entry_t *customize_table = nullptr; if (isMariko) { switch (C.tableConf) { @@ -302,6 +321,16 @@ namespace ams::ldr::oc::pcv { break; } } + } else { + if (C.eristaCpuUV) { + if (C.eristaCpuUnlock) { + customize_table = const_cast(C.eristaCpuDvfsTableSLT); + } else { + customize_table = const_cast(C.eristaCpuDvfsTable); + } + } else { + customize_table = default_table;; + } } u32 cpu_max_volt = isMariko ? C.marikoCpuMaxVolt : C.eristaCpuMaxVolt; @@ -309,6 +338,8 @@ namespace ams::ldr::oc::pcv { if (isMariko) { cpu_freq_threshold = 2193'000; + } else { + cpu_freq_threshold = 2091'000; } size_t default_entry_count = GetDvfsTableEntryCount(default_table); @@ -327,7 +358,11 @@ namespace ams::ldr::oc::pcv { cvb_entry_t *entry = static_cast(cpu_cvb_table_head); for (size_t i = 0; i < customize_entry_count; i++) { if (entry->freq >= cpu_freq_threshold) { - PATCH_OFFSET(&(entry->cvb_pll_param.c0), cpu_max_volt * 1000); + if (isMariko) { + PATCH_OFFSET(&(entry->cvb_pll_param.c0), cpu_max_volt * 1000); + } else { + // PATCH_OFFSET(&(entry->cvb_dfll_param.c0), cpu_max_volt * 1000); + } } entry++; } @@ -371,7 +406,7 @@ namespace ams::ldr::oc::pcv { customize_table = const_cast(C.eristaGpuDvfsTableSLT); break; case 2: - customize_table = const_cast(C.eristaGpuDvfsTableHigh); + customize_table = const_cast(C.eristaGpuDvfsTableHiOPT); break; default: customize_table = const_cast(C.eristaGpuDvfsTable); diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_erista.cpp b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_erista.cpp index 7d15f7a7..59344898 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_erista.cpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_erista.cpp @@ -23,77 +23,80 @@ namespace ams::ldr::oc::pcv::erista { - /* Remove? */ - Result CpuFreqVdd(u32* ptr) { - dvfs_rail* entry = reinterpret_cast(reinterpret_cast(ptr) - offsetof(dvfs_rail, freq)); + Result CpuVoltDvfs(u32 *ptr) { + if (MatchesPattern(ptr, cpuVoltDvfsPattern, cpuVoltDvfsOffsets)) { + if (C.eristaCpuVmin) { + PATCH_OFFSET(ptr, C.eristaCpuVmin); + } - R_UNLESS(entry->id == 1, ldr::ResultInvalidCpuFreqVddEntry()); - R_UNLESS(entry->min_mv == 250'000, ldr::ResultInvalidCpuFreqVddEntry()); - R_UNLESS(entry->step_mv == 5000, ldr::ResultInvalidCpuFreqVddEntry()); - R_UNLESS(entry->max_mv == 1525'000, ldr::ResultInvalidCpuFreqVddEntry()); + if (C.eristaCpuUV) { + PATCH_OFFSET(ptr - 2, C.eristaCpuVmin); + } - R_SUCCEED(); - } + if (C.eristaCpuMaxVolt) { + PATCH_OFFSET(ptr + 5, C.eristaCpuMaxVolt); + } - Result GpuVmin(u32 *ptr) { - if (!C.eristaGpuVmin) { - R_SKIP(); - } - - PATCH_OFFSET(ptr, (int)C.eristaGpuVmin); - R_SUCCEED(); - } - - Result CpuVoltRange(u32 *ptr) { - u32 min_volt_got = *(ptr - 1); - for (const auto &mv : CpuMinVolts) { - if (min_volt_got != mv) - continue; - - if (!C.eristaCpuMaxVolt) - R_SKIP(); - - PATCH_OFFSET(ptr, C.eristaCpuMaxVolt); R_SUCCEED(); } + R_THROW(ldr::ResultInvalidCpuMinVolt()); } + Result CpuVoltThermals(u32 *ptr) { + if (std::memcmp(ptr - 6, cpuVoltageThermalPattern, sizeof(cpuVoltageThermalPattern))) { + // AMS_ABORT_UNLESS(0); + R_THROW(ldr::ResultInvalidCpuMinVolt()); + } + + if (C.eristaCpuVmin) { + PATCH_OFFSET( ptr, C.eristaCpuVmin); + PATCH_OFFSET(ptr + 3, C.eristaCpuVmin); + PATCH_OFFSET(ptr + 9, C.eristaCpuVmin); + } + + if (C.eristaCpuMaxVolt) { + PATCH_OFFSET(ptr - 2, C.eristaCpuMaxVolt); + PATCH_OFFSET(ptr + 1, C.eristaCpuMaxVolt); + PATCH_OFFSET(ptr + 4, C.eristaCpuMaxVolt); + PATCH_OFFSET(ptr + 7, C.eristaCpuMaxVolt); + } + + R_SUCCEED(); + } + Result CpuVoltDfll(u32* ptr) { cvb_cpu_dfll_data *entry = reinterpret_cast(ptr); - // R_UNLESS(entry->tune0_low == 0x0000FFCF, ldr::ResultInvalidCpuVoltDfllEntry()); - // R_UNLESS(entry->tune0_high == 0x00000000, ldr::ResultInvalidCpuVoltDfllEntry()); - // R_UNLESS(entry->tune1_low == 0x012207FF, ldr::ResultInvalidCpuVoltDfllEntry()); - // R_UNLESS(entry->tune1_high == 0x03FFF7FF, ldr::ResultInvalidCpuVoltDfllEntry()); - if(!C.eristaCpuUV) { + R_UNLESS(entry->tune0_low == 0x0000FFCF, ldr::ResultInvalidCpuVoltDfllEntry()); + R_UNLESS(entry->tune0_high == 0x00000000, ldr::ResultInvalidCpuVoltDfllEntry()); + R_UNLESS(entry->tune1_low == 0x012207FF, ldr::ResultInvalidCpuVoltDfllEntry()); + R_UNLESS(entry->tune1_high == 0x03FFF7FF, ldr::ResultInvalidCpuVoltDfllEntry()); + + if( !C.eristaCpuUV) { R_SKIP(); } - PATCH_OFFSET(&(entry->dvco_calibration_max), 0x1C); - PATCH_OFFSET(&(entry->tune1_high), 0x10); - PATCH_OFFSET(&(entry->tune_high_margin_millivolts), 0xc); - switch(C.eristaCpuUV) { case 1: - PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); //process_id 0 // EOS UV1 - PATCH_OFFSET(&(entry->tune1_low), 0x027007FF); + PATCH_OFFSET(&(entry->tune0_high), 0xffff); + PATCH_OFFSET(&(entry->tune1_high), 0x27007ff); break; case 2: - PATCH_OFFSET(&(entry->tune0_low), 0x0000EFFF); //process_id 1 // EOS Uv2 - PATCH_OFFSET(&(entry->tune1_low), 0x027407FF); + PATCH_OFFSET(&(entry->tune0_high), 0xefff); + PATCH_OFFSET(&(entry->tune1_high), 0x27407ff); break; case 3: - PATCH_OFFSET(&(entry->tune0_low), 0x0000DFFF); //process_id 0 // EOS UV3 - PATCH_OFFSET(&(entry->tune1_low), 0x027807FF); + PATCH_OFFSET(&(entry->tune0_high), 0xdfff); + PATCH_OFFSET(&(entry->tune1_high), 0x27807ff); break; case 4: - PATCH_OFFSET(&(entry->tune0_low), 0x0000DFDF); //process_id 1 // EOS Uv4 - PATCH_OFFSET(&(entry->tune1_low), 0x027A07FF); + PATCH_OFFSET(&(entry->tune0_high), 0xdfdf); + PATCH_OFFSET(&(entry->tune1_high), 0x27a07ff); break; case 5: - PATCH_OFFSET(&(entry->tune0_low), 0x0000CFDF); // EOS UV5 - PATCH_OFFSET(&(entry->tune1_low), 0x037007FF); + PATCH_OFFSET(&(entry->tune0_high), 0xcfdf); + PATCH_OFFSET(&(entry->tune1_high), 0x37007ff); break; default: break; @@ -101,6 +104,34 @@ namespace ams::ldr::oc::pcv::erista { R_SUCCEED(); } + Result GpuVoltDVFS(u32 *ptr) { + if (MatchesPattern(ptr, gpuVoltDvfsPattern, gpuVoltDvfsOffsets)) { + if (C.eristaGpuVmin) { + PATCH_OFFSET(ptr, C.eristaGpuVmin); + } + R_SUCCEED(); + } + + R_THROW(ldr::ResultInvalidGpuDvfs()); + } + + Result GpuVoltThermals(u32 *ptr) { + u32 result = std::memcmp(ptr - 3, gpuVoltThermalPattern, sizeof(gpuVoltThermalPattern)); + if (result) { + R_THROW(ldr::ResultInvalidGpuDvfs()); + } + + if (C.eristaGpuVmin) { + PATCH_OFFSET(ptr , C.eristaGpuVmin); + PATCH_OFFSET(ptr + 3, C.eristaGpuVmin); + PATCH_OFFSET(ptr + 6, C.eristaGpuVmin); + PATCH_OFFSET(ptr + 9, C.eristaGpuVmin); + PATCH_OFFSET(ptr + 12, C.eristaGpuVmin); + } + + R_SUCCEED(); + } + Result GpuFreqMaxAsm(u32 *ptr32) { // Check if both two instructions match the pattern u32 ins1 = *ptr32, ins2 = *(ptr32 + 1); @@ -121,8 +152,7 @@ namespace ams::ldr::oc::pcv::erista { max_clock = GetDvfsTableLastEntry(C.eristaGpuDvfsTableSLT)->freq; break; case 2: - case 3: - max_clock = GetDvfsTableLastEntry(C.eristaGpuDvfsTableHigh)->freq; + max_clock = GetDvfsTableLastEntry(C.eristaGpuDvfsTableHiOPT)->freq; break; default: max_clock = GetDvfsTableLastEntry(C.eristaGpuDvfsTable)->freq; @@ -151,17 +181,14 @@ namespace ams::ldr::oc::pcv::erista { R_SUCCEED(); } - /* This is not done properly, this is not scaled correctly. */ - /* It is fixable of course, but I don't know if I hate myself enough to fix it, especially considering erista does not benefit much from proper timings. */ - /* This currently patches a lot of unwanted extra stuff that needs to be removed. */ - void MemMtcTableAutoAdjustBaseLatency(EristaMtcTable *table) { - using namespace pcv::erista; - #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \ + // void MemMtcTableAutoAdjustBaseLatency(EristaMtcTable *table) { + // using namespace pcv::erista; + /* #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \ TABLE->burst_regs.PARAM = VALUE; \ - TABLE->shadow_regs_ca_train.PARAM = VALUE; \ + TABLE->shadow_regs_ca_train.PARAM = VALUE; \ TABLE->shadow_regs_quse_train.PARAM = VALUE; \ - TABLE->shadow_regs_rdwr_train.PARAM = VALUE; - + TABLE->shadow_regs_rdwr_train.PARAM = VALUE; +*/ // #define GET_CYCLE(PARAM) ((u32)((double)(PARAM) / tCK_avg)) /* This condition is insane but it's done in eos. */ @@ -199,7 +226,7 @@ namespace ams::ldr::oc::pcv::erista { // if (C.hpMode) { // WRITE_PARAM_ALL_REG(table, emc_cfg, 0x13200000); // } else { - WRITE_PARAM_ALL_REG(table, emc_cfg, 0xF3200000); + // WRITE_PARAM_ALL_REG(table, emc_cfg, 0xF3200000); // } // WRITE_PARAM_ALL_REG(table, emc_rc, /*0x00000060*/ GET_CYCLE(tRC)); @@ -463,22 +490,21 @@ namespace ams::ldr::oc::pcv::erista { // table->la_scale_regs.mc_latency_allowance_nvenc_0 = 0x00800018; // table->dram_timings.t_rp = tRFCpb; // table->dram_timings.t_rfc = tRFCab; - } + // } /* These timings are slightly off from eos, I am not sure why but I am going to figure it out at some point. */ void MemMtcTableAutoAdjust(EristaMtcTable *table) { - if (C.mtcConf != AUTO_ADJ) /* Return even needed? */ - return; + (void) table; // using namespace pcv::erista; // - // #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) // note: add backslashes to make the macro definition work - // TABLE->burst_regs.PARAM = VALUE; - // TABLE->shadow_regs_ca_train.PARAM = VALUE; - // TABLE->shadow_regs_quse_train.PARAM = VALUE; - // TABLE->shadow_regs_rdwr_train.PARAM = VALUE; - // - #define GET_CYCLE(PARAM) ((u32)((double)(PARAM) / (1000000.0 / 1600000.0))) + /* #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) // note: add backslashes to make the macro definition work + TABLE->burst_regs.PARAM = VALUE; \ + TABLE->shadow_regs_ca_train.PARAM = VALUE; \ + TABLE->shadow_regs_quse_train.PARAM = VALUE; \ + TABLE->shadow_regs_rdwr_train.PARAM = VALUE; + */ + // #define GET_CYCLE(PARAM) ((u32)((double)(PARAM) / (1000000.0 / 1600000.0))) // // /* This condition is insane but it's done in eos. */ // /* Need to clean up at some point. */ @@ -551,7 +577,7 @@ namespace ams::ldr::oc::pcv::erista { // // WRITE_PARAM_ALL_REG(table, emc_pchg2pden, GET_CYCLE(1.75)); // WRITE_PARAM_ALL_REG(table, emc_ar2pden, GET_CYCLE(1.75)); - WRITE_PARAM_ALL_REG(table, emc_pdex2cke, GET_CYCLE(1.75)); + // WRITE_PARAM_ALL_REG(table, emc_pdex2cke, GET_CYCLE(1.75)); // WRITE_PARAM_ALL_REG(table, emc_act2pden, GET_CYCLE(14.0)); // WRITE_PARAM_ALL_REG(table, emc_cke2pden, GET_CYCLE(5.0)); // WRITE_PARAM_ALL_REG(table, emc_pdex2mrr, GET_CYCLE(pdex2mrr)); @@ -690,11 +716,7 @@ namespace ams::ldr::oc::pcv::erista { for (u32 i = khz_list_size - 1; i > 0; i--) std::memcpy(static_cast(table_list[i]), static_cast(table_list[i - 1]), sizeof(EristaMtcTable)); - if (C.mtcConf == AUTO_ADJ) { - MemMtcTableAutoAdjust(table_list[0]); - } else { - MemMtcTableAutoAdjustBaseLatency(table_list[0]); - } + MemMtcTableAutoAdjust(table_list[0]); PATCH_OFFSET(ptr, C.eristaEmcMaxClock); R_SUCCEED(); @@ -714,35 +736,35 @@ namespace ams::ldr::oc::pcv::erista { u32 GpuCvbDefaultMaxFreq = static_cast(GetDvfsTableLastEntry(GpuCvbTableDefault)->freq); PatcherEntry patches[] = { - {"CPU Freq Vdd", &CpuFreqVdd, 1, nullptr, CpuClkOSLimit }, {"CPU Freq Table", CpuFreqCvbTable, 1, nullptr, CpuCvbDefaultMaxFreq}, - {"CPU Volt Limit", &CpuVoltRange, 13, nullptr, CpuVoltOfficial }, - {"CPU Volt Dfll", &CpuVoltDfll, 1, nullptr, 0xFFEAD0FF }, + {"CPU Volt DVFS", &CpuVoltDvfs, 1, nullptr, 825}, + {"CPU Volt Thermals", &CpuVoltThermals, 1, nullptr, 825}, + {"CPU Volt Dfll", &CpuVoltDfll, 1, nullptr, 0xFFD0EAFF}, + {"GPU Volt DVFS", &GpuVoltDVFS, 1, nullptr, 810}, + {"GPU Volt Thermals", &GpuVoltThermals, 1, nullptr, 810}, {"GPU Freq Table", GpuFreqCvbTable, 1, nullptr, GpuCvbDefaultMaxFreq}, {"GPU Freq Asm", &GpuFreqMaxAsm, 2, &GpuMaxClockPatternFn}, - {"GPU Volt Thermal", &GpuFreqMaxAsm, 1, &GpuMaxClockPatternFn}, {"GPU Freq PLL", &GpuFreqPllLimit, 1, nullptr, GpuClkPllLimit}, {"MEM Freq Mtc", &MemFreqMtcTable, 0, nullptr, EmcClkOSLimit}, {"MEM Freq Max", &MemFreqMax, 0, nullptr, EmcClkOSLimit}, {"MEM Freq PLLM", &MemFreqPllmLimit, 2, nullptr, EmcClkPllmLimit}, {"MEM Volt", &MemVoltHandler, 2, nullptr, MemVoltHOS}, - {"GPU Vmin", &GpuVmin, 0, nullptr, GpuVminOfficial}, }; - for (uintptr_t ptr = mapped_nso; - ptr <= mapped_nso + nso_size - sizeof(EristaMtcTable); - ptr += sizeof(u32)) { + for (uintptr_t ptr = mapped_nso; ptr <= mapped_nso + nso_size - sizeof(EristaMtcTable); ptr += sizeof(u32)) { u32 *ptr32 = reinterpret_cast(ptr); for (auto &entry : patches) { - if (R_SUCCEEDED(entry.SearchAndApply(ptr32))) + if (R_SUCCEEDED(entry.SearchAndApply(ptr32))) { break; + } } } for (auto &entry : patches) { LOGGING("%s Count: %zu", entry.description, entry.patched_count); - if (R_FAILED(entry.CheckResult())) + if (R_FAILED(entry.CheckResult())) { CRASH(entry.description); + } } } } diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp index 423337b9..b1344290 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp @@ -147,15 +147,6 @@ namespace ams::ldr::oc::pcv::mariko { } Result CpuVoltDVFS(u32 *ptr) { - auto MatchesPattern = [](u32 *base, const auto &offsets, const auto &values) { - for (size_t i = 0; i < std::size(values); ++i) { - if (*(base + offsets[i]) != values[i]) { - return false; - } - } - return true; - }; - /* Check first pattern. */ if (MatchesPattern(ptr, cpuVoltagePatchOffsets, cpuVoltagePatchValues)) { if (C.marikoCpuLowVmin) { @@ -375,7 +366,6 @@ namespace ams::ldr::oc::pcv::mariko { max_clock = GetDvfsTableLastEntry(C.marikoGpuDvfsTableSLT)->freq; break; case 2: - case 3: max_clock = GetDvfsTableLastEntry(C.marikoGpuDvfsTableHiOPT)->freq; break; default: @@ -422,7 +412,7 @@ namespace ams::ldr::oc::pcv::mariko { R_SUCCEED(); } - void MemMtcTableAutoAdjustBaseLatency(MarikoMtcTable *table) { + void MemMtcTableAutoAdjust(MarikoMtcTable *table) { #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \ TABLE->burst_regs.PARAM = VALUE; \ TABLE->shadow_regs_ca_train.PARAM = VALUE; \ @@ -595,30 +585,30 @@ namespace ams::ldr::oc::pcv::mariko { table->emc_cfg_2 = 0x11083D; } - void MemMtcTableAutoAdjust(MarikoMtcTable *table) { - /* Official Tegra X1 TRM, sign up for nvidia developer program (free) to download: - * https://developer.nvidia.com/embedded/dlc/tegra-x1-technical-reference-manual - * Section 18.11: MC Registers - * - * Retail Mariko: 200FBGA 16Gb DDP LPDDR4X SDRAM x 2 - * x16/Ch, 1Ch/die, Double-die, 2Ch, 1CS(rank), 8Gb density per die - * 64Mb x 16DQ x 8banks x 2channels = 2048MB (x32DQ) per package - * - * Devkit Mariko: 200FBGA 32Gb DDP LPDDR4X SDRAM x 2 - * x16/Ch, 1Ch/die, Quad-die, 2Ch, 2CS(rank), 8Gb density per die - * X1+ EMC can R/W to both ranks at the same time, resulting in doubled DQ - * 64Mb x 32DQ x 8banks x 2channels = 4096MB (x64DQ) per package - * - * If you have access to LPDDR4(X) specs or datasheets (from manufacturers or Google), - * you'd better calculate timings yourself rather than relying on following algorithm. - */ - - #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \ - TABLE->burst_regs.PARAM = VALUE; \ - TABLE->shadow_regs_ca_train.PARAM = VALUE; \ + // void MemMtcTableAutoAdjust(MarikoMtcTable *table) { + // /* Official Tegra X1 TRM, sign up for nvidia developer program (free) to download: + // * https://developer.nvidia.com/embedded/dlc/tegra-x1-technical-reference-manual + // * Section 18.11: MC Registers + // * + // * Retail Mariko: 200FBGA 16Gb DDP LPDDR4X SDRAM x 2 + // * x16/Ch, 1Ch/die, Double-die, 2Ch, 1CS(rank), 8Gb density per die + // * 64Mb x 16DQ x 8banks x 2channels = 2048MB (x32DQ) per package + // * + // * Devkit Mariko: 200FBGA 32Gb DDP LPDDR4X SDRAM x 2 + // * x16/Ch, 1Ch/die, Quad-die, 2Ch, 2CS(rank), 8Gb density per die + // * X1+ EMC can R/W to both ranks at the same time, resulting in doubled DQ + // * 64Mb x 32DQ x 8banks x 2channels = 4096MB (x64DQ) per package + // * + // * If you have access to LPDDR4(X) specs or datasheets (from manufacturers or Google), + // * you'd better calculate timings yourself rather than relying on following algorithm. + // */ + // + /* #define WRITE_PARAM_ALL_REG(TABLE, PARAM, VALUE) \ + // TABLE->burst_regs.PARAM = VALUE; \ + // TABLE->shadow_regs_ca_train.PARAM = VALUE; \ TABLE->shadow_regs_rdwr_train.PARAM = VALUE; - - #define GET_CYCLE(PARAM) u32(CEIL(double(PARAM) / tCK_avg)) + */ + // #define GET_CYCLE(PARAM) u32(CEIL(double(PARAM) / tCK_avg)) /* This condition is insane but it's done in eos. */ /* Need to clean up at some point. */ @@ -807,8 +797,8 @@ namespace ams::ldr::oc::pcv::mariko { // table->dram_timings.t_rfc = tRFCab; // table->emc_cfg_2 = 0x11083d; - (void) table; - } + // (void) table; + // } void MemMtcPllmbDivisor(MarikoMtcTable *table) { constexpr u32 PllOscInKHz = 38400; @@ -891,11 +881,7 @@ namespace ams::ldr::oc::pcv::mariko { // Adjust max freq mtc timing parameters with reference to 1331200 table /* TODO: Implement mariko */ - if (C.mtcConf == AUTO_ADJ) { - MemMtcTableAutoAdjust(table_max); - } else { - MemMtcTableAutoAdjustBaseLatency(table_max); - } + MemMtcTableAutoAdjust(table_max); MemMtcPllmbDivisor(table_max); // Overwrite 13312000 table with unmodified 1600000 table copied back @@ -921,7 +907,7 @@ namespace ams::ldr::oc::pcv::mariko { int32_t voltAdd = 25 * C.emcDvbShift; -#define DVB_VOLT(zero, one, two) std::min(zero + voltAdd, 1050), std::min(one + voltAdd, 1025), std::min(two + voltAdd, 1000), + #define DVB_VOLT(zero, one, two) std::min(zero + voltAdd, 1050), std::min(one + voltAdd, 1025), std::min(two + voltAdd, 1000), if (C.marikoEmcMaxClock < 1862400) { std::memcpy(new_start, default_end, sizeof(emc_dvb_dvfs_table_t));