From 8aa5bb37daab9e046465a681e5bf561e79fc901a Mon Sep 17 00:00:00 2001 From: hanabbi Date: Mon, 28 Aug 2023 09:10:34 +0900 Subject: [PATCH] loader: fix burst mc reg values --- .../loader/source/oc/pcv/pcv_mariko.cpp | 27 +++++++------------ 1 file changed, 9 insertions(+), 18 deletions(-) diff --git a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp index 109632b6..cf1a317b 100644 --- a/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp +++ b/Source/Atmosphere/stratosphere/loader/source/oc/pcv/pcv_mariko.cpp @@ -131,15 +131,6 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) { #define ADJUST_PARAM_TABLE(TABLE, PARAM, REF) ADJUST_PARAM(TABLE->PARAM, REF->PARAM) - u32 bracket; - if (C.marikoEmcMaxClock < 2400000) { - bracket = 0; - } else if (C.marikoEmcMaxClock < 2665600) { - bracket = 1; - } else { - bracket = 2; - } - // Burst Register #define ADJUST_PARAM_ALL_REG(TABLE, PARAM, REF) \ ADJUST_PARAM_TABLE(TABLE, burst_regs.PARAM, REF) \ @@ -212,7 +203,7 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) { constexpr u32 MC_ARB_DIV = 4; constexpr u32 MC_ARB_SFA = 2; - WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_cfg, table->burst_mc_regs.mc_emem_arb_cfg + 1 + bracket); + WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_cfg, C.marikoEmcMaxClock / (33.3 * 1000) / MC_ARB_DIV); //CYCLES_PER_UPDATE: The number of mcclk cycles per deadline timer update WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_timing_rcd, CEIL(GET_CYCLE_CEIL(tRCD) / MC_ARB_DIV) - 2) WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_timing_rp, CEIL(GET_CYCLE_CEIL(tRPpb) / MC_ARB_DIV) - 1 + MC_ARB_SFA) WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_timing_rc, CEIL(GET_CYCLE_CEIL(tRC) / MC_ARB_DIV) - 1) @@ -227,23 +218,23 @@ void MemMtcTableAutoAdjust(MarikoMtcTable* table, const MarikoMtcTable* ref) { WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_timing_rfcpb, CEIL(GET_CYCLE_CEIL(tRFCpb) / MC_ARB_DIV)) u32 DA_TURNS = 0; - DA_TURNS |= u8(table->burst_mc_regs.mc_emem_arb_timing_r2w / 2) << 16; - DA_TURNS |= u8(table->burst_mc_regs.mc_emem_arb_timing_w2r / 2) << 24; + DA_TURNS |= u8(table->burst_mc_regs.mc_emem_arb_timing_r2w / 2) << 16; //R2W TURN + DA_TURNS |= u8(table->burst_mc_regs.mc_emem_arb_timing_w2r / 2) << 24; //W2R TURN WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_da_turns, DA_TURNS); u32 DA_COVERS = 0; u8 R_COVER = (table->burst_mc_regs.mc_emem_arb_timing_rap2pre + table->burst_mc_regs.mc_emem_arb_timing_rp + table->burst_mc_regs.mc_emem_arb_timing_rcd) / 2; u8 W_COVER = (table->burst_mc_regs.mc_emem_arb_timing_wap2pre + table->burst_mc_regs.mc_emem_arb_timing_rp + table->burst_mc_regs.mc_emem_arb_timing_rcd) / 2; - DA_COVERS |= (u8)(table->burst_mc_regs.mc_emem_arb_timing_rc / 2); - DA_COVERS |= (R_COVER << 16); - DA_COVERS |= (W_COVER << 24); + DA_COVERS |= (u8)(table->burst_mc_regs.mc_emem_arb_timing_rc / 2); //RC COVER + DA_COVERS |= (R_COVER << 8); //RCD_R COVER + DA_COVERS |= (W_COVER << 16); //RCD_W COVER WRITE_PARAM_BURST_MC_REG(table, mc_emem_arb_da_covers, DA_COVERS); CLEAR_BIT(table->burst_mc_regs.mc_emem_arb_misc0, 7, 0); - table->burst_mc_regs.mc_emem_arb_misc0 |= (table->burst_mc_regs.mc_emem_arb_timing_rc + 1); + table->burst_mc_regs.mc_emem_arb_misc0 |= u8(table->burst_mc_regs.mc_emem_arb_timing_rc + 1); //BC2AA_HOLDOFF CLEAR_BIT(table->burst_mc_regs.mc_emem_arb_misc0, 14, 8); - table->burst_mc_regs.mc_emem_arb_misc0 |= (ADJUST(0x24) << 8); + table->burst_mc_regs.mc_emem_arb_misc0 |= u8((ADJUST(0x24) << 8)); //PRIORITY_INVERSION_THRESHOLD CLEAR_BIT(table->burst_mc_regs.mc_emem_arb_misc0, 20, 16); - table->burst_mc_regs.mc_emem_arb_misc0 |= (ADJUST(12) << 16); + table->burst_mc_regs.mc_emem_arb_misc0 |= u8((ADJUST(12) << 16)); //PRIORITY_INVERSION_ISO_THRESHOLD // updown registers #define ADJUST_PARAM_LA_SCALE_REG(TABLE, PARAM) \