add r2w fine tuning

This commit is contained in:
Lightos1
2026-02-11 11:05:45 +01:00
parent 496e77301b
commit 786467d7ea
7 changed files with 24 additions and 4 deletions

View File

@@ -22,7 +22,7 @@
/* Never edit these. */
#define AUTO 0
#define AUTO_RAM 1
#define AUTO_RAM 0
#define ENABLED 1
#define DISABLED 0
#define DEACTIVATED_GPU_FREQ 2000
@@ -105,7 +105,7 @@ volatile CustomizeTable C = {
/* For automatic vmin detection, set this to AUTO. */
/* vmin past 795mV won't work due to HOS limitation */
/* Vmin is automatically set to 800mV when SoC temperature is below 20C */
.marikoGpuVmin = AUTO_RAM,
.marikoGpuVmin = AUTO,
.marikoGpuVmax = 800,

View File

@@ -126,6 +126,7 @@ typedef struct CustomizeTable {
u32 eristaGpuVoltArray[27];
u32 marikoGpuVoltArray[24];
u32 fineTune_t6_tRTW;
u32 fineTune_t7_tWTR;
u32 reserved[60];

View File

@@ -132,6 +132,7 @@ namespace ams::ldr::hoc {
const double tRRD = tRRD_values[C.t4_tRRD];
const u32 tRFCpb = tRFC_values[C.t5_tRFC];
const u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
const s32 finetRTW = C.fineTune_t6_tRTW;
const s32 finetWTR = C.fineTune_t7_tWTR;
const u32 tRC = tRAS + tRPpb;
@@ -141,7 +142,7 @@ namespace ams::ldr::hoc {
const double tRPab = tRPpb + 3;
const u32 tR2P = CEIL((RL_DBI * 0.426) - 2.0);
const u32 tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL_DBI - (C.t6_tRTW * 3);
const u32 tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL_DBI - (C.t6_tRTW * 3) + finetRTW;
const u32 tRTM = FLOOR((10.0 + RL_DBI) + (3.502 / tCK_avg)) + FLOOR(7.489 / tCK_avg);
const u32 tRATM = CEIL((tRTM - 10.0) + (RL_DBI * 0.426));
inline u32 rext;