add r2w fine tuning
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@@ -22,7 +22,7 @@
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/* Never edit these. */
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#define AUTO 0
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#define AUTO_RAM 1
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#define AUTO_RAM 0
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#define ENABLED 1
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#define DISABLED 0
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#define DEACTIVATED_GPU_FREQ 2000
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@@ -105,7 +105,7 @@ volatile CustomizeTable C = {
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/* For automatic vmin detection, set this to AUTO. */
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/* vmin past 795mV won't work due to HOS limitation */
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/* Vmin is automatically set to 800mV when SoC temperature is below 20C */
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.marikoGpuVmin = AUTO_RAM,
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.marikoGpuVmin = AUTO,
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.marikoGpuVmax = 800,
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@@ -126,6 +126,7 @@ typedef struct CustomizeTable {
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u32 eristaGpuVoltArray[27];
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u32 marikoGpuVoltArray[24];
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u32 fineTune_t6_tRTW;
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u32 fineTune_t7_tWTR;
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u32 reserved[60];
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@@ -132,6 +132,7 @@ namespace ams::ldr::hoc {
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const double tRRD = tRRD_values[C.t4_tRRD];
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const u32 tRFCpb = tRFC_values[C.t5_tRFC];
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const u32 tWTR = 10 - tWTR_values[C.t7_tWTR];
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const s32 finetRTW = C.fineTune_t6_tRTW;
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const s32 finetWTR = C.fineTune_t7_tWTR;
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const u32 tRC = tRAS + tRPpb;
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@@ -141,7 +142,7 @@ namespace ams::ldr::hoc {
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const double tRPab = tRPpb + 3;
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const u32 tR2P = CEIL((RL_DBI * 0.426) - 2.0);
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const u32 tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL_DBI - (C.t6_tRTW * 3);
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const u32 tR2W = FLOOR(FLOOR((5.0 / tCK_avg) + ((FLOOR(48.0 / WL) - 0.478) * 3.0)) / 1.501) + RL_DBI - (C.t6_tRTW * 3) + finetRTW;
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const u32 tRTM = FLOOR((10.0 + RL_DBI) + (3.502 / tCK_avg)) + FLOOR(7.489 / tCK_avg);
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const u32 tRATM = CEIL((tRTM - 10.0) + (RL_DBI * 0.426));
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inline u32 rext;
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