1866/1600 support
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@@ -206,7 +206,7 @@ namespace ams::ldr::oc::pcv {
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constexpr u32 CpuVoltL4T = 1235'000;
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static const u32 cpuVoltDvfsPattern[] = { 1227, 1000, 100, 1000, 0 };
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static const u32 cpuVoltDvfsOffsets[] = { 5, 6, 7, 9, 8 };
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static const u32 cpuVoltDvfsOffsets[] = { 5, 6, 7, 8, 9 };
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static_assert(sizeof(cpuVoltDvfsPattern) == sizeof(cpuVoltDvfsOffsets), "Invalid cpuVoltDvfsPattern");
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static const u32 cpuVoltageThermalPattern[] = { 950, 1132, 0, 950, 1227, 0, 825, 1227, 15000, 825, 1170, 60000, 825, 1132, 80000 };
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@@ -216,7 +216,7 @@ namespace ams::ldr::oc::pcv {
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constexpr u32 GpuVminOfficial = 810;
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static const u32 gpuVoltDvfsPattern[] = { 1150, 1000, 100, 1000, 10, };
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static const u32 gpuVoltDvfsOffsets[] = { 1, 2, 3, 4, 5, };
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static const u32 gpuVoltDvfsOffsets[] = { 1, 2, 3, 4, 5, };
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static_assert(sizeof(gpuVoltDvfsPattern) == sizeof(gpuVoltDvfsOffsets), "Invalid gpuVoltDvfsPattern");
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static const u32 gpuVoltThermalPattern[] = { 950, 1132, 0, 810, 1132, 15000, 810, 1132, 30000, 810, 1132, 50000, 810, 1132, 70000, 810, 1132, 105000 };
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@@ -434,7 +434,7 @@ namespace ams::ldr::oc::pcv::mariko {
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WRITE_PARAM_ALL_REG(table, emc_tckesr, GET_CYCLE_CEIL(tSR));
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WRITE_PARAM_ALL_REG(table, emc_tcke, tCKE);
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WRITE_PARAM_ALL_REG(table, emc_tpd, GET_CYCLE_CEIL(tXP));
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WRITE_PARAM_ALL_REG(table, emc_tclkstop, GET_CYCLE_CEIL(tXP) + 8);
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WRITE_PARAM_ALL_REG(table, emc_tclkstop, GET_CYCLE_CEIL(tXP) + 8); // TODO analyse
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WRITE_PARAM_ALL_REG(table, emc_r2p, tR2P);
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WRITE_PARAM_ALL_REG(table, emc_r2w, tR2W);
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WRITE_PARAM_ALL_REG(table, emc_trtm, tRTM);
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@@ -484,8 +484,6 @@ namespace ams::ldr::oc::pcv::mariko {
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WRITE_PARAM_ALL_REG(table, emc_tr_rdv, rdv);
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WRITE_PARAM_ALL_REG(table, emc_cmd_brlshft_2, 0x24)
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WRITE_PARAM_ALL_REG(table, emc_cmd_brlshft_3, 0x24)
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// WRITE_PARAM_ALL_REG(table, emc_mrs_wait_cnt, 0x07FF003C);
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// WRITE_PARAM_ALL_REG(table, emc_mrs_wait_cnt2, 0x02DE002A);
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/* This needs some clean up. */
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constexpr double MC_ARB_DIV = 4.0;
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@@ -574,7 +572,8 @@ namespace ams::ldr::oc::pcv::mariko {
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table->dram_timings.t_rp = tRFCpb;
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table->dram_timings.t_rfc = tRFCab;
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table->dram_timings.rl = RL_DBI;
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table->emc_mrw2 = 0x8802003F;
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table->emc_mrw2 = (table->emc_mrw2 & ~0xFFu) | static_cast<u32>(mrw2);
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table->emc_cfg_2 = 0x11083D;
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}
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@@ -776,10 +775,14 @@ namespace ams::ldr::oc::pcv::mariko {
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PATCH_OFFSET(ptr, emc_uv);
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i2cInitialize();
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I2cSet_U8(I2cDevice_Max77812_2, 0x25, (emc_uv - uv_min) / uv_step);
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Result resultI2C = I2cSet_U8(I2cDevice_Max77812_2, 0x25, (emc_uv - uv_min) / uv_step);
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i2cExit();
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R_SUCCEED();
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if (R_SUCCEEDED(resultI2C)) {
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R_SUCCEED();
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}
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return resultI2C;
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}
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void Patch(uintptr_t mapped_nso, size_t nso_size) {
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