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Merge pull request #9 from KazushiMe/auto_patching

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Auto patching for pcv and ptm module; Remove loader.kip restriction on Erista MEM OC
This commit is contained in:
KazushiMe
2022-01-21 17:31:20 +08:00
committed by GitHub
parent c2a302c8b7 dcaafe6ea0
commit 5ad1a0c37f
3 changed files with 1758 additions and 1028 deletions
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623
Source/Atmosphere/stratosphere/loader/source/ldr_oc_patch.hpp
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@@ -1,14 +1,54 @@
//#define EXPERIMENTAL /*
constexpr ro::ModuleId PcvModuleId[] = { * Copyright (C) Switch-OC-Suite
// ParseModuleId("91D61D59D7002378E35584FC0B38C7693A3ABAB5"), //11.0.0 *
// ParseModuleId("C503E96550F302E121873136B814A529863D949B"), //12.x * This program is free software; you can redistribute it and/or modify it
ParseModuleId("2058C97C551571506656AA04EC85E2B1B01B155C"), //13.0.0-13.2.0 * under the terms and conditions of the GNU General Public License,
}; * version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
constexpr ro::ModuleId PtmModuleId[] = { //#define EXPERIMENTAL
// ParseModuleId("A79706954C6C45568B0FFE610627E2E89D8FB0D4"), //12.x #pragma once
ParseModuleId("2CA78D4066C1C11317CC2705EBADA9A51D3AC981"), //13.0.0-13.2.0 #include <stratosphere.hpp>
};
namespace ams::ldr {
// RAM(Emc) clockrates:
// 1862400, 1894400, 1932800, 1996800, 2064000, 2099200, 2131200
// Other values might work as well
// RAM overclock could be UNSTABLE and generate graphical glitches / instabilities / NAND corruption
// 1862400/1996800 has been tested stable for all DRAM chips
constexpr u32 EmcClock = 1996800;
// CPU max clockrate:
// >= 2193000 will enable overvolting (> 1120 mV)
constexpr u32 CpuMaxClock = 2397000;
// CPU max voltage
constexpr u32 CpuMaxVoltage = 1220;
static_assert(CpuMaxVoltage <= 1250);
constexpr u32 CpuClkOSLimit = 1785'000;
constexpr u32 CpuClkOfficial = 1963'500;
constexpr u32 GpuClkOfficial = 1267'200;
constexpr u32 CpuVoltOfficial = 1120;
constexpr u32 MemClkOSLimit = 1600'000;
inline void PatchOffset(uintptr_t offset, u32 value) {
*(reinterpret_cast<u32 *>(offset)) = value;
}
inline void PatchOffset(u32* offset, u32 value) {
*(offset) = value;
}
#define ResultFailure() -1
namespace pcv { namespace pcv {
typedef struct { typedef struct {
@@ -21,13 +61,13 @@ namespace pcv {
} cvb_coefficients; } cvb_coefficients;
typedef struct { typedef struct {
u64 freq = 0; u64 freq;
cvb_coefficients cvb_dfll_param; cvb_coefficients cvb_dfll_param;
cvb_coefficients cvb_pll_param; // only c0 is reserved cvb_coefficients cvb_pll_param; // only c0 is reserved
} cpu_freq_cvb_table_t; } cpu_freq_cvb_table_t;
typedef struct { typedef struct {
u64 freq = 0; u64 freq;
cvb_coefficients cvb_dfll_param; // empty, dfll clock source not selected cvb_coefficients cvb_dfll_param; // empty, dfll clock source not selected
cvb_coefficients cvb_pll_param; cvb_coefficients cvb_pll_param;
} gpu_cvb_pll_table_t; } gpu_cvb_pll_table_t;
@@ -38,37 +78,18 @@ namespace pcv {
} emc_dvb_dvfs_table_t; } emc_dvb_dvfs_table_t;
/* CPU */ /* CPU */
constexpr u32 CpuVoltageLimitOffsets[][11] = { constexpr u32 NewCpuVoltageScaled = CpuMaxVoltage * 1000;
// { 0xE1A8C, 0xE1A98, 0xE1AA4, 0xE1AB0, 0xE1AF8, 0xE1B04, 0xE1B10, 0xE1B1C, 0xE1B28, 0xE1B34, 0xE1F4C },
// { 0xF08DC, 0xF08E8, 0xF08F4, 0xF0900, 0xF0948, 0xF0954, 0xF0960, 0xF096C, 0xF0978, 0xF0984, 0xF0D9C },
{ 0xF092C, 0xF0938, 0xF0944, 0xF0950, 0xF0998, 0xF09A4, 0xF09B0, 0xF09BC, 0xF09C8, 0xF09D4, 0xF0DEC },
};
constexpr u32 NewCpuVoltageLimit = 1220;
static_assert(NewCpuVoltageLimit <= 1300); //1300mV hangs for me
constexpr u32 CpuVoltageOldTableCoeff[][10] = {
// { 0xE2140, 0xE2178, 0xE21B0, 0xE21E8, 0xE2220, 0xE2258, 0xE2290, 0xE22C8, 0xE2300, 0xE2338 },
// { 0xF0F90, 0xF0FC8, 0xF1000, 0xF1038, 0xF1070, 0xF10A8, 0xF10E0, 0xF1118, 0xF1150, 0xF1188 },
{ 0xF0FE0, 0xF1018, 0xF1050, 0xF1088, 0xF10C0, 0xF10F8, 0xF1130, 0xF1168, 0xF11A0, 0xF11D8 },
};
constexpr u32 CpuVoltageScale = 1000;
constexpr u32 NewCpuVoltageScaled = NewCpuVoltageLimit * CpuVoltageScale;
constexpr u32 CpuTablesFreeSpace[] = {
// 0xE2350,
// 0xF11A0,
0xF11F0,
};
constexpr cpu_freq_cvb_table_t NewCpuTables[] = { constexpr cpu_freq_cvb_table_t NewCpuTables[] = {
// OldCpuTables // OldCpuTables
// { 204000, { 721589, -12695, 27 }, { 1120000 } }, // { 204000, { 721589, -12695, 27 }, {} },
// { 306000, { 747134, -14195, 27 }, { 1120000 } }, // { 306000, { 747134, -14195, 27 }, {} },
// { 408000, { 776324, -15705, 27 }, { 1120000 } }, // { 408000, { 776324, -15705, 27 }, {} },
// { 510000, { 809160, -17205, 27 }, { 1120000 } }, // { 510000, { 809160, -17205, 27 }, {} },
// { 612000, { 845641, -18715, 27 }, { 1120000 } }, // { 612000, { 845641, -18715, 27 }, {} },
// { 714000, { 885768, -20215, 27 }, { 1120000 } }, // { 714000, { 885768, -20215, 27 }, {} },
// { 816000, { 929540, -21725, 27 }, { 1120000 } }, // { 816000, { 929540, -21725, 27 }, {} },
// { 918000, { 976958, -23225, 27 }, { 1120000 } }, // { 918000, { 976958, -23225, 27 }, {} },
// { 1020000, { 1028021, -24725, 27 }, { 1120000 } }, // { 1020000, { 1028021, -24725, 27 }, { 1120000 } },
// { 1122000, { 1082730, -26235, 27 }, { 1120000 } }, // { 1122000, { 1082730, -26235, 27 }, { 1120000 } },
// { 1224000, { 1141084, -27735, 27 }, { 1120000 } }, // { 1224000, { 1141084, -27735, 27 }, { 1120000 } },
@@ -86,29 +107,15 @@ namespace pcv {
}; };
static_assert(sizeof(NewCpuTables) <= sizeof(cpu_freq_cvb_table_t)*14); static_assert(sizeof(NewCpuTables) <= sizeof(cpu_freq_cvb_table_t)*14);
constexpr u32 MaxCpuClockOffset[] = {
// 0xE2740,
// 0xF1590,
0xF15E0,
};
constexpr u32 NewMaxCpuClock = 2397000;
/* GPU */ /* GPU */
// constexpr u32 GpuVoltageLimitOffsets[] = {
// // 0xE3044,
// // 0xF1E94,
// 0xF1EE4,
// };
// constexpr u32 NewGpuVoltageLimit = 1170; // default max 1050mV
constexpr u32 GpuTablesFreeSpace[] = {
// 0xE3410,
// 0xF2260,
0xF22B0,
};
// No way to correctly derive c0-c5 coefficients, as coefficients >= 1152000 only make sense
constexpr gpu_cvb_pll_table_t NewGpuTables[] = { constexpr gpu_cvb_pll_table_t NewGpuTables[] = {
// OldGpuTables // OldGpuTables
// { 76800, {}, { 610000, } },
// { 153600, {}, { 610000, } },
// { 230400, {}, { 610000, } },
// { 307200, {}, { 610000, } },
// { 384000, {}, { 610000, } },
// { 460800, {}, { 610000, } },
// { 537600, {}, { 801688, -10900, -163, 298, -10599, 162 } }, // { 537600, {}, { 801688, -10900, -163, 298, -10599, 162 } },
// { 614400, {}, { 824214, -5743, -452, 238, -6325, 81 } }, // { 614400, {}, { 824214, -5743, -452, 238, -6325, 81 } },
// { 691200, {}, { 848830, -3903, -552, 119, -4030, -2 } }, // { 691200, {}, { 848830, -3903, -552, 119, -4030, -2 } },
@@ -124,61 +131,26 @@ namespace pcv {
}; };
static_assert(sizeof(NewGpuTables) <= sizeof(gpu_cvb_pll_table_t)*15); static_assert(sizeof(NewGpuTables) <= sizeof(gpu_cvb_pll_table_t)*15);
constexpr u32 Reg1MaxGpuOffset[] = { /* GPU Max Clock asm Pattern:
// 0x2E0AC,
// 0x3F6CC,
0x3F12C,
};
constexpr u8 Reg1NewMaxGpuClock[][0xC] = {
/* Original: 1228.8MHz
* *
* MOV W13,#0x1000 * MOV W11, #0x1000 MOV (wide immediate) 0x1000 0xB (11)
* MOVK W13,#0xE,LSL #16 * sf | opc | | hw | imm16 | Rd
* ADD X13, X13, #0x4B,LSL#12 * #31 |30 29|28 27 26 25 24 23|22 21|20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 |4 3 2 1 0
* 0 | 1 0 | 1 0 0 1 0 1| 0 0| 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 |0 1 0 1 1
* *
* Bump to 1536MHz * MOVK W11, #0xE, LSL#16 <shift>16 0xE 0xB (11)
* * sf | opc | | hw | imm16 | Rd
* MOV W13,#0x7000 * #31 |30 29|28 27 26 25 24 23|22 21|20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 |4 3 2 1 0
* MOVK W13,#0x17,LSL #16 * 0 | 1 1 | 1 0 0 1 0 1| 0 1| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 |0 1 0 1 1
* NOP
*/ */
// { 0x0D, 0x00, 0x8E, 0x52, 0xED, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 }, constexpr u32 gpuOfficialMarikoPattern[2] = { 0x52820000, 0x72A001C0 }; // 921.6 MHz
// { 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 }, u32 gpuMaxClockMarikoPattern[2] = { 0x528E0000, 0x72A002E0 }; // 1536 MHz
{ 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 }, #define COMPARE_HIGH(val1, val2, bit_div) (((val1 ^ val2) >> bit_div) == 0)
};
constexpr u32 Reg2MaxGpuOffset[] = {
// 0x2E110,
// 0x3F730,
0x3F190,
};
constexpr u8 Reg2NewMaxGpuClock[][0x8] = {
/* Original: 921.6MHz
*
* MOV W13,#0x1000
* MOVK W13,#0xE,LSL #16
*
* Bump to 1536MHz
*
* MOV W13,#0x7000
* MOVK W13,#0x17,LSL #16
*/
// { 0x0D, 0x00, 0x8E, 0x52, 0xED, 0x02, 0xA0, 0x72, },
// { 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, },
{ 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, },
};
/* EMC */ /* EMC */
// DvbTable is all about frequency scaling along with CPU core voltage, no need to care about this for now. // DvbTable is all about frequency scaling along with CPU core voltage, no need to care about this for now.
// constexpr u32 EmcDvbTableOffsets[] =
// {
// 0xFFFFFFFF,
// 0xFFFFFFFF,
// 0xF0628,
// };
// constexpr emc_dvb_dvfs_table_t EmcDvbTable[6] = // constexpr emc_dvb_dvfs_table_t EmcDvbTable[6] =
// { // {
// { 204000, { 637, 637, 637, } }, // { 204000, { 637, 637, 637, } },
@@ -189,76 +161,6 @@ namespace pcv {
// { 1600000, { 675, 650, 637, } }, // { 1600000, { 675, 650, 637, } },
// }; // };
constexpr u32 EmcDvb1331[] = {
0xF0688,
};
// Sourced from 13.x pcv module
// 1st regulator table, 0x142778 - 0x143BB4, if mask = 0b0110101
// 2nd regulator table, 0x143BB8 - 0x144FF4, if mask = 0b1010011
// Access pattern:
// BL 0x6C390 // read mask from 0x195588 (.bss section) and return X0 (address of regulator table)
// MOV W8, #0x120 // offset per entry
// (S)MADD(L) X8, X22, X8, X0 // X8 = X22 * X8 + X0, X22 is regulator entry ID (0x11 for max77812_dram)
// LDR W8, [X8, #0x10] // read maxim regulator identifier
// CMP W8, #3
// B.EQ ...
// 1st regulator table:
// 0x143A98 2 #0x0
// 0x143A9C 0 #0x4
// 0x143AA0 "max77812_dram" #0x8
// 0x143AA8 3 #0x10 // maxim regulator identifier ( 1 = max77620, 2 = max77621, 3 = max77812)
// 0x143AAC 0 #0x14
// 0x143AB0 5000 #0x18 // voltage step
// 0x143AB4 0 #0x1C
// 0x143AB8 250000 #0x20 // min voltage
// 0x143ABC 1525000 #0x24 // max voltage
// 0x143AC0 0 #0x28 // voltage multiplier ( * step )
// 0x143AC4 600000 #0x2C
// 0x142898 1 #0x0
// 0x14289C 0 #0x4
// 0x1428A0 "max77620_sd1" #0x8
// 0x1428A8 1 #0x10 // maxim regulator identifier ( 1 = max77620, 2 = max77621, 3 = max77812)
// 0x1428AC 23 #0x14
// 0x1428B0 12500 #0x18 // voltage step
// 0x1428B4 600000 #0x1C
// 0x1428B8 1125000 #0x20 // min voltage, default Vddq for Erista EMC
// 0x1428BC 1125000 #0x24 // max voltage, default Vddq for Erista EMC
// 0x1428C0 0 #0x28
// 0x1428C4 0 #0x2C
// HOS does not seem to change DRAM voltage on Mariko (validate only)
// void EnableVddMemory() in Atmosphere/libraries/libexosphere/source/pmic/pmic_api.cpp:
// /* On Erista, set Sd1 voltage. */
// if (soc_type == fuse::SocType_Erista) {
// SetVoltage(Max77620RegisterSd1, 1100);
// }
// in hekate/bdk/power/max77812.h:
// #define MAX77812_REG_M3_VOUT 0x25 // DRAM on PHASE211.
// 3 outputs (CPU/GPU/DRAM) from max77812. Does PHASE31 mode exist?
// If so, read/query max77812 pmic via i2c for voltage info in hekate and get DRAM reg on PHASE31.
// max77812 document: https://datasheets.maximintegrated.com/en/ds/MAX77812.pdf
// Mariko have 3 mtc tables (204/1331/1600 MHz), only these 3 frequencies could be set.
constexpr u32 EmcFreqOffsets[][30] = {
// { 0xD7C60, 0xD7C68, 0xD7C70, 0xD7C78, 0xD7C80, 0xD7C88, 0xD7C90, 0xD7C98, 0xD7CA0, 0xD7CA8, 0xE1800, 0xEEFA0, 0xF2478, 0xFE284, 0x10A304, 0x10D7DC, 0x110A40, 0x113CA4, 0x116F08, 0x11A16C, 0x11D3D0, 0x120634, 0x123898, 0x126AFC, 0x129D60, 0x12CFC4, 0x130228, 0x13BFE0, 0x140D00, 0x140D50, },
// { 0xE1810, 0xE6530, 0xE6580, 0xE6AB0, 0xE6AB8, 0xE6AC0, 0xE6AC8, 0xE6AD0, 0xE6AD8, 0xE6AE0, 0xE6AE8, 0xE6AF0, 0xE6AF8, 0xF0650, 0xFDDF0, 0x1012C8, 0x10D0D4, 0x119154, 0x11C62C, 0x11F890, 0x122AF4, 0x125D58, 0x128FBC, 0x12C220, 0x12F484, 0x1326E8, 0x13594C, 0x138BB0, 0x13BE14, 0x13F078, },
{ 0xE1860, 0xE6580, 0xE65D0, 0xE6B00, 0xE6B08, 0xE6B10, 0xE6B18, 0xE6B20, 0xE6B28, 0xE6B30, 0xE6B38, 0xE6B40, 0xE6B48, 0xF06A0, 0xFDE40, 0x101318, 0x10D124, 0x1191A4, 0x11C67C, 0x11F8E0, 0x122B44, 0x125DA8, 0x12900C, 0x12C270, 0x12F4D4, 0x132738, 0x13599C, 0x138C00, 0x13BE64, 0x13F0C8, },
};
// Mariko mtc tables starting from rev, see mtc_timing_table.hpp for parameters.
// All mariko mtc tables will be patched to simplify the procedure.
constexpr u32 MtcTable_1600[][13] = {
{ 0x1012D8, 0x11C63C, 0x11F8A0, 0x122B04, 0x125D68, 0x128FCC, 0x12C230, 0x12F494, 0x1326F8, 0x13595C, 0x138BC0, 0x13BE24, 0x13F088 },
};
constexpr u32 MtcTableOffset = 0x10CC;
#include "mtc_timing_table.hpp" #include "mtc_timing_table.hpp"
void AdjustMtcTable(MarikoMtcTable* table, MarikoMtcTable* ref) void AdjustMtcTable(MarikoMtcTable* table, MarikoMtcTable* ref)
@@ -280,7 +182,7 @@ namespace pcv {
* you'd better calculate timings yourself rather than relying on following algorithm. * you'd better calculate timings yourself rather than relying on following algorithm.
*/ */
#define ADJUST_PARAM(TARGET, REF) TARGET = std::ceil(REF + ((GetEmcClock()-1331200)*(TARGET-REF))/(1600000-1331200)); #define ADJUST_PARAM(TARGET, REF) TARGET = std::ceil(REF + ((EmcClock-1331200)*(TARGET-REF))/(1600000-1331200));
#define ADJUST_PARAM_TABLE(TABLE, PARAM, REF) ADJUST_PARAM(TABLE->PARAM, REF->PARAM) #define ADJUST_PARAM_TABLE(TABLE, PARAM, REF) ADJUST_PARAM(TABLE->PARAM, REF->PARAM)
@@ -294,8 +196,10 @@ namespace pcv {
TABLE->shadow_regs_ca_train.PARAM = VALUE; \ TABLE->shadow_regs_ca_train.PARAM = VALUE; \
TABLE->shadow_regs_rdwr_train.PARAM = VALUE; TABLE->shadow_regs_rdwr_train.PARAM = VALUE;
// tCK_avg (average clock period) in ns (10E-3 ns) /* Timings that are available in or can be derived from LPDDR4X datasheet or TRM */
const double tCK_avg = GetEmcClock() == 2131200 ? 0.468 : 1000'000. / GetEmcClock(); {
// tCK_avg (average clock period) in ns
const double tCK_avg = (EmcClock == 2131200) ? 0.468 : 1000'000. / EmcClock;
// tRPpb (row precharge time per bank) in ns // tRPpb (row precharge time per bank) in ns
const u32 tRPpb = 18; const u32 tRPpb = 18;
// tRPab (row precharge time all banks) in ns // tRPab (row precharge time all banks) in ns
@@ -311,7 +215,7 @@ namespace pcv {
// tRCD (RAS-CAS delay) in ns // tRCD (RAS-CAS delay) in ns
const u32 tRCD = 18; const u32 tRCD = 18;
// tRRD (Active bank-A to Active bank-B) in ns // tRRD (Active bank-A to Active bank-B) in ns
const double tRRD = GetEmcClock() == 2131200 ? 7.5 : 10.; const double tRRD = (EmcClock == 2131200) ? 7.5 : 10.;
// tREFpb (average refresh interval per bank) in ns for 8Gb density // tREFpb (average refresh interval per bank) in ns for 8Gb density
const u32 tREFpb = 488; const u32 tREFpb = 488;
// tREFab (average refresh interval all 8 banks) in ns for 8Gb density // tREFab (average refresh interval all 8 banks) in ns for 8Gb density
@@ -321,7 +225,7 @@ namespace pcv {
// {REFRESH, REFRESH_LO} = max[(tREF/#_of_rows) / (emc_clk_period) - 64, (tREF/#_of_rows) / (emc_clk_period) * 97%] // {REFRESH, REFRESH_LO} = max[(tREF/#_of_rows) / (emc_clk_period) - 64, (tREF/#_of_rows) / (emc_clk_period) * 97%]
// emc_clk_period = dram_clk / 2; // emc_clk_period = dram_clk / 2;
// 1600 MHz: 5894, but N' set to 6176 (~4.8% margin) // 1600 MHz: 5894, but N' set to 6176 (~4.8% margin)
const u32 REFRESH = std::ceil((double(tREFpb) * GetEmcClock() / numOfRows * (1.048) / 2 - 64)) / 4 * 4; const u32 REFRESH = std::ceil((double(tREFpb) * EmcClock / numOfRows * (1.048) / 2 - 64)) / 4 * 4;
// tPDEX2WR, tPDEX2RD (timing delay from exiting powerdown mode to a write/read command) in ns // tPDEX2WR, tPDEX2RD (timing delay from exiting powerdown mode to a write/read command) in ns
const u32 tPDEX2 = 10; const u32 tPDEX2 = 10;
// [Guessed] tACT2PDEN (timing delay from an activate, MRS or EMRS command to power-down entry) in ns // [Guessed] tACT2PDEN (timing delay from an activate, MRS or EMRS command to power-down entry) in ns
@@ -339,7 +243,7 @@ namespace pcv {
// [Guessed] tPD (minimum CKE low pulse width in power-down mode) in ns // [Guessed] tPD (minimum CKE low pulse width in power-down mode) in ns
const double tPD = 7.5; const double tPD = 7.5;
// tFAW (Four-bank Activate Window) in ns // tFAW (Four-bank Activate Window) in ns
const u32 tFAW = GetEmcClock() == 2131200 ? 30 : 40; const u32 tFAW = (EmcClock == 2131200) ? 30 : 40;
#define GET_CYCLE_CEIL(PARAM) std::ceil(double(PARAM) / tCK_avg) #define GET_CYCLE_CEIL(PARAM) std::ceil(double(PARAM) / tCK_avg)
@@ -348,14 +252,6 @@ namespace pcv {
WRITE_PARAM_ALL_REG(table, emc_rfcpb, GET_CYCLE_CEIL(tRFCpb)); WRITE_PARAM_ALL_REG(table, emc_rfcpb, GET_CYCLE_CEIL(tRFCpb));
WRITE_PARAM_ALL_REG(table, emc_ras, GET_CYCLE_CEIL(tRAS)); WRITE_PARAM_ALL_REG(table, emc_ras, GET_CYCLE_CEIL(tRAS));
WRITE_PARAM_ALL_REG(table, emc_rp, GET_CYCLE_CEIL(tRPpb)); WRITE_PARAM_ALL_REG(table, emc_rp, GET_CYCLE_CEIL(tRPpb));
ADJUST_PARAM_ALL_REG(table, emc_r2w, ref);
ADJUST_PARAM_ALL_REG(table, emc_w2r, ref);
ADJUST_PARAM_ALL_REG(table, emc_r2p, ref);
ADJUST_PARAM_ALL_REG(table, emc_w2p, ref);
ADJUST_PARAM_ALL_REG(table, emc_trtm, ref);
ADJUST_PARAM_ALL_REG(table, emc_twtm, ref);
ADJUST_PARAM_ALL_REG(table, emc_tratm, ref);
ADJUST_PARAM_ALL_REG(table, emc_twatm, ref);
WRITE_PARAM_ALL_REG(table, emc_rd_rcd, GET_CYCLE_CEIL(tRCD)); WRITE_PARAM_ALL_REG(table, emc_rd_rcd, GET_CYCLE_CEIL(tRCD));
WRITE_PARAM_ALL_REG(table, emc_wr_rcd, GET_CYCLE_CEIL(tRCD)); WRITE_PARAM_ALL_REG(table, emc_wr_rcd, GET_CYCLE_CEIL(tRCD));
WRITE_PARAM_ALL_REG(table, emc_rrd, GET_CYCLE_CEIL(tRRD)); WRITE_PARAM_ALL_REG(table, emc_rrd, GET_CYCLE_CEIL(tRRD));
@@ -364,7 +260,6 @@ namespace pcv {
WRITE_PARAM_ALL_REG(table, emc_pdex2wr, GET_CYCLE_CEIL(tPDEX2)); WRITE_PARAM_ALL_REG(table, emc_pdex2wr, GET_CYCLE_CEIL(tPDEX2));
WRITE_PARAM_ALL_REG(table, emc_pdex2rd, GET_CYCLE_CEIL(tPDEX2)); WRITE_PARAM_ALL_REG(table, emc_pdex2rd, GET_CYCLE_CEIL(tPDEX2));
WRITE_PARAM_ALL_REG(table, emc_act2pden,GET_CYCLE_CEIL(tACT2PDEN)); WRITE_PARAM_ALL_REG(table, emc_act2pden,GET_CYCLE_CEIL(tACT2PDEN));
ADJUST_PARAM_ALL_REG(table, emc_rw2pden, ref);
WRITE_PARAM_ALL_REG(table, emc_cke2pden,GET_CYCLE_CEIL(tCKE2PDEN)); WRITE_PARAM_ALL_REG(table, emc_cke2pden,GET_CYCLE_CEIL(tCKE2PDEN));
WRITE_PARAM_ALL_REG(table, emc_pdex2mrr,GET_CYCLE_CEIL(tPDEX2MRR)); WRITE_PARAM_ALL_REG(table, emc_pdex2mrr,GET_CYCLE_CEIL(tPDEX2MRR));
WRITE_PARAM_ALL_REG(table, emc_txsr, GET_CYCLE_CEIL(tXSR)); WRITE_PARAM_ALL_REG(table, emc_txsr, GET_CYCLE_CEIL(tXSR));
@@ -374,38 +269,53 @@ namespace pcv {
WRITE_PARAM_ALL_REG(table, emc_tpd, GET_CYCLE_CEIL(tPD)); WRITE_PARAM_ALL_REG(table, emc_tpd, GET_CYCLE_CEIL(tPD));
WRITE_PARAM_ALL_REG(table, emc_tfaw, GET_CYCLE_CEIL(tFAW)); WRITE_PARAM_ALL_REG(table, emc_tfaw, GET_CYCLE_CEIL(tFAW));
WRITE_PARAM_ALL_REG(table, emc_trpab, GET_CYCLE_CEIL(tRPab)); WRITE_PARAM_ALL_REG(table, emc_trpab, GET_CYCLE_CEIL(tRPab));
ADJUST_PARAM_ALL_REG(table, emc_tclkstop, ref);
WRITE_PARAM_ALL_REG(table, emc_trefbw, REFRESH + 64); WRITE_PARAM_ALL_REG(table, emc_trefbw, REFRESH + 64);
constexpr u32 MC_ARB_DIV = 4; // ?
table->burst_mc_regs.mc_emem_arb_timing_rcd = std::ceil(GET_CYCLE_CEIL(tRCD) / MC_ARB_DIV - 2);
table->burst_mc_regs.mc_emem_arb_timing_rp = std::ceil(GET_CYCLE_CEIL(tRPpb) / MC_ARB_DIV - 1);
table->burst_mc_regs.mc_emem_arb_timing_rc = std::ceil(std::max(GET_CYCLE_CEIL(tRC), GET_CYCLE_CEIL(tRAS)+GET_CYCLE_CEIL(tRPpb))/ MC_ARB_DIV);
table->burst_mc_regs.mc_emem_arb_timing_ras = std::ceil(GET_CYCLE_CEIL(tRAS) / MC_ARB_DIV - 2);
table->burst_mc_regs.mc_emem_arb_timing_faw = std::ceil(GET_CYCLE_CEIL(tFAW) / MC_ARB_DIV - 1);
table->burst_mc_regs.mc_emem_arb_timing_rrd = std::ceil(GET_CYCLE_CEIL(tRRD) / MC_ARB_DIV - 1);
table->burst_mc_regs.mc_emem_arb_timing_rap2pre = std::ceil(table->burst_regs.emc_r2p / MC_ARB_DIV);
table->burst_mc_regs.mc_emem_arb_timing_wap2pre = std::ceil(table->burst_regs.emc_w2p / MC_ARB_DIV);
table->burst_mc_regs.mc_emem_arb_timing_r2w = std::ceil(table->burst_regs.emc_r2w / MC_ARB_DIV + 1);
table->burst_mc_regs.mc_emem_arb_timing_w2r = std::ceil(table->burst_regs.emc_w2r / MC_ARB_DIV + 1);
table->burst_mc_regs.mc_emem_arb_timing_rfcpb = std::ceil(GET_CYCLE_CEIL(tRFCpb) / MC_ARB_DIV + 1); // ?
}
ADJUST_PARAM_ALL_REG(table, emc_r2w, ref);
ADJUST_PARAM_ALL_REG(table, emc_w2r, ref);
ADJUST_PARAM_ALL_REG(table, emc_r2p, ref);
ADJUST_PARAM_ALL_REG(table, emc_w2p, ref);
ADJUST_PARAM_ALL_REG(table, emc_trtm, ref);
ADJUST_PARAM_ALL_REG(table, emc_twtm, ref);
ADJUST_PARAM_ALL_REG(table, emc_tratm, ref);
ADJUST_PARAM_ALL_REG(table, emc_twatm, ref);
ADJUST_PARAM_ALL_REG(table, emc_rw2pden, ref);
ADJUST_PARAM_ALL_REG(table, emc_tclkstop, ref);
ADJUST_PARAM_ALL_REG(table, emc_pmacro_dll_cfg_2, ref); // EMC_DLL_CFG_2_0: level select for VDDA? ADJUST_PARAM_ALL_REG(table, emc_pmacro_dll_cfg_2, ref); // EMC_DLL_CFG_2_0: level select for VDDA?
// ADJUST_PARAM_TABLE(table, dram_timings.rl); // not used on Mariko // ADJUST_PARAM_TABLE(table, dram_timings.rl); // not used on Mariko
constexpr u32 DIV = 4; // ?
table->burst_mc_regs.mc_emem_arb_timing_rcd = std::ceil(GET_CYCLE_CEIL(tRCD) / DIV - 2);
table->burst_mc_regs.mc_emem_arb_timing_rp = std::ceil(GET_CYCLE_CEIL(tRPpb) / DIV - 1);
table->burst_mc_regs.mc_emem_arb_timing_rc = std::ceil(std::max(GET_CYCLE_CEIL(tRC), GET_CYCLE_CEIL(tRAS)+GET_CYCLE_CEIL(tRPpb))/ DIV);
table->burst_mc_regs.mc_emem_arb_timing_ras = std::ceil(GET_CYCLE_CEIL(tRAS) / DIV - 2);
table->burst_mc_regs.mc_emem_arb_timing_faw = std::ceil(GET_CYCLE_CEIL(tFAW) / DIV - 1);
table->burst_mc_regs.mc_emem_arb_timing_rrd = std::ceil(GET_CYCLE_CEIL(tRRD) / DIV - 1);
table->burst_mc_regs.mc_emem_arb_timing_rap2pre = std::ceil(table->burst_regs.emc_r2p / DIV);
table->burst_mc_regs.mc_emem_arb_timing_wap2pre = std::ceil(table->burst_regs.emc_w2p / DIV);
table->burst_mc_regs.mc_emem_arb_timing_r2w = std::ceil(table->burst_regs.emc_r2w / DIV + 1);
table->burst_mc_regs.mc_emem_arb_timing_w2r = std::ceil(table->burst_regs.emc_w2r / DIV + 1);
table->burst_mc_regs.mc_emem_arb_timing_rfcpb = std::ceil(GET_CYCLE_CEIL(tRFCpb) / DIV + 1); // ?
ADJUST_PARAM_TABLE(table, la_scale_regs.mc_mll_mpcorer_ptsa_rate, ref); ADJUST_PARAM_TABLE(table, la_scale_regs.mc_mll_mpcorer_ptsa_rate, ref);
ADJUST_PARAM_TABLE(table, la_scale_regs.mc_ptsa_grant_decrement, ref); ADJUST_PARAM_TABLE(table, la_scale_regs.mc_ptsa_grant_decrement, ref);
// ADJUST_PARAM_TABLE(table, min_mrs_wait); // not used on LPDDR4X // ADJUST_PARAM_TABLE(table, min_mrs_wait); // not used on LPDDR4X
// ADJUST_PARAM_TABLE(table, latency); // not used // ADJUST_PARAM_TABLE(table, latency); // not used
// Calculate DIVM and DIVN (clock DIVisors) /* Patch PLLMB divisors */
{
// Calculate DIVM and DIVN (clock divisors)
// Common PLL oscillator is 38.4 MHz // Common PLL oscillator is 38.4 MHz
// PLLMB_OUT = 38.4 MHz / PLLLMB_DIVM * PLLMB_DIVN // PLLMB_OUT = 38.4 MHz / PLLLMB_DIVM * PLLMB_DIVN
u32 divm = 1; u32 divm = 1;
u32 divn = GetEmcClock() / 38400; u32 divn = EmcClock / 38400;
u32 remainder = GetEmcClock() % 38400; u32 remainder = EmcClock % 38400;
if (remainder >= 38400 * (3/4)) { if (remainder >= 38400 * (3/4)) {
divm = 4; divm = 4;
divn = divn * divm + 3; divn = divn * divm + 3;
@@ -427,9 +337,9 @@ namespace pcv {
divn = divn * divm + 1; divn = divn * divm + 1;
} }
/* Patch PLLMB divisors */
table->pllmb_divm = divm; table->pllmb_divm = divm;
table->pllmb_divn = divn; table->pllmb_divn = divn;
}
#ifdef EXPERIMENTAL #ifdef EXPERIMENTAL
{ {
@@ -481,7 +391,7 @@ namespace pcv {
| ADJUST_BIT(TARGET_TABLE->shadow_regs_rdwr_train.PARAM, REF_TABLE->shadow_regs_rdwr_train.PARAM, HIGH2, LOW2) << LOW2; | ADJUST_BIT(TARGET_TABLE->shadow_regs_rdwr_train.PARAM, REF_TABLE->shadow_regs_rdwr_train.PARAM, HIGH2, LOW2) << LOW2;
/* For latency allowance */ /* For latency allowance */
#define ADJUST_INVERSE(TARGET) ((TARGET*1000) / (GetEmcClock()/1600)) #define ADJUST_INVERSE(TARGET) ((TARGET*1000) / (EmcClock/1600))
/* emc_wdv, emc_wsv, emc_wev, emc_wdv_mask, /* emc_wdv, emc_wsv, emc_wev, emc_wdv_mask,
emc_quse, emc_quse_width, emc_ibdly, emc_obdly, emc_quse, emc_quse_width, emc_ibdly, emc_obdly,
@@ -781,20 +691,289 @@ namespace pcv {
#endif #endif
} }
/* Unlock the second sub-partition for retail Mariko, and double the bandwidth (~60GB/s) Result PcvCpuClockVddHandler(u32* ptr) {
* https://github.com/CTCaer/hekate/blob/01b6e645b3cb69ddf28cc9eff40c4b35bf03dbd4/bdk/mem/sdram.h#L30 u32 value_next2 = *(ptr + 2);
* constexpr u32 cpuClockVddCpuPatternNext = 0;
* Sub-partitions are defined as ranks, so there is no other way than replacing DRAM chips. if (value_next2 != cpuClockVddCpuPatternNext)
*/ {
return ResultFailure();
}
PatchOffset(ptr, CpuMaxClock);
return ResultSuccess();
}
Result PcvCpuDvfsHandler(cpu_freq_cvb_table_t* entry_1963, uintptr_t nso_end_offset) {
cpu_freq_cvb_table_t* entry_free = entry_1963 + 1;
cpu_freq_cvb_table_t* entry_204 = entry_free - 18;
uintptr_t entry_end_offset = reinterpret_cast<uintptr_t>(entry_free) + sizeof(NewCpuTables) - sizeof(u32);
if ( entry_end_offset >= nso_end_offset
|| *(reinterpret_cast<u32 *>(entry_free)) != 0
|| *(reinterpret_cast<u32 *>(entry_204)) != 204'000
|| *(reinterpret_cast<u32 *>(entry_end_offset)) != 0 )
{
return ResultFailure();
}
std::memcpy(reinterpret_cast<void *>(entry_free), NewCpuTables, sizeof(NewCpuTables));
// Patch CPU max volt in CPU dvfs table
for (u32 i = 0; i < 10; i++)
{
cpu_freq_cvb_table_t* entry_current = entry_1963 - i;
u32* pll_max_volt = reinterpret_cast<u32 *>(std::addressof(entry_current->cvb_pll_param));
if (*pll_max_volt != CpuVoltOfficial * 1000)
return ResultFailure();
PatchOffset(pll_max_volt, NewCpuVoltageScaled);
}
return ResultSuccess();
}
Result PcvGpuDvfsHandler(gpu_cvb_pll_table_t* entry_1267, uintptr_t nso_end_offset) {
gpu_cvb_pll_table_t* entry_free = entry_1267 + 1;
gpu_cvb_pll_table_t* entry_76_8 = entry_free - 17;
uintptr_t entry_end_offset = reinterpret_cast<uintptr_t>(entry_free) + sizeof(NewGpuTables) - sizeof(u32);
if ( entry_end_offset >= nso_end_offset
|| *(reinterpret_cast<u32 *>(entry_free)) != 0
|| *(reinterpret_cast<u32 *>(entry_76_8)) != 76'800
|| *(reinterpret_cast<u32 *>(entry_end_offset)) != 0 )
{
return ResultFailure();
}
std::memcpy(reinterpret_cast<void *>(entry_free), NewGpuTables, sizeof(NewGpuTables));
return ResultSuccess();
}
Result PcvCpuVoltRangeHandler(u32* ptr) {
const std::vector<u32> acceptableCpuMinVolt = { 800, 637, 620, 610 };
u32 value_cpu_min_volt = *(ptr - 1);
for (const auto &min_volt : acceptableCpuMinVolt)
{
if (min_volt == value_cpu_min_volt)
{
PatchOffset(ptr, CpuMaxVoltage);
return ResultSuccess();
}
}
return ResultFailure();
}
Result PcvGpuMaxClockMarikoAsmHandler(u32* ptr) {
u32 value = *(ptr);
u32* ptr_next = ptr + 1;
u32 value_next = *(ptr_next);
if (COMPARE_HIGH(value_next, gpuOfficialMarikoPattern[1], 5))
{
u32 reg_id = value & ((1 << 5) - 1);
u32 reg_id_next = value_next & ((1 << 5) - 1);
if (reg_id == reg_id_next)
{
PatchOffset(ptr , gpuMaxClockMarikoPattern[0] | reg_id);
PatchOffset(ptr_next, gpuMaxClockMarikoPattern[1] | reg_id);
return ResultSuccess();
}
}
return ResultFailure();
}
Result PcvMemHandler(uintptr_t ptr, bool isMariko) {
if (isMariko)
{
// Mariko have 3 mtc tables (204/1331/1600 MHz), only these 3 frequencies could be set.
// Replace 1331 MHz with 1600 MHz as perf @ 1331 MHz is crap.
u32 value_next = *(reinterpret_cast<u32 *>(ptr) + 1);
u32 value_next2 = *(reinterpret_cast<u32 *>(ptr) + 2);
constexpr u32 mtc_min_volt = 1100;
constexpr u32 dvb_entry_volt = 675;
constexpr u32 mtc_table_rev = 3;
constexpr u32 mem_1331_khz = 1331'200;
if (value_next == mtc_min_volt)
{
uintptr_t offset_new = ptr - offsetof(MarikoMtcTable, rate_khz);
uintptr_t offset_old = offset_new - sizeof(MarikoMtcTable);
MarikoMtcTable* const mtc_table_new = reinterpret_cast<MarikoMtcTable *>(offset_new);
MarikoMtcTable* const mtc_table_old = reinterpret_cast<MarikoMtcTable *>(offset_old);
if ( mtc_table_new->rev != mtc_table_rev
|| mtc_table_old->rev != mtc_table_rev
|| mtc_table_old->rate_khz != mem_1331_khz )
return ResultFailure();
std::memcpy(reinterpret_cast<void *>(mtc_table_old), reinterpret_cast<void *>(mtc_table_new), sizeof(MarikoMtcTable));
// Adjust params for Max MHz
// [!TODO] ref table is identical to new table, leaving some params unchanged
AdjustMtcTable(mtc_table_new, mtc_table_old);
}
else if (value_next2 == dvb_entry_volt)
{
emc_dvb_dvfs_table_t* dvb_max_entry = reinterpret_cast<emc_dvb_dvfs_table_t *>(ptr);
emc_dvb_dvfs_table_t* dvb_1331_entry = dvb_max_entry - 1;
u32* dvb_1331_offset = reinterpret_cast<u32 *>(dvb_1331_entry);
if (*(dvb_1331_offset) != mem_1331_khz)
return ResultFailure();
PatchOffset(dvb_1331_offset, MemClkOSLimit);
}
}
PatchOffset(ptr, EmcClock);
return ResultSuccess();
}
void ApplyAutoPcvPatch(uintptr_t mapped_nso, size_t nso_size) {
/* Abort immediately once something goes wrong */
bool isMariko = (spl::GetSocType() == spl::SocType_Mariko);
u8 cpuClockVddMariko {};
u8 cpuTableMariko {};
u8 gpuTableMariko {};
u8 cpuMaxVoltMariko {};
u8 gpuMaxClockMariko {};
uintptr_t ptr = mapped_nso;
while (ptr <= mapped_nso + nso_size - sizeof(MarikoMtcTable))
{
u32 value = *(reinterpret_cast<u32 *>(ptr));
if (isMariko)
{
if (value == CpuClkOSLimit)
{
if (R_SUCCEEDED(PcvCpuClockVddHandler(reinterpret_cast<u32 *>(ptr))))
cpuClockVddMariko++;
}
if (value == CpuClkOfficial)
{
if (R_SUCCEEDED(PcvCpuDvfsHandler(reinterpret_cast<cpu_freq_cvb_table_t *>(ptr), mapped_nso + nso_size)))
cpuTableMariko++;
}
if (value == GpuClkOfficial)
{
if (R_SUCCEEDED(PcvGpuDvfsHandler(reinterpret_cast<gpu_cvb_pll_table_t *>(ptr), mapped_nso + nso_size)))
gpuTableMariko++;
}
if (value == CpuVoltOfficial)
{
if (R_SUCCEEDED(PcvCpuVoltRangeHandler(reinterpret_cast<u32 *>(ptr))))
cpuMaxVoltMariko++;
}
if (COMPARE_HIGH(value, gpuOfficialMarikoPattern[0], 5))
{
if (R_SUCCEEDED(PcvGpuMaxClockMarikoAsmHandler(reinterpret_cast<u32 *>(ptr))))
gpuMaxClockMariko++;
}
}
if (value == MemClkOSLimit)
{
if (R_FAILED(PcvMemHandler(ptr, isMariko)))
AMS_ABORT();
}
ptr += sizeof(u32);
}
if (isMariko)
{
constexpr u8 cpuMaxVoltMarikoMaxCnt = 13;
constexpr u8 gpuMaxClockMarikoReqCnt = 2;
if (cpuClockVddMariko != 1)
AMS_ABORT();
if (cpuTableMariko != 1)
AMS_ABORT();
if (gpuTableMariko != 1)
AMS_ABORT();
if (cpuMaxVoltMariko > cpuMaxVoltMarikoMaxCnt || !cpuMaxVoltMariko)
AMS_ABORT();
if (gpuMaxClockMariko != gpuMaxClockMarikoReqCnt)
AMS_ABORT();
}
}
} }
namespace ptm { namespace ptm {
constexpr u32 EmcOffsetStart[] = { typedef struct {
// 0xC5E24, u32 conf_id;
0xA032C, u32 cpu_freq_1;
}; u32 cpu_freq_2;
u32 gpu_freq_1;
u32 gpu_freq_2;
u32 emc_freq_1;
u32 emc_freq_2;
u32 padding;
} perf_conf_entry;
static_assert(sizeof(perf_conf_entry) == 0x20);
constexpr u32 OffsetInterval = 0x20; void ApplyAutoPtmPatch(uintptr_t mapped_nso, size_t nso_size) {
/* No abort here as ptm is not that critical */
if (spl::GetSocType() == spl::SocType_Erista)
return;
perf_conf_entry* confTable = 0;
constexpr u32 entryCnt = 16;
constexpr u32 memPtmLimit = MemClkOSLimit * 1000;
constexpr u32 memPtmMax = EmcClock * 1000;
uintptr_t ptr = mapped_nso;
while (ptr <= mapped_nso + nso_size)
{
u32 value = *(reinterpret_cast<u32 *>(ptr));
if (value == memPtmLimit)
{
confTable = reinterpret_cast<perf_conf_entry *>(ptr - offsetof(perf_conf_entry, emc_freq_1));
uintptr_t confTableEntryNew = reinterpret_cast<uintptr_t>(confTable + entryCnt);
if (confTableEntryNew > mapped_nso + nso_size)
return;
break;
}
ptr += sizeof(u32);
}
if (!confTable)
return;
for (u32 i = 0; i < entryCnt; i++)
{
perf_conf_entry* PerfConfEntryCurrent = confTable + i;
if (PerfConfEntryCurrent->emc_freq_1 != PerfConfEntryCurrent->emc_freq_2)
return;
switch (PerfConfEntryCurrent->emc_freq_1)
{
case memPtmLimit:
PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_1), memPtmMax);
PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_2), memPtmMax);
break;
case 1331'200'000:
case 1065'600'000:
PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_1), memPtmLimit);
PatchOffset(std::addressof(PerfConfEntryCurrent->emc_freq_2), memPtmLimit);
break;
default:
return;
}
}
}
}
constexpr u32 CpuBoostOffset = 0x170;
} }

232
Source/Atmosphere/stratosphere/loader/source/ldr_patcher.cpp
View File

@@ -1,232 +0,0 @@
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stratosphere.hpp>
#include "ldr_patcher.hpp"
namespace ams::ldr {
namespace {
constexpr const char *NsoPatchesDirectory = "exefs_patches";
/* Exefs patches want to prevent modification of header, */
/* and also want to adjust offset relative to mapped location. */
constexpr size_t NsoPatchesProtectedSize = sizeof(NsoHeader);
constexpr size_t NsoPatchesProtectedOffset = sizeof(NsoHeader);
constexpr const char * const LoaderSdMountName = "#amsldr-sdpatch";
static_assert(sizeof(LoaderSdMountName) <= fs::MountNameLengthMax);
constinit os::SdkMutex g_ldr_sd_lock;
constinit bool g_mounted_sd;
constinit os::SdkMutex g_embedded_patch_lock;
constinit bool g_got_embedded_patch_settings;
constinit bool g_force_enable_usb30;
bool EnsureSdCardMounted() {
std::scoped_lock lk(g_ldr_sd_lock);
if (g_mounted_sd) {
return true;
}
if (!cfg::IsSdCardInitialized()) {
return false;
}
if (R_FAILED(fs::MountSdCard(LoaderSdMountName))) {
return false;
}
return (g_mounted_sd = true);
}
bool IsUsb30ForceEnabled() {
std::scoped_lock lk(g_embedded_patch_lock);
if (!g_got_embedded_patch_settings) {
g_force_enable_usb30 = spl::IsUsb30ForceEnabled();
g_got_embedded_patch_settings = true;
}
return g_force_enable_usb30;
}
u32 GetEmcClock() {
// RAM freqs from Hekate:
// 1862400, 1894400, 1932800, 1996800, 2064000, 2099200, 2131200
// Other values might work as well
// RAM overclock could be UNSTABLE and generate graphical glitches / instabilities / NAND corruption
return 1862400;
}
// u32 GetCpuBoostClock() {
// return 1963500;
// }
consteval u8 ParseNybble(char c) {
AMS_ASSUME(('0' <= c && c <= '9') || ('A' <= c && c <= 'F') || ('a' <= c && c <= 'f'));
if ('0' <= c && c <= '9') {
return c - '0' + 0x0;
} else if ('A' <= c && c <= 'F') {
return c - 'A' + 0xA;
} else /* if ('a' <= c && c <= 'f') */ {
return c - 'a' + 0xa;
}
}
consteval ro::ModuleId ParseModuleId(const char *str) {
/* Parse a static module id. */
ro::ModuleId module_id = {};
size_t ofs = 0;
while (str[0] != 0) {
AMS_ASSUME(ofs < sizeof(module_id));
AMS_ASSUME(str[1] != 0);
module_id.data[ofs] = (ParseNybble(str[0]) << 4) | (ParseNybble(str[1]) << 0);
str += 2;
ofs++;
}
return module_id;
}
struct EmbeddedPatchEntry {
uintptr_t offset;
const void * const data;
size_t size;
};
struct EmbeddedPatch {
ro::ModuleId module_id;
size_t num_entries;
const EmbeddedPatchEntry *entries;
};
#include "ldr_embedded_usb_patches.inc"
}
#include "ldr_oc_patch.hpp"
/* Apply IPS patches. */
void LocateAndApplyIpsPatchesToModule(const u8 *module_id_data, uintptr_t mapped_nso, size_t mapped_size) {
if (!EnsureSdCardMounted()) {
return;
}
ro::ModuleId module_id;
std::memcpy(std::addressof(module_id.data), module_id_data, sizeof(module_id.data));
ams::patcher::LocateAndApplyIpsPatchesToModule(LoaderSdMountName, NsoPatchesDirectory, NsoPatchesProtectedSize, NsoPatchesProtectedOffset, std::addressof(module_id), reinterpret_cast<u8 *>(mapped_nso), mapped_size);
}
/* Apply embedded patches. */
void ApplyEmbeddedPatchesToModule(const u8 *module_id_data, uintptr_t mapped_nso, size_t mapped_size) {
/* Make module id. */
ro::ModuleId module_id;
std::memcpy(std::addressof(module_id.data), module_id_data, sizeof(module_id.data));
if (IsUsb30ForceEnabled()) {
for (const auto &patch : Usb30ForceEnablePatches) {
if (std::memcmp(std::addressof(patch.module_id), std::addressof(module_id), sizeof(module_id)) == 0) {
for (size_t i = 0; i < patch.num_entries; ++i) {
const auto &entry = patch.entries[i];
if (entry.offset + entry.size <= mapped_size) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + entry.offset), entry.data, entry.size);
}
}
}
}
}
u32 EmcClock = GetEmcClock();
if (spl::GetSocType() == spl::SocType_Mariko && EmcClock) {
for (u32 i = 0; i < sizeof(PcvModuleId)/sizeof(ro::ModuleId); i++) {
if (std::memcmp(std::addressof(PcvModuleId[i]), std::addressof(module_id), sizeof(module_id)) == 0) {
/* Add new CPU and GPU clock tables for Mariko */
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::CpuTablesFreeSpace[i]), pcv::NewCpuTables, sizeof(pcv::NewCpuTables));
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::GpuTablesFreeSpace[i]), pcv::NewGpuTables, sizeof(pcv::NewGpuTables));
/* Patch Mariko max CPU and GPU clockrates */
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::MaxCpuClockOffset[i]), &pcv::NewMaxCpuClock, sizeof(pcv::NewMaxCpuClock));
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::Reg1MaxGpuOffset[i]), pcv::Reg1NewMaxGpuClock, sizeof(pcv::Reg1NewMaxGpuClock[i]));
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::Reg2MaxGpuOffset[i]), pcv::Reg2NewMaxGpuClock, sizeof(pcv::Reg2NewMaxGpuClock[i]));
/* Patch max cpu voltage on Mariko */
for (u32 j = 0; j < sizeof(pcv::CpuVoltageLimitOffsets[i])/sizeof(u32); j++) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::CpuVoltageLimitOffsets[i][j]), &pcv::NewCpuVoltageLimit, sizeof(pcv::NewCpuVoltageLimit));
}
for (u32 j = 0; j < sizeof(pcv::CpuVoltageOldTableCoeff[i])/sizeof(u32); j++) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::CpuVoltageOldTableCoeff[i][j]), &pcv::NewCpuVoltageScaled, sizeof(pcv::NewCpuVoltageScaled));
}
for (u32 j = 0; j < sizeof(pcv::MtcTable_1600[i])/sizeof(u32); j++) {
pcv::MarikoMtcTable* mtc_table_new = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[i][j]);
pcv::MarikoMtcTable* mtc_table_old = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[i][j] - pcv::MtcTableOffset);
/* Replace 1331 MHz with 1600 MHz, not possible without proper timings for oc clock */
std::memcpy(reinterpret_cast<void *>(mtc_table_old), reinterpret_cast<void *>(mtc_table_new), sizeof(pcv::MarikoMtcTable));
/* Generate new table for OC MHz */
pcv::AdjustMtcTable(mtc_table_new, mtc_table_old);
}
/* Patch RAM Clock */
for (u32 j = 0; j < sizeof(pcv::EmcFreqOffsets[i])/sizeof(u32); j++) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::EmcFreqOffsets[i][j]), &EmcClock, sizeof(EmcClock));
}
/* Replace 1331 MHz with 1600 MHz in EmcDvbTable */
const u32 mem1331 = 1600'000;
std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::EmcDvb1331[i]), &mem1331, sizeof(mem1331));
}
}
u32 PtmEmcClk1600 = GetEmcClock() * 1000;
const u32 PtmEmcClk1331 = 1600'000'000;
// u32 CpuBoostClock = GetCpuBoostClock() * 1000;
/* Patch Ptm for coexistent of 1600 MHz and OC clock */
for (u32 i = 0; i < sizeof(PtmModuleId)/sizeof(ro::ModuleId); i++) {
if (std::memcmp(std::addressof(PtmModuleId[i]), std::addressof(module_id), sizeof(module_id)) == 0) {
for (u32 j = 0; j < 6; j++) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &PtmEmcClk1600, sizeof(PtmEmcClk1600));
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &PtmEmcClk1600, sizeof(PtmEmcClk1600));
}
for (u32 j = 6; j < 10; j++) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &PtmEmcClk1331, sizeof(PtmEmcClk1331));
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &PtmEmcClk1331, sizeof(PtmEmcClk1331));
}
for (u32 j = 10; j < 16; j+=2) {
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &PtmEmcClk1600, sizeof(PtmEmcClk1600));
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &PtmEmcClk1600, sizeof(PtmEmcClk1600));
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * (j+1)), &PtmEmcClk1331, sizeof(PtmEmcClk1331));
std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * (j+1) + 0x4), &PtmEmcClk1331, sizeof(PtmEmcClk1331));
}
// for (u32 j = 0; j < 2; j++) {
// std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::CpuBoostOffset + ptm::OffsetInterval * j), &CpuBoostClock, sizeof(CpuBoostClock));
// std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::CpuBoostOffset + ptm::OffsetInterval * j + 0x4), &CpuBoostClock, sizeof(CpuBoostClock));
// }
}
}
}
}
}

783
Source/Atmosphere/stratosphere/loader/source/ldr_process_creation.cpp Normal file
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@@ -0,0 +1,783 @@
/*
* Copyright (c) Atmosphère-NX
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <stratosphere.hpp>
#include "ldr_auto_close.hpp"
#include "ldr_capabilities.hpp"
#include "ldr_content_management.hpp"
#include "ldr_development_manager.hpp"
#include "ldr_launch_record.hpp"
#include "ldr_meta.hpp"
#include "ldr_patcher.hpp"
#include "ldr_process_creation.hpp"
#include "ldr_ro_manager.hpp"
#include "ldr_oc_patch.hpp"
namespace ams::ldr {
namespace {
/* Convenience defines. */
constexpr size_t SystemResourceSizeMax = 0x1FE00000;
/* Types. */
enum NsoIndex {
Nso_Rtld = 0,
Nso_Main = 1,
Nso_SubSdk0 = 2,
Nso_SubSdk1 = 3,
Nso_SubSdk2 = 4,
Nso_SubSdk3 = 5,
Nso_SubSdk4 = 6,
Nso_SubSdk5 = 7,
Nso_SubSdk6 = 8,
Nso_SubSdk7 = 9,
Nso_SubSdk8 = 10,
Nso_SubSdk9 = 11,
Nso_Sdk = 12,
Nso_Count,
};
constexpr inline const char *NsoPaths[Nso_Count] = {
ENCODE_ATMOSPHERE_CODE_PATH("/rtld"),
ENCODE_ATMOSPHERE_CODE_PATH("/main"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk0"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk1"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk2"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk3"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk4"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk5"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk6"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk7"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk8"),
ENCODE_ATMOSPHERE_CODE_PATH("/subsdk9"),
ENCODE_ATMOSPHERE_CODE_PATH("/sdk"),
};
constexpr const char *GetNsoPath(size_t idx) {
AMS_ABORT_UNLESS(idx < Nso_Count);
return NsoPaths[idx];
}
struct ProcessInfo {
os::NativeHandle process_handle;
uintptr_t args_address;
size_t args_size;
uintptr_t nso_address[Nso_Count];
size_t nso_size[Nso_Count];
};
/* Global NSO header cache. */
bool g_has_nso[Nso_Count];
NsoHeader g_nso_headers[Nso_Count];
/* Pcv/Ptm check cache. */
bool g_is_pcv;
bool g_is_ptm;
/* Anti-downgrade. */
#include "ldr_anti_downgrade_tables.inc"
Result ValidateProgramVersion(ncm::ProgramId program_id, u32 version) {
/* No version verification is done before 8.1.0. */
R_SUCCEED_IF(hos::GetVersion() < hos::Version_8_1_0);
/* No verification is done if development. */
R_SUCCEED_IF(IsDevelopmentForAntiDowngradeCheck());
/* Do version-dependent validation, if compiled to do so. */
#ifdef LDR_VALIDATE_PROCESS_VERSION
const MinimumProgramVersion *entries = nullptr;
size_t num_entries = 0;
const auto hos_version = hos::GetVersion();
if (hos_version >= hos::Version_11_0_0) {
entries = g_MinimumProgramVersions1100;
num_entries = g_MinimumProgramVersionsCount1100;
} else if (hos_version >= hos::Version_10_1_0) {
entries = g_MinimumProgramVersions1010;
num_entries = g_MinimumProgramVersionsCount1010;
} else if (hos_version >= hos::Version_10_0_0) {
entries = g_MinimumProgramVersions1000;
num_entries = g_MinimumProgramVersionsCount1000;
} else if (hos_version >= hos::Version_9_1_0) {
entries = g_MinimumProgramVersions910;
num_entries = g_MinimumProgramVersionsCount910;
} else if (hos_version >= hos::Version_9_0_0) {
entries = g_MinimumProgramVersions900;
num_entries = g_MinimumProgramVersionsCount900;
} else if (hos_version >= hos::Version_8_1_0) {
entries = g_MinimumProgramVersions810;
num_entries = g_MinimumProgramVersionsCount810;
}
for (size_t i = 0; i < num_entries; i++) {
if (entries[i].program_id == program_id) {
R_UNLESS(entries[i].version <= version, ldr::ResultInvalidVersion());
}
}
#else
AMS_UNUSED(program_id, version);
#endif
return ResultSuccess();
}
/* Helpers. */
Result GetProgramInfoFromMeta(ProgramInfo *out, const Meta *meta) {
/* Copy basic info. */
out->main_thread_priority = meta->npdm->main_thread_priority;
out->default_cpu_id = meta->npdm->default_cpu_id;
out->main_thread_stack_size = meta->npdm->main_thread_stack_size;
out->program_id = meta->aci->program_id;
/* Copy access controls. */
size_t offset = 0;
#define COPY_ACCESS_CONTROL(source, which) \
({ \
const size_t size = meta->source->which##_size; \
R_UNLESS(offset + size <= sizeof(out->ac_buffer), ldr::ResultInternalError()); \
out->source##_##which##_size = size; \
std::memcpy(out->ac_buffer + offset, meta->source##_##which, size); \
offset += size; \
})
/* Copy all access controls to buffer. */
COPY_ACCESS_CONTROL(acid, sac);
COPY_ACCESS_CONTROL(aci, sac);
COPY_ACCESS_CONTROL(acid, fac);
COPY_ACCESS_CONTROL(aci, fah);
#undef COPY_ACCESS_CONTROL
/* Copy flags. */
out->flags = MakeProgramInfoFlag(static_cast<const util::BitPack32 *>(meta->aci_kac), meta->aci->kac_size / sizeof(util::BitPack32));
return ResultSuccess();
}
bool IsApplet(const Meta *meta) {
return (MakeProgramInfoFlag(static_cast<const util::BitPack32 *>(meta->aci_kac), meta->aci->kac_size / sizeof(util::BitPack32)) & ProgramInfoFlag_ApplicationTypeMask) == ProgramInfoFlag_Applet;
}
bool IsApplication(const Meta *meta) {
return (MakeProgramInfoFlag(static_cast<const util::BitPack32 *>(meta->aci_kac), meta->aci->kac_size / sizeof(util::BitPack32)) & ProgramInfoFlag_ApplicationTypeMask) == ProgramInfoFlag_Application;
}
Npdm::AddressSpaceType GetAddressSpaceType(const Meta *meta) {
return static_cast<Npdm::AddressSpaceType>((meta->npdm->flags & Npdm::MetaFlag_AddressSpaceTypeMask) >> Npdm::MetaFlag_AddressSpaceTypeShift);
}
Acid::PoolPartition GetPoolPartition(const Meta *meta) {
return static_cast<Acid::PoolPartition>((meta->acid->flags & Acid::AcidFlag_PoolPartitionMask) >> Acid::AcidFlag_PoolPartitionShift);
}
Result LoadNsoHeaders(NsoHeader *nso_headers, bool *has_nso) {
/* Clear NSOs. */
std::memset(nso_headers, 0, sizeof(*nso_headers) * Nso_Count);
std::memset(has_nso, 0, sizeof(*has_nso) * Nso_Count);
for (size_t i = 0; i < Nso_Count; i++) {
fs::FileHandle file;
if (R_SUCCEEDED(fs::OpenFile(std::addressof(file), GetNsoPath(i), fs::OpenMode_Read))) {
ON_SCOPE_EXIT { fs::CloseFile(file); };
/* Read NSO header. */
size_t read_size;
R_TRY(fs::ReadFile(std::addressof(read_size), file, 0, nso_headers + i, sizeof(*nso_headers)));
R_UNLESS(read_size == sizeof(*nso_headers), ldr::ResultInvalidNso());
has_nso[i] = true;
}
}
return ResultSuccess();
}
Result ValidateNsoHeaders(const NsoHeader *nso_headers, const bool *has_nso) {
/* We must always have a main. */
R_UNLESS(has_nso[Nso_Main], ldr::ResultInvalidNso());
/* If we don't have an RTLD, we must only have a main. */
if (!has_nso[Nso_Rtld]) {
for (size_t i = Nso_Main + 1; i < Nso_Count; i++) {
R_UNLESS(!has_nso[i], ldr::ResultInvalidNso());
}
}
/* All NSOs must have zero text offset. */
for (size_t i = 0; i < Nso_Count; i++) {
R_UNLESS(nso_headers[i].text_dst_offset == 0, ldr::ResultInvalidNso());
}
return ResultSuccess();
}
Result ValidateMeta(const Meta *meta, const ncm::ProgramLocation &loc, const fs::CodeVerificationData &code_verification_data) {
/* Validate version. */
R_TRY(ValidateProgramVersion(loc.program_id, meta->npdm->version));
/* Validate program id. */
R_UNLESS(meta->aci->program_id >= meta->acid->program_id_min, ldr::ResultInvalidProgramId());
R_UNLESS(meta->aci->program_id <= meta->acid->program_id_max, ldr::ResultInvalidProgramId());
/* Check if nca is pcv or ptm */
g_is_pcv = meta->aci->program_id == ncm::SystemProgramId::Pcv;
g_is_ptm = meta->aci->program_id == ncm::SystemProgramId::Ptm;
/* Validate the kernel capabilities. */
R_TRY(TestCapability(static_cast<const util::BitPack32 *>(meta->acid_kac), meta->acid->kac_size / sizeof(util::BitPack32), static_cast<const util::BitPack32 *>(meta->aci_kac), meta->aci->kac_size / sizeof(util::BitPack32)));
/* If we have data to validate, validate it. */
if (code_verification_data.has_data && meta->check_verification_data) {
const u8 *sig = code_verification_data.signature;
const size_t sig_size = sizeof(code_verification_data.signature);
const u8 *mod = static_cast<u8 *>(meta->modulus);
const size_t mod_size = crypto::Rsa2048PssSha256Verifier::ModulusSize;
const u8 *exp = fssystem::GetAcidSignatureKeyPublicExponent();
const size_t exp_size = fssystem::AcidSignatureKeyPublicExponentSize;
const u8 *hsh = code_verification_data.target_hash;
const size_t hsh_size = sizeof(code_verification_data.target_hash);
const bool is_signature_valid = crypto::VerifyRsa2048PssSha256WithHash(sig, sig_size, mod, mod_size, exp, exp_size, hsh, hsh_size);
R_UNLESS(is_signature_valid, ldr::ResultInvalidNcaSignature());
}
/* All good. */
return ResultSuccess();
}
Result GetCreateProcessFlags(u32 *out, const Meta *meta, const u32 ldr_flags) {
const u8 meta_flags = meta->npdm->flags;
u32 flags = 0;
/* Set Is64Bit. */
if (meta_flags & Npdm::MetaFlag_Is64Bit) {
flags |= svc::CreateProcessFlag_Is64Bit;
}
/* Set AddressSpaceType. */
switch (GetAddressSpaceType(meta)) {
case Npdm::AddressSpaceType_32Bit:
flags |= svc::CreateProcessFlag_AddressSpace32Bit;
break;
case Npdm::AddressSpaceType_64BitDeprecated:
flags |= svc::CreateProcessFlag_AddressSpace64BitDeprecated;
break;
case Npdm::AddressSpaceType_32BitWithoutAlias:
flags |= svc::CreateProcessFlag_AddressSpace32BitWithoutAlias;
break;
case Npdm::AddressSpaceType_64Bit:
flags |= svc::CreateProcessFlag_AddressSpace64Bit;
break;
default:
return ldr::ResultInvalidMeta();
}
/* Set Enable Debug. */
if (ldr_flags & CreateProcessFlag_EnableDebug) {
flags |= svc::CreateProcessFlag_EnableDebug;
}
/* Set Enable ASLR. */
if (!(ldr_flags & CreateProcessFlag_DisableAslr)) {
flags |= svc::CreateProcessFlag_EnableAslr;
}
/* Set Is Application. */
if (IsApplication(meta)) {
flags |= svc::CreateProcessFlag_IsApplication;
/* 7.0.0+: Set OptimizeMemoryAllocation if relevant. */
if (hos::GetVersion() >= hos::Version_7_0_0) {
if (meta_flags & Npdm::MetaFlag_OptimizeMemoryAllocation) {
flags |= svc::CreateProcessFlag_OptimizeMemoryAllocation;
}
}
}
/* 5.0.0+ Set Pool Partition. */
if (hos::GetVersion() >= hos::Version_5_0_0) {
switch (GetPoolPartition(meta)) {
case Acid::PoolPartition_Application:
if (IsApplet(meta)) {
flags |= svc::CreateProcessFlag_PoolPartitionApplet;
} else {
flags |= svc::CreateProcessFlag_PoolPartitionApplication;
}
break;
case Acid::PoolPartition_Applet:
flags |= svc::CreateProcessFlag_PoolPartitionApplet;
break;
case Acid::PoolPartition_System:
flags |= svc::CreateProcessFlag_PoolPartitionSystem;
break;
case Acid::PoolPartition_SystemNonSecure:
flags |= svc::CreateProcessFlag_PoolPartitionSystemNonSecure;
break;
default:
return ldr::ResultInvalidMeta();
}
} else if (hos::GetVersion() >= hos::Version_4_0_0) {
/* On 4.0.0+, the corresponding bit was simply "UseSecureMemory". */
if (meta->acid->flags & Acid::AcidFlag_DeprecatedUseSecureMemory) {
flags |= svc::CreateProcessFlag_DeprecatedUseSecureMemory;
}
}
/* 11.0.0+/meso Set Disable DAS merge. */
if (meta_flags & Npdm::MetaFlag_DisableDeviceAddressSpaceMerge) {
flags |= svc::CreateProcessFlag_DisableDeviceAddressSpaceMerge;
}
*out = flags;
return ResultSuccess();
}
Result GetCreateProcessParameter(svc::CreateProcessParameter *out, const Meta *meta, u32 flags, os::NativeHandle resource_limit) {
/* Clear output. */
std::memset(out, 0, sizeof(*out));
/* Set name, version, program id, resource limit handle. */
std::memcpy(out->name, meta->npdm->program_name, sizeof(out->name) - 1);
out->version = meta->npdm->version;
out->program_id = meta->aci->program_id.value;
out->reslimit = resource_limit;
/* Set flags. */
R_TRY(GetCreateProcessFlags(std::addressof(out->flags), meta, flags));
/* 3.0.0+ System Resource Size. */
if (hos::GetVersion() >= hos::Version_3_0_0) {
/* Validate size is aligned. */
R_UNLESS(util::IsAligned(meta->npdm->system_resource_size, os::MemoryBlockUnitSize), ldr::ResultInvalidSize());
/* Validate system resource usage. */
if (meta->npdm->system_resource_size) {
/* Process must be 64-bit. */
R_UNLESS((out->flags & svc::CreateProcessFlag_AddressSpace64Bit), ldr::ResultInvalidMeta());
/* Process must be application or applet. */
R_UNLESS(IsApplication(meta) || IsApplet(meta), ldr::ResultInvalidMeta());
/* Size must be less than or equal to max. */
R_UNLESS(meta->npdm->system_resource_size <= SystemResourceSizeMax, ldr::ResultInvalidMeta());
}
out->system_resource_num_pages = meta->npdm->system_resource_size >> 12;
}
return ResultSuccess();
}
ALWAYS_INLINE u64 GetCurrentProcessInfo(svc::InfoType info_type) {
u64 value;
R_ABORT_UNLESS(svc::GetInfo(std::addressof(value), info_type, svc::PseudoHandle::CurrentProcess, 0));
return value;
}
Result SearchFreeRegion(uintptr_t *out, size_t mapping_size) {
/* Get address space extents. */
const uintptr_t heap_start = GetCurrentProcessInfo(svc::InfoType_HeapRegionAddress);
const size_t heap_size = GetCurrentProcessInfo(svc::InfoType_HeapRegionSize);
const uintptr_t alias_start = GetCurrentProcessInfo(svc::InfoType_AliasRegionAddress);
const size_t alias_size = GetCurrentProcessInfo(svc::InfoType_AliasRegionSize);
const uintptr_t aslr_start = GetCurrentProcessInfo(svc::InfoType_AslrRegionAddress);
const size_t aslr_size = GetCurrentProcessInfo(svc::InfoType_AslrRegionSize);
/* Iterate upwards to find a free region. */
uintptr_t address = aslr_start;
while (true) {
/* Declare variables for memory querying. */
svc::MemoryInfo mem_info;
svc::PageInfo page_info;
/* Check that we're still within bounds. */
R_UNLESS(address < address + mapping_size, svc::ResultOutOfMemory());
/* If we're within the heap region, skip to the end of the heap region. */
if (heap_size != 0 && !(address + mapping_size - 1 < heap_start || heap_start + heap_size - 1 < address)) {
R_UNLESS(address < heap_start + heap_size, svc::ResultOutOfMemory());
address = heap_start + heap_size;
continue;
}
/* If we're within the alias region, skip to the end of the alias region. */
if (alias_size != 0 && !(address + mapping_size - 1 < alias_start || alias_start + alias_size - 1 < address)) {
R_UNLESS(address < alias_start + alias_size, svc::ResultOutOfMemory());
address = alias_start + alias_size;
continue;
}
/* Get the current memory range. */
R_ABORT_UNLESS(svc::QueryMemory(std::addressof(mem_info), std::addressof(page_info), address));
/* If the memory range is free and big enough, use it. */
if (mem_info.state == svc::MemoryState_Free && mapping_size <= ((mem_info.base_address + mem_info.size) - address)) {
*out = address;
return ResultSuccess();
}
/* Check that we can advance. */
R_UNLESS(address < mem_info.base_address + mem_info.size, svc::ResultOutOfMemory());
R_UNLESS(mem_info.base_address + mem_info.size - 1 < aslr_start + aslr_size - 1, svc::ResultOutOfMemory());
/* Advance. */
address = mem_info.base_address + mem_info.size;
}
}
Result DecideAddressSpaceLayout(ProcessInfo *out, svc::CreateProcessParameter *out_param, const NsoHeader *nso_headers, const bool *has_nso, const ArgumentStore::Entry *argument) {
/* Clear output. */
out->args_address = 0;
out->args_size = 0;
std::memset(out->nso_address, 0, sizeof(out->nso_address));
std::memset(out->nso_size, 0, sizeof(out->nso_size));
size_t total_size = 0;
bool argument_allocated = false;
/* Calculate base offsets. */
for (size_t i = 0; i < Nso_Count; i++) {
if (has_nso[i]) {
out->nso_address[i] = total_size;
const size_t text_end = nso_headers[i].text_dst_offset + nso_headers[i].text_size;
const size_t ro_end = nso_headers[i].ro_dst_offset + nso_headers[i].ro_size;
const size_t rw_end = nso_headers[i].rw_dst_offset + nso_headers[i].rw_size + nso_headers[i].bss_size;
out->nso_size[i] = text_end;
out->nso_size[i] = std::max(out->nso_size[i], ro_end);
out->nso_size[i] = std::max(out->nso_size[i], rw_end);
out->nso_size[i] = util::AlignUp(out->nso_size[i], os::MemoryPageSize);
total_size += out->nso_size[i];
if (!argument_allocated && argument != nullptr) {
out->args_address = total_size;
out->args_size = util::AlignUp(2 * sizeof(u32) + argument->argument_size * 2 + ArgumentStore::ArgumentBufferSize, os::MemoryPageSize);
total_size += out->args_size;
argument_allocated = true;
}
}
}
/* Calculate ASLR. */
uintptr_t aslr_start = 0;
size_t aslr_size = 0;
if (hos::GetVersion() >= hos::Version_2_0_0) {
switch (out_param->flags & svc::CreateProcessFlag_AddressSpaceMask) {
case svc::CreateProcessFlag_AddressSpace32Bit:
case svc::CreateProcessFlag_AddressSpace32BitWithoutAlias:
aslr_start = svc::AddressSmallMap32Start;
aslr_size = svc::AddressSmallMap32Size;
break;
case svc::CreateProcessFlag_AddressSpace64BitDeprecated:
aslr_start = svc::AddressSmallMap36Start;
aslr_size = svc::AddressSmallMap36Size;
break;
case svc::CreateProcessFlag_AddressSpace64Bit:
aslr_start = svc::AddressMap39Start;
aslr_size = svc::AddressMap39Size;
break;
AMS_UNREACHABLE_DEFAULT_CASE();
}
} else {
/* On 1.0.0, only 2 address space types existed. */
if (out_param->flags & svc::CreateProcessFlag_AddressSpace64BitDeprecated) {
aslr_start = svc::AddressSmallMap36Start;
aslr_size = svc::AddressSmallMap36Size;
} else {
aslr_start = svc::AddressSmallMap32Start;
aslr_size = svc::AddressSmallMap32Size;
}
}
R_UNLESS(total_size <= aslr_size, svc::ResultOutOfMemory());
/* Set Create Process output. */
uintptr_t aslr_slide = 0;
size_t free_size = (aslr_size - total_size);
if (out_param->flags & svc::CreateProcessFlag_EnableAslr) {
/* Nintendo uses MT19937 (not os::GenerateRandomBytes), but we'll just use TinyMT for now. */
aslr_slide = os::GenerateRandomU64(free_size / os::MemoryBlockUnitSize) * os::MemoryBlockUnitSize;
}
/* Set out. */
aslr_start += aslr_slide;
for (size_t i = 0; i < Nso_Count; i++) {
if (has_nso[i]) {
out->nso_address[i] += aslr_start;
}
}
if (out->args_address) {
out->args_address += aslr_start;
}
out_param->code_address = aslr_start;
out_param->code_num_pages = total_size >> 12;
return ResultSuccess();
}
Result CreateProcessImpl(ProcessInfo *out, const Meta *meta, const NsoHeader *nso_headers, const bool *has_nso, const ArgumentStore::Entry *argument, u32 flags, os::NativeHandle resource_limit) {
/* Get CreateProcessParameter. */
svc::CreateProcessParameter param;
R_TRY(GetCreateProcessParameter(std::addressof(param), meta, flags, resource_limit));
/* Decide on an NSO layout. */
R_TRY(DecideAddressSpaceLayout(out, std::addressof(param), nso_headers, has_nso, argument));
/* Actually create process. */
svc::Handle process_handle;
R_TRY(svc::CreateProcess(std::addressof(process_handle), std::addressof(param), static_cast<const u32 *>(meta->aci_kac), meta->aci->kac_size / sizeof(u32)));
/* Set the output handle. */
out->process_handle = process_handle;
return ResultSuccess();
}
Result LoadNsoSegment(fs::FileHandle file, const NsoHeader::SegmentInfo *segment, size_t file_size, const u8 *file_hash, bool is_compressed, bool check_hash, uintptr_t map_base, uintptr_t map_end) {
/* Select read size based on compression. */
if (!is_compressed) {
file_size = segment->size;
}
/* Validate size. */
R_UNLESS(file_size <= segment->size, ldr::ResultInvalidNso());
R_UNLESS(segment->size <= std::numeric_limits<s32>::max(), ldr::ResultInvalidNso());
/* Load data from file. */
uintptr_t load_address = is_compressed ? map_end - file_size : map_base;
size_t read_size;
R_TRY(fs::ReadFile(std::addressof(read_size), file, segment->file_offset, reinterpret_cast<void *>(load_address), file_size));
R_UNLESS(read_size == file_size, ldr::ResultInvalidNso());
/* Uncompress if necessary. */
if (is_compressed) {
bool decompressed = (util::DecompressLZ4(reinterpret_cast<void *>(map_base), segment->size, reinterpret_cast<const void *>(load_address), file_size) == static_cast<int>(segment->size));
R_UNLESS(decompressed, ldr::ResultInvalidNso());
}
/* Check hash if necessary. */
if (check_hash) {
u8 hash[crypto::Sha256Generator::HashSize];
crypto::GenerateSha256Hash(hash, sizeof(hash), reinterpret_cast<void *>(map_base), segment->size);
R_UNLESS(std::memcmp(hash, file_hash, sizeof(hash)) == 0, ldr::ResultInvalidNso());
}
return ResultSuccess();
}
Result LoadAutoLoadModule(os::NativeHandle process_handle, fs::FileHandle file, uintptr_t map_address, const NsoHeader *nso_header, uintptr_t nso_address, size_t nso_size) {
/* Map and read data from file. */
{
AutoCloseMap map(map_address, process_handle, nso_address, nso_size);
R_TRY(map.GetResult());
/* Load NSO segments. */
R_TRY(LoadNsoSegment(file, std::addressof(nso_header->segments[NsoHeader::Segment_Text]), nso_header->text_compressed_size, nso_header->text_hash, (nso_header->flags & NsoHeader::Flag_CompressedText) != 0,
(nso_header->flags & NsoHeader::Flag_CheckHashText) != 0, map_address + nso_header->text_dst_offset, map_address + nso_size));
R_TRY(LoadNsoSegment(file, std::addressof(nso_header->segments[NsoHeader::Segment_Ro]), nso_header->ro_compressed_size, nso_header->ro_hash, (nso_header->flags & NsoHeader::Flag_CompressedRo) != 0,
(nso_header->flags & NsoHeader::Flag_CheckHashRo) != 0, map_address + nso_header->ro_dst_offset, map_address + nso_size));
R_TRY(LoadNsoSegment(file, std::addressof(nso_header->segments[NsoHeader::Segment_Rw]), nso_header->rw_compressed_size, nso_header->rw_hash, (nso_header->flags & NsoHeader::Flag_CompressedRw) != 0,
(nso_header->flags & NsoHeader::Flag_CheckHashRw) != 0, map_address + nso_header->rw_dst_offset, map_address + nso_size));
/* Clear unused space to zero. */
const size_t text_end = nso_header->text_dst_offset + nso_header->text_size;
const size_t ro_end = nso_header->ro_dst_offset + nso_header->ro_size;
const size_t rw_end = nso_header->rw_dst_offset + nso_header->rw_size;
std::memset(reinterpret_cast<void *>(map_address), 0, nso_header->text_dst_offset);
std::memset(reinterpret_cast<void *>(map_address + text_end), 0, nso_header->ro_dst_offset - text_end);
std::memset(reinterpret_cast<void *>(map_address + ro_end), 0, nso_header->rw_dst_offset - ro_end);
std::memset(reinterpret_cast<void *>(map_address + rw_end), 0, nso_header->bss_size);
/* Apply embedded patches. */
ApplyEmbeddedPatchesToModule(nso_header->module_id, map_address, nso_size);
/* Apply IPS patches. */
LocateAndApplyIpsPatchesToModule(nso_header->module_id, map_address, nso_size);
/* Apply pcv and ptm patches. */
if (g_is_pcv) {
pcv::ApplyAutoPcvPatch(map_address, nso_size);
}
if (g_is_ptm) {
ptm::ApplyAutoPtmPatch(map_address, nso_size);
}
}
/* Set permissions. */
const size_t text_size = util::AlignUp(nso_header->text_size, os::MemoryPageSize);
const size_t ro_size = util::AlignUp(nso_header->ro_size, os::MemoryPageSize);
const size_t rw_size = util::AlignUp(nso_header->rw_size + nso_header->bss_size, os::MemoryPageSize);
if (text_size) {
R_TRY(svc::SetProcessMemoryPermission(process_handle, nso_address + nso_header->text_dst_offset, text_size, svc::MemoryPermission_ReadExecute));
}
if (ro_size) {
R_TRY(svc::SetProcessMemoryPermission(process_handle, nso_address + nso_header->ro_dst_offset, ro_size, svc::MemoryPermission_Read));
}
if (rw_size) {
R_TRY(svc::SetProcessMemoryPermission(process_handle, nso_address + nso_header->rw_dst_offset, rw_size, svc::MemoryPermission_ReadWrite));
}
return ResultSuccess();
}
Result LoadAutoLoadModules(const ProcessInfo *process_info, const NsoHeader *nso_headers, const bool *has_nso, const ArgumentStore::Entry *argument) {
/* Load each NSO. */
for (size_t i = 0; i < Nso_Count; i++) {
if (has_nso[i]) {
fs::FileHandle file;
R_TRY(fs::OpenFile(std::addressof(file), GetNsoPath(i), fs::OpenMode_Read));
ON_SCOPE_EXIT { fs::CloseFile(file); };
uintptr_t map_address;
R_TRY(SearchFreeRegion(std::addressof(map_address), process_info->nso_size[i]));
R_TRY(LoadAutoLoadModule(process_info->process_handle, file, map_address, nso_headers + i, process_info->nso_address[i], process_info->nso_size[i]));
}
}
/* Load arguments, if present. */
if (argument != nullptr) {
/* Write argument data into memory. */
{
uintptr_t map_address;
R_TRY(SearchFreeRegion(std::addressof(map_address), process_info->args_size));
AutoCloseMap map(map_address, process_info->process_handle, process_info->args_address, process_info->args_size);
R_TRY(map.GetResult());
ProgramArguments *args = reinterpret_cast<ProgramArguments *>(map_address);
std::memset(args, 0, sizeof(*args));
args->allocated_size = process_info->args_size;
args->arguments_size = argument->argument_size;
std::memcpy(args->arguments, argument->argument, argument->argument_size);
}
/* Set argument region permissions. */
R_TRY(svc::SetProcessMemoryPermission(process_info->process_handle, process_info->args_address, process_info->args_size, svc::MemoryPermission_ReadWrite));
}
return ResultSuccess();
}
}
/* Process Creation API. */
Result CreateProcess(os::NativeHandle *out, PinId pin_id, const ncm::ProgramLocation &loc, const cfg::OverrideStatus &override_status, const char *path, const ArgumentStore::Entry *argument, u32 flags, os::NativeHandle resource_limit) {
/* Mount code. */
AMS_UNUSED(path);
ScopedCodeMount mount(loc, override_status);
R_TRY(mount.GetResult());
/* Load meta, possibly from cache. */
Meta meta;
R_TRY(LoadMetaFromCache(std::addressof(meta), loc, override_status));
/* Validate meta. */
R_TRY(ValidateMeta(std::addressof(meta), loc, mount.GetCodeVerificationData()));
/* Load, validate NSOs. */
R_TRY(LoadNsoHeaders(g_nso_headers, g_has_nso));
R_TRY(ValidateNsoHeaders(g_nso_headers, g_has_nso));
/* Actually create process. */
ProcessInfo info;
R_TRY(CreateProcessImpl(std::addressof(info), std::addressof(meta), g_nso_headers, g_has_nso, argument, flags, resource_limit));
/* Load NSOs into process memory. */
{
/* Ensure we close the process handle, if we fail. */
auto process_guard = SCOPE_GUARD { os::CloseNativeHandle(info.process_handle); };
/* Load all NSOs. */
R_TRY(LoadAutoLoadModules(std::addressof(info), g_nso_headers, g_has_nso, argument));
/* We don't need to close the process handle, since we succeeded. */
process_guard.Cancel();
}
/* Register NSOs with the RoManager. */
{
/* Nintendo doesn't validate this get, but we do. */
os::ProcessId process_id = os::GetProcessId(info.process_handle);
/* Register new process. */
const auto as_type = GetAddressSpaceType(std::addressof(meta));
RoManager::GetInstance().RegisterProcess(pin_id, process_id, meta.aci->program_id, as_type == Npdm::AddressSpaceType_64Bit || as_type == Npdm::AddressSpaceType_64BitDeprecated);
/* Register all NSOs. */
for (size_t i = 0; i < Nso_Count; i++) {
if (g_has_nso[i]) {
RoManager::GetInstance().AddNso(pin_id, g_nso_headers[i].module_id, info.nso_address[i], info.nso_size[i]);
}
}
}
/* If we're overriding for HBL, perform HTML document redirection. */
if (override_status.IsHbl()) {
/* Don't validate result, failure is okay. */
RedirectHtmlDocumentPathForHbl(loc);
}
/* Clear the external code for the program. */
fssystem::DestroyExternalCode(loc.program_id);
/* Note that we've created the program. */
SetLaunchedBootProgram(loc.program_id);
/* Move the process handle to output. */
*out = info.process_handle;
return ResultSuccess();
}
Result GetProgramInfo(ProgramInfo *out, cfg::OverrideStatus *out_status, const ncm::ProgramLocation &loc, const char *path) {
Meta meta;
/* Load Meta. */
{
AMS_UNUSED(path);
ScopedCodeMount mount(loc);
R_TRY(mount.GetResult());
R_TRY(LoadMeta(std::addressof(meta), loc, mount.GetOverrideStatus()));
if (out_status != nullptr) {
*out_status = mount.GetOverrideStatus();
}
}
return GetProgramInfoFromMeta(out, std::addressof(meta));
}
Result PinProgram(PinId *out_id, const ncm::ProgramLocation &loc, const cfg::OverrideStatus &override_status) {
R_UNLESS(RoManager::GetInstance().Allocate(out_id, loc, override_status), ldr::ResultMaxProcess());
return ResultSuccess();
}
Result UnpinProgram(PinId id) {
R_UNLESS(RoManager::GetInstance().Free(id), ldr::ResultNotPinned());
return ResultSuccess();
}
Result GetProcessModuleInfo(u32 *out_count, ldr::ModuleInfo *out, size_t max_out_count, os::ProcessId process_id) {
R_UNLESS(RoManager::GetInstance().GetProcessModuleInfo(out_count, out, max_out_count, process_id), ldr::ResultNotPinned());
return ResultSuccess();
}
Result GetProgramLocationAndOverrideStatusFromPinId(ncm::ProgramLocation *out, cfg::OverrideStatus *out_status, PinId pin_id) {
R_UNLESS(RoManager::GetInstance().GetProgramLocationAndStatus(out, out_status, pin_id), ldr::ResultNotPinned());
return ResultSuccess();
}
}