loader: add gpu vmin and vmax patch
This commit is contained in:
@@ -89,6 +89,7 @@ volatile CustomizeTable C = {
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.marikoGpuUV = 0,
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.eristaCpuUV = 0,
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.eristaGpuUV = 0,
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@@ -115,6 +116,7 @@ volatile CustomizeTable C = {
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.mem_burst_latency = 2,
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// NOTE: These tables should NOT BE USED and are only here as placeholders. Always try and find your own optimal tables.
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// Ensure the voltages actually increase or stay the sameot
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.marikoGpuVoltArray = {
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610 /* 76 */,
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@@ -132,7 +134,7 @@ volatile CustomizeTable C = {
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675 /* 998 */,
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710 /* 1075 */,
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735 /* 1152 */,
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785 /* 1228 */,
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785 /* 1228 (Only safe if GPU Scheduling is on)*/,
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0 /* 1267 (Disabled by default) */,
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0 /* 1305 (Disabled by default) */,
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0 /* 1344 (Disabled by default) */,
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@@ -156,7 +158,7 @@ volatile CustomizeTable C = {
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875 /* 691 */,
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900 /* 768 */,
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950 /* 844 */,
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900 /* 921 */,
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975 /* 921 */,
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0 /* 998 (Disabled by default) */,
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0 /* 1075 (Disabled by default) */,
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},
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@@ -164,6 +166,12 @@ volatile CustomizeTable C = {
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.marikoCpuVmin = 600,
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.eristaGpuVmin = 810,
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.marikoGpuVmin = 610,
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.marikoGpuVmax = 800,
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/* Advanced Settings:
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* - Erista CPU DVFS Table:
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*/
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@@ -86,7 +86,10 @@
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u32 marikoCpuVmin;
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u32 eristaGpuVmin;
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u32 marikoGpuVmin;
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u32 marikoGpuVmax;
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CustomizeCpuDvfsTable eristaCpuDvfsTable;
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CustomizeCpuDvfsTable marikoCpuDvfsTable;
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CustomizeCpuDvfsTable marikoCpuDvfsTableSLT;
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@@ -48,12 +48,17 @@ namespace ams::ldr::oc::pcv
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{1963500, {1675751, -38635, 27}, {1120000}},
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{},
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};
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constexpr int gpuVmax = 750;
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constexpr int gpuVmin = 610;
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constexpr u16 CpuMinVolts[] = {800, 637, 620, 610};
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constexpr u32 CpuClkOfficial = 1963'500;
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constexpr u32 CpuVoltOfficial = 1120;
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constexpr cvb_entry_t GpuCvbTableDefault[] = {
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// GPUB01_NA_CVB_TABLE
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{76800, {}, {
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@@ -184,6 +189,10 @@ namespace ams::ldr::oc::pcv
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{},
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};
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constexpr int gpuVmin = 810;
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constexpr u32 CpuVoltOfficial = 1235;
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constexpr u32 CpuVoltL4T = 1235'000;
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constexpr u16 CpuMinVolts[] = {950, 850, 825, 810};
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@@ -21,7 +21,33 @@
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namespace ams::ldr::oc::pcv::erista
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{
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Result CpuFreqVdd(u32* ptr) {
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dvfs_rail* entry = reinterpret_cast<dvfs_rail *>(reinterpret_cast<u8 *>(ptr) - offsetof(dvfs_rail, freq));
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R_UNLESS(entry->id == 1, ldr::ResultInvalidCpuFreqVddEntry());
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R_UNLESS(entry->min_mv == 250'000, ldr::ResultInvalidCpuFreqVddEntry());
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R_UNLESS(entry->step_mv == 5000, ldr::ResultInvalidCpuFreqVddEntry());
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R_UNLESS(entry->max_mv == 1525'000, ldr::ResultInvalidCpuFreqVddEntry());
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if (C.eristaCpuUV) {
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if(!C.enableEristaCpuUnsafeFreqs) {
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PATCH_OFFSET(ptr, GetDvfsTableLastEntry(C.eristaCpuDvfsTable)->freq);
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} else {
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PATCH_OFFSET(ptr, GetDvfsTableLastEntry(C.eristaCpuDvfsTableUnsafeFreqs)->freq);
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}
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} else {
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PATCH_OFFSET(ptr, GetDvfsTableLastEntry(C.eristaCpuDvfsTable)->freq);
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}
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R_SUCCEED();
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}
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Result GpuVmin(u32 *ptr)
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{
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if (!C.eristaGpuVmin)
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R_SKIP();
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PATCH_OFFSET(ptr, (int)C.eristaGpuVmin);
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R_SUCCEED();
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}
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Result CpuVoltRange(u32 *ptr)
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{
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u32 min_volt_got = *(ptr - 1);
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@@ -41,42 +67,37 @@
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Result CpuVoltDfll(u32* ptr) {
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cvb_cpu_dfll_data *entry = reinterpret_cast<cvb_cpu_dfll_data *>(ptr);
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R_UNLESS(entry->tune0_low == 0x0000FFCF, ldr::ResultInvalidCpuVoltDfllEntry());
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R_UNLESS(entry->tune0_high == 0x00000000, ldr::ResultInvalidCpuVoltDfllEntry());
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R_UNLESS(entry->tune1_low == 0x012207FF, ldr::ResultInvalidCpuVoltDfllEntry());
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R_UNLESS(entry->tune1_high == 0x03FFF7FF, ldr::ResultInvalidCpuVoltDfllEntry());
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// R_UNLESS(entry->tune0_low == 0x0000FFCF, ldr::ResultInvalidCpuVoltDfllEntry());
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// R_UNLESS(entry->tune0_high == 0x00000000, ldr::ResultInvalidCpuVoltDfllEntry());
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// R_UNLESS(entry->tune1_low == 0x012207FF, ldr::ResultInvalidCpuVoltDfllEntry());
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// R_UNLESS(entry->tune1_high == 0x03FFF7FF, ldr::ResultInvalidCpuVoltDfllEntry());
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if(!C.eristaCpuUV) {
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R_SKIP();
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}
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PATCH_OFFSET(&(entry->dvco_calibration_max), 0x1C);
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PATCH_OFFSET(&(entry->tune1_high), 0x10);
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PATCH_OFFSET(&(entry->tune_high_margin_millivolts), 0xc);
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switch(C.eristaCpuUV) {
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case 0:
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break;
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case 1:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF88); //process_id 0 // EOS UV2
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); //process_id 0 // EOS UV1
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PATCH_OFFSET(&(entry->tune1_low), 0x027007FF);
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break;
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case 2:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF90); //process_id 1 // EOS Uv2
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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PATCH_OFFSET(&(entry->tune0_low), 0x0000EFFF); //process_id 1 // EOS Uv2
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PATCH_OFFSET(&(entry->tune1_low), 0x027407FF);
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break;
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case 3:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF98); //process_id 0 // EOS UV3
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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PATCH_OFFSET(&(entry->tune0_low), 0x0000DFFF); //process_id 0 // EOS UV3
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PATCH_OFFSET(&(entry->tune1_low), 0x027807FF);
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break;
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case 4:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFA0); //process_id 1 // EOS Uv4
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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PATCH_OFFSET(&(entry->tune0_low), 0x0000DFDF); //process_id 1 // EOS Uv4
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PATCH_OFFSET(&(entry->tune1_low), 0x027A07FF);
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break;
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case 5:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x022217FF);
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PATCH_OFFSET(&(entry->tune0_low), 0x0000CFDF); // EOS UV5
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PATCH_OFFSET(&(entry->tune1_low), 0x037007FF);
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break;
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default:
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break;
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@@ -337,9 +358,10 @@
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u32 GpuCvbDefaultMaxFreq = static_cast<u32>(GetDvfsTableLastEntry(GpuCvbTableDefault)->freq);
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PatcherEntry<u32> patches[] = {
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{ "CPU Freq Vdd", &CpuFreqVdd, 1, nullptr, CpuClkOSLimit },
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{"CPU Freq Table", CpuFreqCvbTable<false>, 1, nullptr, CpuCvbDefaultMaxFreq},
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{"CPU Volt Limit", &CpuVoltRange, 0, &CpuMaxVoltPatternFn},
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{ "CPU Volt Dfll", &CpuVoltDfll, 1, nullptr, 0x0000FFCF },
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{ "CPU Volt Limit", &CpuVoltRange, 13, nullptr, CpuVoltOfficial },
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{ "CPU Volt Dfll", &CpuVoltDfll, 1, nullptr, 0xFFEAD0FF },
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{"GPU Freq Table", GpuFreqCvbTable<false>, 1, nullptr, GpuCvbDefaultMaxFreq},
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{"GPU Freq Asm", &GpuFreqMaxAsm, 2, &GpuMaxClockPatternFn},
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{"GPU Freq PLL", &GpuFreqPllLimit, 1, nullptr, GpuClkPllLimit},
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@@ -347,6 +369,7 @@
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{"MEM Freq Max", &MemFreqMax, 0, nullptr, EmcClkOSLimit},
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{"MEM Freq PLLM", &MemFreqPllmLimit, 2, nullptr, EmcClkPllmLimit},
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{"MEM Volt", &MemVoltHandler, 2, nullptr, MemVoltHOS},
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{"GPU Vmin", &GpuVmin, 0, nullptr, gpuVmin},
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};
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for (uintptr_t ptr = mapped_nso;
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@@ -21,6 +21,22 @@
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namespace ams::ldr::oc::pcv::mariko {
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Result GpuVmin(u32 *ptr)
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{
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if (!C.marikoGpuVmin)
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R_SKIP();
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PATCH_OFFSET(ptr, (int)C.marikoGpuVmin);
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R_SUCCEED();
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}
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Result GpuVmax(u32 *ptr)
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{
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if (!C.marikoGpuVmax)
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R_SKIP();
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PATCH_OFFSET(ptr, (int)C.marikoGpuVmax);
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R_SUCCEED();
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}
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Result CpuFreqVdd(u32* ptr) {
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dvfs_rail* entry = reinterpret_cast<dvfs_rail *>(reinterpret_cast<u8 *>(ptr) - offsetof(dvfs_rail, freq));
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@@ -78,31 +94,31 @@
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case 0:
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break;
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case 1:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF88); //process_id 0 // EOS UV2
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF88); //process_id 0 // EOS UV1
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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break;
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case 2:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF90); //process_id 1 // EOS Uv2
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF90); /// EOS Uv2
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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break;
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case 3:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF98); //process_id 0 // EOS UV3
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FF98); // EOS UV3
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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break;
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case 4:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFA0); //process_id 1 // EOS Uv4
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFA0); // EOS Uv4
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x00000000);
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break;
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case 5:
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV6
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PATCH_OFFSET(&(entry->tune0_low), 0x0000FFFF); // EOS UV5
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PATCH_OFFSET(&(entry->tune0_high), 0x0000FFFF);
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PATCH_OFFSET(&(entry->tune1_low), 0x021107FF);
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PATCH_OFFSET(&(entry->tune1_high), 0x022217FF);
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@@ -647,7 +663,9 @@
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{ "MEM Freq Max", &MemFreqMax, 0, nullptr, EmcClkOSLimit },
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{ "MEM Freq PLLM", &MemFreqPllmLimit, 2, nullptr, EmcClkPllmLimit },
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{ "MEM Vddq", &EmcVddqVolt, 2, nullptr, EmcVddqDefault },
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{ "MEM Vdd2", &MemVoltHandler, 2, nullptr, MemVdd2Default }
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{ "MEM Vdd2", &MemVoltHandler, 2, nullptr, MemVdd2Default },
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{ "GPU Vmin", &GpuVmin, 0, nullptr, gpuVmin},
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{ "GPU Vmax", &GpuVmax, 0, nullptr, gpuVmax},
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};
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for (uintptr_t ptr = mapped_nso;
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@@ -65,6 +65,11 @@ def populate():
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voltages_e = [0] + list(range(700, 1100 + 1, 5)) # 0 first for Disabled
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processed_voltages_e = ["Disabled" if v == 0 else f"{v} mV" for v in voltages_e]
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processed_voltages_default = ["Default" if v == 0 else f"{v} mV" for v in voltages]
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voltages_vmin = [0] + list(range(480, 650 + 1, 5)) # 0 first for Disabled
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processed_voltages_vmin = ["Disabled" if v == 0 else f"{v} mV" for v in voltages_vmin]
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voltages_vmin_e = [0] + list(range(700, 850 + 1, 5)) # 0 first for Disabled
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processed_voltages_vmin_e = ["Disabled" if v == 0 else f"{v} mV" for v in voltages_vmin_e]
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freqs_khz = [
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76800, 153600, 230400, 307200, 384000, 460800, 537600, 614400, 691200, 768000,
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844800, 921600, 998400, 1075200, 1152000, 1228800, 1267200, 1305600, 1344000, 1382400, 1420800,
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@@ -72,7 +77,7 @@ def populate():
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]
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freqs_khz_e = [
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76800, 153600, 230400, 307200, 384000, 460800, 537600, 614400, 691200, 768000,
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844800, 921600, 998400, 1075200, 1152000
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844800, 921600, 998400, 1075200 #, 1152000, 1228800 # Disabled by default as these freqs can cause board damage
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]
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freqs_mhz = [
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76.8, 153.6, 230.4, 307.2, 384.0, 460.8, 537.6, 614.4, 691.2, 768.0,
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@@ -119,20 +124,28 @@ def populate():
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small=True,
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tag="volt_info"
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)
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# dpg.add_combo(
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# items=processed_voltages,
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# default_value="Disabled",
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# label="Gpu vMin",
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# callback=k.grab_kip_storage_values_no_mult,
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# tag="g_vmin"
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# )
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# dpg.add_combo(
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# items=processed_voltages,
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# default_value="Disabled",
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# label="Gpu vMax",
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# callback=k.grab_kip_storage_values_no_mult,
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# tag="g_vmax"
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# )
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dpg.add_combo(
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items=processed_voltages_vmin_e,
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default_value="Disabled",
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label="Erista GPU vMin",
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callback=k.grab_kip_storage_values_no_mult,
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tag="eristaGpuVmin"
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)
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dpg.add_combo(
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items=processed_voltages_vmin,
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default_value="Disabled",
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label="Mariko GPU vMin",
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callback=k.grab_kip_storage_values_no_mult,
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tag="marikoGpuVmin"
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)
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dpg.add_combo(
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items=processed_voltages,
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default_value="Disabled",
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label="Mariko GPU vMax",
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callback=k.grab_kip_storage_values_no_mult,
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tag="marikoGpuVmax"
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)
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dpg.add_separator(label="Undervolt")
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@@ -82,8 +82,13 @@ variables = [
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("g_volt_e_921600", "u32"),
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("g_volt_e_998400", "u32"),
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("g_volt_e_1075200", "u32"),
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("g_volt_e_1152000", "u32"),
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# ("g_volt_e_1152000", "u32"),
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# ("g_volt_e_1228800", "u32"),
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("marikoCpuVmin", "u32"),
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("eristaGpuVmin", "u32"),
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("marikoGpuVmin", "u32"),
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("marikoGpuVmax", "u32"),
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]
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fmt_map = {
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@@ -141,11 +146,14 @@ def load_all_vars():
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for e_freq in [
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"76800", "153600", "230400", "307200", "384000", "460800", "537600",
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"614400", "691200", "768000", "844800", "921600", "998400", "1075200",
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"1152000"
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"614400", "691200", "768000", "844800", "921600", "998400", "1075200"# ,
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# "1152000", "1228800"
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]:
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c.load_entry_object(f"g_volt_e_{e_freq}", 3)
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c.load_entry_object("marikoCpuVmin", 3)
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c.load_entry_object("eristaGpuVmin", 3)
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c.load_entry_object("marikoGpuVmin", 3)
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c.load_entry_object("marikoGpuVmax", 3)
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def freq_to_label(freq):
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if freq > 1382400:
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@@ -240,7 +248,7 @@ def write_kip():
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if not d.autosave:
|
||||
c.show_popup("Success", "KIP saved successfully!")
|
||||
|
||||
def read_kip(filename, debug=True):
|
||||
def read_kip(filename):
|
||||
MAGIC = b"CUST"
|
||||
struct_fmt = make_struct_format(variables)
|
||||
struct_size = struct.calcsize(struct_fmt)
|
||||
@@ -254,21 +262,20 @@ def read_kip(filename, debug=True):
|
||||
values = struct.unpack(struct_fmt, raw)
|
||||
for (attr_name, _), val in zip(variables, values):
|
||||
setattr(d, attr_name, val)
|
||||
if debug:
|
||||
print("=== debug KIP layout ===")
|
||||
offset = 0
|
||||
for (attr_name, t) in variables:
|
||||
code = fmt_map[t]
|
||||
align = 8 if code == "d" else 4
|
||||
padding = (-offset) % align
|
||||
if padding:
|
||||
offset += padding
|
||||
size = struct.calcsize(code)
|
||||
raw_bytes = raw[offset:offset + size]
|
||||
val = getattr(d, attr_name)
|
||||
print(f"{attr_name:<20} | type={t:<6} | offset={offset:<4} | size={size:<2} | raw=0x{raw_bytes.hex()} | val={val}")
|
||||
offset += size
|
||||
print("========================")
|
||||
print("=== value layout ===")
|
||||
offset = 0
|
||||
for (attr_name, t) in variables:
|
||||
code = fmt_map[t]
|
||||
align = 8 if code == "d" else 4
|
||||
padding = (-offset) % align
|
||||
if padding:
|
||||
offset += padding
|
||||
size = struct.calcsize(code)
|
||||
raw_bytes = raw[offset:offset + size]
|
||||
val = getattr(d, attr_name)
|
||||
print(f"{attr_name:<20} | type={t:<6} | offset={offset:<4} | size={size:<2} | raw=0x{raw_bytes.hex()} | val={val}")
|
||||
offset += size
|
||||
print("========================")
|
||||
dpg.set_value("gpu_sched", g.check_gpu_sched())
|
||||
dpg.show_item("gpu_tab")
|
||||
dpg.show_item("cpu_tab")
|
||||
|
||||
@@ -90,7 +90,9 @@ with dpg.texture_registry(show=False):
|
||||
|
||||
with dpg.file_dialog(directory_selector=False, show=False, tag="file_dialog", width=500, height=300, modal=True, callback=k.store):
|
||||
dpg.add_file_extension(".kip")
|
||||
|
||||
def refresh_drives():
|
||||
setattr(ins, "drive_list", ins.get_drives())
|
||||
dpg.configure_item("drive_select", items=ins.drive_list)
|
||||
with dpg.window(label="Configurator", width=400, height=300,id="main_window"):
|
||||
with dpg.tab_bar():
|
||||
with dpg.tab(label="File"):
|
||||
@@ -102,9 +104,11 @@ with dpg.window(label="Configurator", width=400, height=300,id="main_window"):
|
||||
callback=lambda: webbrowser.open("https://github.com/souldbminersmwc/Horizon-OC")
|
||||
)
|
||||
dpg.add_separator(label="Installation")
|
||||
dpg.add_button(label="Refresh Drive List", callback=refresh_drives)
|
||||
dpg.add_combo(
|
||||
items=ins.drive_list,
|
||||
default_value="Select a drive!",
|
||||
tag="drive_select",
|
||||
callback=ins.check_atmosphere
|
||||
)
|
||||
dpg.add_checkbox(label="Autosave", default_value=false, callback=ins.autosave_toggle)
|
||||
|
||||
@@ -183,7 +183,7 @@ def set_psm_value(sender, app_data):
|
||||
value = next((x["value"] for x in PSM_OPTIONS if x["name"] == app_data), None)
|
||||
if value:
|
||||
ini.set_ini_values(str(ini_path), "psm", {"current_psm_mA": value})
|
||||
common.show_popup("Success", f"PSM set to {app_data}")
|
||||
common.show_popup("Success", f"Charge Limit set to {app_data}")
|
||||
|
||||
def remove_tc_entries():
|
||||
ini_path = get_ini_path()
|
||||
@@ -337,7 +337,7 @@ def populate():
|
||||
dpg.add_image("coolerhd", width=20, height=20)
|
||||
|
||||
def set_white_tiger_clocks(app_data):
|
||||
|
||||
# cooler aah clocks
|
||||
# 1400mv emc max
|
||||
# 1375mv cpu max
|
||||
# 750mv vdd2 mariko max
|
||||
|
||||
@@ -42,4 +42,4 @@ cp -vf "$ROOT_DIR/overlay/out/sys-clk-overlay.ovl" "$DIST_DIR/switch/.overlays/s
|
||||
echo "*** assets ***"
|
||||
mkdir -p "$DIST_DIR/config/sys-clk"
|
||||
cp -vf "$ROOT_DIR/config.ini.template" "$DIST_DIR/config/sys-clk/config.ini.template"
|
||||
cp -vf "$ROOT_DIR/README.md" "$DIST_DIR/README.md"
|
||||
cp -vf "$ROOT_DIR/../../README.md" "$DIST_DIR/README.md"
|
||||
|
||||
Reference in New Issue
Block a user