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- [MEM] Replace 1331.2 MHz with 1600 MHz

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- [MEM] Update timings

- [CPU] (Auto-)Boost freq is now 1785 MHz

- [Sys-clk-OC] Add charging and fast charging toggles in overlay
This commit is contained in:
KazushiM
2021-12-25 18:32:23 +08:00
parent f2215a25ed
commit 4f922a1615
27 changed files with 444 additions and 128 deletions
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58
Source/Atmosphere/stratosphere/loader/source/ldr_oc_patch.hpp
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@@ -1,12 +1,12 @@
//#define EXPERIMENTAL
constexpr ro::ModuleId PcvModuleId[] = {
ParseModuleId("91D61D59D7002378E35584FC0B38C7693A3ABAB5"), //11.0.0
ParseModuleId("C503E96550F302E121873136B814A529863D949B"), //12.x
// ParseModuleId("91D61D59D7002378E35584FC0B38C7693A3ABAB5"), //11.0.0
// ParseModuleId("C503E96550F302E121873136B814A529863D949B"), //12.x
ParseModuleId("2058C97C551571506656AA04EC85E2B1B01B155C"), //13.0.0-13.2.0
};
constexpr ro::ModuleId PtmModuleId[] = {
ParseModuleId("A79706954C6C45568B0FFE610627E2E89D8FB0D4"), //12.x
// ParseModuleId("A79706954C6C45568B0FFE610627E2E89D8FB0D4"), //12.x
ParseModuleId("2CA78D4066C1C11317CC2705EBADA9A51D3AC981"), //13.0.0-13.2.0
};
@@ -39,24 +39,24 @@ namespace pcv {
/* CPU */
constexpr u32 CpuVoltageLimitOffsets[][11] = {
{ 0xE1A8C, 0xE1A98, 0xE1AA4, 0xE1AB0, 0xE1AF8, 0xE1B04, 0xE1B10, 0xE1B1C, 0xE1B28, 0xE1B34, 0xE1F4C },
{ 0xF08DC, 0xF08E8, 0xF08F4, 0xF0900, 0xF0948, 0xF0954, 0xF0960, 0xF096C, 0xF0978, 0xF0984, 0xF0D9C },
// { 0xE1A8C, 0xE1A98, 0xE1AA4, 0xE1AB0, 0xE1AF8, 0xE1B04, 0xE1B10, 0xE1B1C, 0xE1B28, 0xE1B34, 0xE1F4C },
// { 0xF08DC, 0xF08E8, 0xF08F4, 0xF0900, 0xF0948, 0xF0954, 0xF0960, 0xF096C, 0xF0978, 0xF0984, 0xF0D9C },
{ 0xF092C, 0xF0938, 0xF0944, 0xF0950, 0xF0998, 0xF09A4, 0xF09B0, 0xF09BC, 0xF09C8, 0xF09D4, 0xF0DEC },
};
constexpr u32 NewCpuVoltageLimit = 1220;
static_assert(NewCpuVoltageLimit <= 1300); //1300mV hangs for me
constexpr u32 CpuVoltageOldTableCoeff[][10] = {
{ 0xE2140, 0xE2178, 0xE21B0, 0xE21E8, 0xE2220, 0xE2258, 0xE2290, 0xE22C8, 0xE2300, 0xE2338 },
{ 0xF0F90, 0xF0FC8, 0xF1000, 0xF1038, 0xF1070, 0xF10A8, 0xF10E0, 0xF1118, 0xF1150, 0xF1188 },
// { 0xE2140, 0xE2178, 0xE21B0, 0xE21E8, 0xE2220, 0xE2258, 0xE2290, 0xE22C8, 0xE2300, 0xE2338 },
// { 0xF0F90, 0xF0FC8, 0xF1000, 0xF1038, 0xF1070, 0xF10A8, 0xF10E0, 0xF1118, 0xF1150, 0xF1188 },
{ 0xF0FE0, 0xF1018, 0xF1050, 0xF1088, 0xF10C0, 0xF10F8, 0xF1130, 0xF1168, 0xF11A0, 0xF11D8 },
};
constexpr u32 CpuVoltageScale = 1000;
constexpr u32 NewCpuVoltageScaled = NewCpuVoltageLimit * CpuVoltageScale;
constexpr u32 CpuTablesFreeSpace[] = {
0xE2350,
0xF11A0,
// 0xE2350,
// 0xF11A0,
0xF11F0,
};
// TODO: correctly derive c0-c1 dfll coefficients
@@ -88,23 +88,23 @@ namespace pcv {
static_assert(sizeof(NewCpuTables) <= sizeof(cpu_freq_cvb_table_t)*14);
constexpr u32 MaxCpuClockOffset[] = {
0xE2740,
0xF1590,
// 0xE2740,
// 0xF1590,
0xF15E0,
};
constexpr u32 NewMaxCpuClock = 2397000;
/* GPU */
constexpr u32 GpuVoltageLimitOffsets[] = {
0xE3044,
0xF1E94,
// 0xE3044,
// 0xF1E94,
0xF1EE4,
};
constexpr u32 NewGpuVoltageLimit = 1170; // default max 1050mV
constexpr u32 GpuTablesFreeSpace[] = {
0xE3410,
0xF2260,
// 0xE3410,
// 0xF2260,
0xF22B0,
};
// TODO: correctly derive c0-c5 coefficients
@@ -132,8 +132,8 @@ namespace pcv {
static_assert(sizeof(NewGpuTables) <= sizeof(gpu_cvb_pll_table_t)*15);
constexpr u32 Reg1MaxGpuOffset[] = {
0x2E0AC,
0x3F6CC,
// 0x2E0AC,
// 0x3F6CC,
0x3F12C,
};
constexpr u8 Reg1NewMaxGpuClock[][0xC] = {
@@ -149,14 +149,14 @@ namespace pcv {
* MOVK W13,#0x17,LSL #16
* NOP
*/
{ 0x0D, 0x00, 0x8E, 0x52, 0xED, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 },
{ 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 },
// { 0x0D, 0x00, 0x8E, 0x52, 0xED, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 },
// { 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 },
{ 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, 0x1F, 0x20, 0x03, 0xD5 },
};
constexpr u32 Reg2MaxGpuOffset[] = {
0x2E110,
0x3F730,
// 0x2E110,
// 0x3F730,
0x3F190,
};
constexpr u8 Reg2NewMaxGpuClock[][0x8] = {
@@ -170,8 +170,8 @@ namespace pcv {
* MOV W13,#0x7000
* MOVK W13,#0x17,LSL #16
*/
{ 0x0D, 0x00, 0x8E, 0x52, 0xED, 0x02, 0xA0, 0x72, },
{ 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, },
// { 0x0D, 0x00, 0x8E, 0x52, 0xED, 0x02, 0xA0, 0x72, },
// { 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, },
{ 0x0B, 0x00, 0x8E, 0x52, 0xEB, 0x02, 0xA0, 0x72, },
};
@@ -196,6 +196,10 @@ namespace pcv {
// { 1600000, { 675, 650, 637, } },
// };
constexpr u32 EmcDvb1331[] = {
0xF0688,
};
// Sourced from 13.x pcv module
// 1st regulator table, 0x142778 - 0x143BB4, if mask = 0b0110101
// 2nd regulator table, 0x143BB8 - 0x144FF4, if mask = 0b1010011
@@ -249,15 +253,15 @@ namespace pcv {
// Mariko have 3 mtc tables (204/1331/1600 MHz), only these 3 frequencies could be set.
constexpr u32 EmcFreqOffsets[][30] = {
{ 0xD7C60, 0xD7C68, 0xD7C70, 0xD7C78, 0xD7C80, 0xD7C88, 0xD7C90, 0xD7C98, 0xD7CA0, 0xD7CA8, 0xE1800, 0xEEFA0, 0xF2478, 0xFE284, 0x10A304, 0x10D7DC, 0x110A40, 0x113CA4, 0x116F08, 0x11A16C, 0x11D3D0, 0x120634, 0x123898, 0x126AFC, 0x129D60, 0x12CFC4, 0x130228, 0x13BFE0, 0x140D00, 0x140D50, },
{ 0xE1810, 0xE6530, 0xE6580, 0xE6AB0, 0xE6AB8, 0xE6AC0, 0xE6AC8, 0xE6AD0, 0xE6AD8, 0xE6AE0, 0xE6AE8, 0xE6AF0, 0xE6AF8, 0xF0650, 0xFDDF0, 0x1012C8, 0x10D0D4, 0x119154, 0x11C62C, 0x11F890, 0x122AF4, 0x125D58, 0x128FBC, 0x12C220, 0x12F484, 0x1326E8, 0x13594C, 0x138BB0, 0x13BE14, 0x13F078, },
// { 0xD7C60, 0xD7C68, 0xD7C70, 0xD7C78, 0xD7C80, 0xD7C88, 0xD7C90, 0xD7C98, 0xD7CA0, 0xD7CA8, 0xE1800, 0xEEFA0, 0xF2478, 0xFE284, 0x10A304, 0x10D7DC, 0x110A40, 0x113CA4, 0x116F08, 0x11A16C, 0x11D3D0, 0x120634, 0x123898, 0x126AFC, 0x129D60, 0x12CFC4, 0x130228, 0x13BFE0, 0x140D00, 0x140D50, },
// { 0xE1810, 0xE6530, 0xE6580, 0xE6AB0, 0xE6AB8, 0xE6AC0, 0xE6AC8, 0xE6AD0, 0xE6AD8, 0xE6AE0, 0xE6AE8, 0xE6AF0, 0xE6AF8, 0xF0650, 0xFDDF0, 0x1012C8, 0x10D0D4, 0x119154, 0x11C62C, 0x11F890, 0x122AF4, 0x125D58, 0x128FBC, 0x12C220, 0x12F484, 0x1326E8, 0x13594C, 0x138BB0, 0x13BE14, 0x13F078, },
{ 0xE1860, 0xE6580, 0xE65D0, 0xE6B00, 0xE6B08, 0xE6B10, 0xE6B18, 0xE6B20, 0xE6B28, 0xE6B30, 0xE6B38, 0xE6B40, 0xE6B48, 0xF06A0, 0xFDE40, 0x101318, 0x10D124, 0x1191A4, 0x11C67C, 0x11F8E0, 0x122B44, 0x125DA8, 0x12900C, 0x12C270, 0x12F4D4, 0x132738, 0x13599C, 0x138C00, 0x13BE64, 0x13F0C8, },
};
// Mariko mtc tables starting from rev, see mtc_timing_table.hpp for parameters.
// All mariko mtc tables will be patched to simplify the procedure.
constexpr u32 MtcTable_1600[][13] = {
{ 0x1012D8, 0x11C63C, 0x11F8A0, 0x122B04, 0x125D68, 0x128FCC, 0x12C230, 0x12F494, 0x1326F8, 0x13595C, 0x138BC0, 0x13BE24, 0x13F088 }, // 13.x
{ 0x1012D8, 0x11C63C, 0x11F8A0, 0x122B04, 0x125D68, 0x128FCC, 0x12C230, 0x12F494, 0x1326F8, 0x13595C, 0x138BC0, 0x13BE24, 0x13F088 },
};
constexpr u32 MtcTableOffset = 0x10CC;
@@ -793,7 +797,7 @@ namespace pcv {
namespace ptm {
constexpr u32 EmcOffsetStart[] = {
0xC5E24,
// 0xC5E24,
0xA032C,
};