[RAM@2131.2MHz] Add DRAM timing adjusment, 2131.2 MHz should work for all ram chips and achieves higher bandwidth;
[Fix] Revert to permanent RAM clock (ptm-patch); No longer actively maintained next year.
This commit is contained in:
@@ -256,8 +256,8 @@ namespace pcv {
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// Mariko mtc tables starting from rev, see mtc_timing_table.hpp for parameters.
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// All mariko mtc tables will be patched to simplify the procedure.
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constexpr u32 MtcTable_1600[13] = {
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0x1012D8, 0x11C63C, 0x11F8A0, 0x122B04, 0x125D68, 0x128FCC, 0x12C230, 0x12F494, 0x1326F8, 0x13595C, 0x138BC0, 0x13BE24, 0x13F088
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constexpr u32 MtcTable_1600[][13] = {
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{ 0x1012D8, 0x11C63C, 0x11F8A0, 0x122B04, 0x125D68, 0x128FCC, 0x12C230, 0x12F494, 0x1326F8, 0x13595C, 0x138BC0, 0x13BE24, 0x13F088 }, // 13.x
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};
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constexpr u32 MtcTableOffset = 0x10CC;
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@@ -15,7 +15,7 @@
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*/
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#include <stratosphere.hpp>
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#include "ldr_patcher.hpp"
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//#define ADJUST_TIMING
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#define ADJUST_TIMING
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namespace ams::ldr {
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@@ -68,10 +68,11 @@ namespace ams::ldr {
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}
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u32 GetEmcClock() {
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// RAM freqs to choose: 1600000, 1728000, 1795200, 1862400, 1894400, 1932800, 1996800, 2064000, 2099200, 2131200
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// RAM overclock could be UNSTABLE on some RAM without bumping up voltage,
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// and therefore show graphical glitches, hang randomly or even worse, corrupt your NAND
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return 1862400;
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// RAM freqs from Hekate:
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// 1600000, 1728000, 1795200, 1862400, 1894400, 1932800, 1996800, 2064000, 2099200, 2131200
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// Other values might work as well
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// RAM overclock could be UNSTABLE and generate graphical glitches / instabilities / NAND corruption
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return 2131200;
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}
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u32 GetCpuBoostClock() {
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@@ -185,8 +186,8 @@ namespace ams::ldr {
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}
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#ifdef ADJUST_TIMING
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/* Adjust timing parameters in 1600MHz mtc tables */
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u32 param_1331, param_1600;
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#define ADJUST_PROPORTIONAL(TARGET_TABLE, REF_TABLE, PARAM) \
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param_1331 = REF_TABLE->PARAM; \
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param_1600 = TARGET_TABLE->PARAM; \
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@@ -207,10 +208,10 @@ namespace ams::ldr {
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divn = divn * 2 + 1;
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}
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if (i == 2) {
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for (u32 j = 0; j < sizeof(pcv::MtcTable_1600)/sizeof(u32); j++) {
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pcv::MarikoMtcTable* mtc_table_1600 = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[j]);
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pcv::MarikoMtcTable* mtc_table_1331 = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[j] - pcv::MtcTableOffset);
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if (i >= 2) {
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for (u32 j = 0; j < sizeof(pcv::MtcTable_1600[i-2])/sizeof(u32); j++) {
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pcv::MarikoMtcTable* mtc_table_1600 = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[i-2][j]);
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pcv::MarikoMtcTable* mtc_table_1331 = reinterpret_cast<pcv::MarikoMtcTable *>(mapped_nso + pcv::MtcTable_1600[i-2][j] - pcv::MtcTableOffset);
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/* Patch parameters that seem like timings */
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rc);
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@@ -228,27 +229,17 @@ namespace ams::ldr {
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rd_rcd);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_wr_rcd);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rrd);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_wdv);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_wsv);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_wev);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_wdv_mask); //?
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_quse);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_quse_width);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_einput);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_einput_duration);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_qsafe);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rdv);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rdv_mask); //?
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rdv_early);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rdv_early_mask); //?
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_refresh);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_pre_refresh_req_cnt);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_pdex2wr);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_pdex2rd);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_act2pden);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_rw2pden);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_cke2pden);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_pdex2mrr);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_txsr);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_txsrdll);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_tcke);
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@@ -258,15 +249,11 @@ namespace ams::ldr {
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_trpab);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_tclkstop);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_trefbw);
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//ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_pmacro_ddll_long_cmd_4); //?
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_pmacro_dll_cfg_2);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_qpop);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_tr_rdv);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_tr_qpop);
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_tr_rdv_mask); //?
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ADJUST_PROP_WITHIN_ALL_REG(mtc_table_1600, mtc_table_1331, emc_tr_qsafe);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, dram_timings.rl);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, burst_mc_regs.mc_emem_arb_timing_rcd);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, burst_mc_regs.mc_emem_arb_timing_rp);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, burst_mc_regs.mc_emem_arb_timing_rc);
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@@ -276,7 +263,10 @@ namespace ams::ldr {
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, burst_mc_regs.mc_emem_arb_timing_r2w);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, burst_mc_regs.mc_emem_arb_timing_w2r);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, burst_mc_regs.mc_emem_arb_timing_rfcpb);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, la_scale_regs.mc_mll_mpcorer_ptsa_rate);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, la_scale_regs.mc_ptsa_grant_decrement);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, min_mrs_wait);
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ADJUST_PROPORTIONAL(mtc_table_1600, mtc_table_1331, latency);
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@@ -289,16 +279,16 @@ namespace ams::ldr {
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}
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}
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// u32 PtmEmcClock = GetEmcClock() * 1000;
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u32 PtmEmcClock = GetEmcClock() * 1000;
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u32 CpuBoostClock = GetCpuBoostClock() * 1000;
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for (u32 i = 0; i < sizeof(PtmModuleId)/sizeof(ro::ModuleId); i++) {
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if (std::memcmp(std::addressof(PtmModuleId[i]), std::addressof(module_id), sizeof(module_id)) == 0) {
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// for (u32 j = 0; j < 16; j++) {
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// std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &PtmEmcClock, sizeof(PtmEmcClock));
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// std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &PtmEmcClock, sizeof(PtmEmcClock));
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// }
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for (u32 j = 0; j < 16; j++) {
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j), &PtmEmcClock, sizeof(PtmEmcClock));
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::OffsetInterval * j + 0x4), &PtmEmcClock, sizeof(PtmEmcClock));
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}
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for (u32 j = 0; j < 2; j++) {
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::CpuBoostOffset + ptm::OffsetInterval * j), &CpuBoostClock, sizeof(CpuBoostClock));
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std::memcpy(reinterpret_cast<void *>(mapped_nso + ptm::EmcOffsetStart[i] + ptm::CpuBoostOffset + ptm::OffsetInterval * j + 0x4), &CpuBoostClock, sizeof(CpuBoostClock));
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@@ -65,7 +65,7 @@ From Hekate Minerva module [sys_sdrammtc.c](https://github.com/CTCaer/hekate/blo
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- 1996
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- 1932
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- 1894
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- 1862 → official max for Erista; Mariko (stable on most DRAM chips except Hynix ones) (with timings for 1600MHz and no overvolting – capped at 600 mV)
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- 1862 → official max for Erista; Mariko without timing adjustment (stable on most DRAM chips except Hynix ones)
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- 1795
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- 1728
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- 1600 → official docked & official boost mode
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@@ -131,19 +131,14 @@ Presets can be customized by adding them to the ini config file located at `/con
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[Application Title ID]
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docked_cpu=
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docked_gpu=
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docked_mem=
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handheld_charging_cpu=
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handheld_charging_gpu=
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handheld_charging_mem=
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handheld_charging_usb_cpu=
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handheld_charging_usb_gpu=
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handheld_charging_usb_mem=
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handheld_charging_official_cpu=
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handheld_charging_official_gpu=
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handheld_charging_official_mem=
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handheld_cpu=
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handheld_gpu=
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handheld_mem=
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```
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* Replace `Application Title ID` with the title id of the game/application you're interested in customizing.
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@@ -165,7 +160,6 @@ Leads to a smoother framerate overall (ex: in the korok forest)
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[01007EF00011E000]
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docked_cpu=1224
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handheld_charging_cpu=1224
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handheld_mem=1600
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```
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### Example 2: Picross
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@@ -77,7 +77,7 @@ AdvancedSettingsTab::AdvancedSettingsTab()
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});
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// MEM
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brls::SelectListItem *memFreqListItem = createFreqListItem(SysClkModule_MEM, context.overrideFreqs[SysClkModule_MEM] / 1000000);
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/*brls::SelectListItem *memFreqListItem = createFreqListItem(SysClkModule_MEM, context.overrideFreqs[SysClkModule_MEM] / 1000000);
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memFreqListItem->getValueSelectedEvent()->subscribe([](int result)
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{
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Result rc = result == 0 ?
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@@ -90,7 +90,7 @@ AdvancedSettingsTab::AdvancedSettingsTab()
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errorResult(result == 0 ? "sysclkIpcRemoveOverride" : "sysclkIpcSetOverride", rc);
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// TODO: Reset selected value
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}
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});
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});*/
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this->addView(cpuFreqListItem);
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this->addView(gpuFreqListItem);
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@@ -116,7 +116,7 @@ void AppProfileFrame::addFreqs(brls::List* list, SysClkProfile profile)
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list->addView(gpuListItem);
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// MEM
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brls::SelectListItem* memListItem = createFreqListItem(SysClkModule_MEM, this->profiles.mhzMap[profile][SysClkModule_MEM]);
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/*brls::SelectListItem* memListItem = createFreqListItem(SysClkModule_MEM, this->profiles.mhzMap[profile][SysClkModule_MEM]);
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this->profiles.mhzMap[profile][SysClkModule_MEM] *= 1000000;
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@@ -126,7 +126,7 @@ void AppProfileFrame::addFreqs(brls::List* list, SysClkProfile profile)
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brls::Logger::debug("Caching freq for module %d and profile %d to %" PRIu32, SysClkModule_MEM, profile, this->profiles.mhzMap[profile][SysClkModule_MEM]);
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});
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list->addView(memListItem);
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list->addView(memListItem);*/
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}
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void AppProfileFrame::onProfileChanged()
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@@ -110,10 +110,7 @@ brls::SelectListItem* createFreqListItem(SysClkModule module, uint32_t selectedF
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selected = i + 1;
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char clock[16];
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if (freq == 1600000000)
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snprintf(clock, sizeof(clock), "Max MHz");
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else
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snprintf(clock, sizeof(clock), "%d MHz", freq / 1000000);
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snprintf(clock, sizeof(clock), "%d MHz", freq / 1000000);
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clocks.push_back(std::string(clock));
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@@ -20,10 +20,6 @@ static inline std::string formatListFreqMhz(std::uint32_t mhz)
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{
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return FREQ_DEFAULT_TEXT;
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}
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else if (mhz == 1600)
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{
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return "Max MHz";
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}
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char buf[10];
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return std::string(buf, snprintf(buf, sizeof(buf), "%u MHz", mhz));
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@@ -62,7 +62,7 @@ void AppProfileGui::addProfileUI(SysClkProfile profile)
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this->listElement->addItem(new tsl::elm::CategoryHeader(sysclkFormatProfile(profile, true)));
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this->addModuleListItem(profile, SysClkModule_CPU, &sysclk_g_freq_table_cpu_hz[0]);
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this->addModuleListItem(profile, SysClkModule_GPU, &sysclk_g_freq_table_gpu_hz[0]);
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this->addModuleListItem(profile, SysClkModule_MEM, &sysclk_g_freq_table_mem_hz[0]);
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//this->addModuleListItem(profile, SysClkModule_MEM, &sysclk_g_freq_table_mem_hz[0]);
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}
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void AppProfileGui::listUI()
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@@ -62,7 +62,7 @@ void GlobalOverrideGui::listUI()
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{
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this->addModuleListItem(SysClkModule_CPU, &sysclk_g_freq_table_cpu_hz[0]);
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this->addModuleListItem(SysClkModule_GPU, &sysclk_g_freq_table_gpu_hz[0]);
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this->addModuleListItem(SysClkModule_MEM, &sysclk_g_freq_table_mem_hz[0]);
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//this->addModuleListItem(SysClkModule_MEM, &sysclk_g_freq_table_mem_hz[0]);
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}
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void GlobalOverrideGui::refresh()
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@@ -247,10 +247,6 @@ void ClockManager::Tick()
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if (hz)
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{
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hz = Clocks::GetNearestHz((SysClkModule)module, isEnabledReverseNX ? RealProfile : this->context->profile, hz);
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if (module == SysClkModule_MEM && hz == 1600'000'000 && this->context->freqs[module] >= hz)
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{
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continue;
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}
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if (hz != this->context->freqs[module] && this->context->enabled)
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{
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@@ -446,6 +442,13 @@ bool ClockManager::RefreshContext()
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{
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hz = Clocks::GetCurrentHz((SysClkModule)module);
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// Skip MEM freq check
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if (module == SysClkModule_MEM)
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{
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this->context->freqs[module] = hz;
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break;
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}
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// Round to MHz
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uint32_t cur_mhz = hz/1000'000;
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uint32_t be4_mhz = this->context->freqs[module]/1000'000;
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@@ -179,10 +179,10 @@ void Clocks::ResetToStock(unsigned int module)
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{
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Clocks::SetHz(SysClkModule_GPU, apmConfiguration->gpu_hz);
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}
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if (module == SysClkModule_EnumMax || module == SysClkModule_MEM)
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{
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Clocks::SetHz(SysClkModule_MEM, apmConfiguration->mem_hz);
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}
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// if (module == SysClkModule_EnumMax || module == SysClkModule_MEM)
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// {
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// Clocks::SetHz(SysClkModule_MEM, apmConfiguration->mem_hz);
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// }
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}
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else
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{
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@@ -225,6 +225,9 @@ SysClkProfile Clocks::GetCurrentProfile()
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void Clocks::SetHz(SysClkModule module, std::uint32_t hz)
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{
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if (module == SysClkModule_MEM)
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return;
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Result rc = 0;
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if(hosversionAtLeast(8,0,0))
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