Add live tuning adjustment to rewrite

This commit is contained in:
Lightos1
2026-03-21 17:37:52 +01:00
parent a697cac43c
commit 3b907d3ca0
3 changed files with 106 additions and 13 deletions

View File

@@ -27,14 +27,105 @@
#include <switch.h>
#include <sysclk.h>
#include <memmem.h>
#include <registers.h>
#include <cstring>
#include "board.hpp"
#include "board_freq.hpp"
#include "board_volt.hpp"
#include "../file_utils.h"
namespace board {
GpuVoltData voltData = {};
u64 cldvfs;
CpuDfllData cachedTune;
void CacheDfllData() {
u64 temp;
rc = svcQueryMemoryMapping(&cldvfs, &temp, CLDVFS_REGION_BASE, CLDVFS_REGION_SIZE);
ASSERT_RESULT_OK(rc, "svcQueryMemoryMapping (cldvfs)");
if (GetSocType() == SysClkSocType_Erista) {
cachedTune.tune0Low = *static_cast<u32 *>(cldvfs + CL_DVFS_TUNE0_0);
cachedTune.tune1Low = *static_cast<u32 *>(cldvfs + CL_DVFS_TUNE1_0);
} else {
SetHz(SysClkModule_CPU, 1785000000);
cachedTune.tune0High = *static_cast<u32 *>(cldvfs + CL_DVFS_TUNE0_0);
ResetToStockCpu();
}
}
/* TODO: clean up this code. */
void SetDfllTunings(u32 levelLow, u32 levelHigh, u32 tbreakPoint) {
u32* tune0_ptr = static_cast<u32 *>(cldvfs + CL_DVFS_TUNE0_0);
u32* tune1_ptr = static_cast<u32 *>(cldvfs + CL_DVFS_TUNE1_0);
if (GetSocType() == SysClkSocType_Mariko) {
if (GetHz(SysClkModule_CPU) < tbreakPoint && (levelLow || levelHigh)) {
if (levelLow) {
*tune0_ptr = marikoCpuUvLow[levelLow-1].tune0_low;
*tune1_ptr = marikoCpuUvLow[levelLow-1].tune1_low;
}
return;
} else {
if (levelLow) {
*tune0_ptr = marikoCpuUvLow[levelLow-1].tune0_low;
*tune1_ptr = marikoCpuUvLow[levelLow-1].tune1_low;
}
if (levelHigh) {
*tune0_ptr = marikoCpuUvHigh[levelHigh-1].tune0_high;
*tune1_ptr = marikoCpuUvHigh[levelHigh-1].tune1_high;
}
return;
}
if (GetHz(SysClkModule_CPU) < tbreakPoint || (!levelLow)) { // account for tbreak
*tune0_ptr = 0xCFFF;
*tune1_ptr = 0xFF072201;
return;
} else if (GetHz(SysClkModule_CPU) >= tbreakPoint || (!levelHigh)) {
*tune0_ptr = cachedTune.tune0High; // per console?
*tune1_ptr = 0xFFF7FF3F;
return;
}
} else {
if (GetHz(SysClkModule_CPU) < tbreakPoint || (!levelLow)) { // account for tbreak
*tune0_ptr = cachedTune.tune0Low; // I think each erista has a different tune0/tune1?
*tune1_ptr = cachedTune.tune1Low;
return;
} else {
if (levelLow) {
*tune0_ptr = eristaCpuUvTable[levelLow-1].tune0;
*tune1_ptr = eristaCpuUvTable[levelLow-1].tune1;
} else {
*tune0_ptr = 0x0;
*tune1_ptr = 0x0;
}
}
}
}
/*
enum TableConfig: u32 {
DEFAULT_TABLE = 1,
TBREAK_1581 = 2,
TBREAK_1683 = 3,
EXTREME_TABLE = 4,
};
*/
u32 CalculateTbreak(u32 table) {
if (GetSocType() == SysClkSocType_Erista) {
return 1581000000;
} else {
switch (table) {
case 1 ... 2:
case 4:
return 1581000000;
case 3:
return 1683000000;
default:
return 1581000000;
}
}
}
/*
* Switch Power domains (max77620):