readme; ignore EmcDvbTable

README.md

@@ -33,20 +33,21 @@ Overclocking suite for Switch **(Mariko Only)** running on Atmosphere CFW. Suppo
 #### Details
 
 - **Overclock**
-  - **Safe CPU/GPU OC clock: 1963.5/1267.2 MHz**.
+  - **Official X1+ CPU/GPU OC clock: 1963.5/1267.2 MHz**.
     - Anything above that are not in the table of official module and are all wild guess.
-    - Max clock(2397.0/1344.0 MHz) may not work on some SoCs.
+    - Coefficients are not correctly calculated, so max clock(2397.0/1344.0 MHz) may not work on some devices. ([#4](https://github.com/KazushiMe/Switch-OC-Suite/issues/4))
   - **Recommended RAM clock: 1862.4 MHz** @ 600mV, (**1795.2 MHz for Hynix** ones).
     - **RAM clock is set permanently** via **ptm-patch**, rather than sys-clk.
     - Use Hekate to check out the brand of your RAM chips.
     - EM shielding & thermal paste for RAM chips and testing with emuNAND before long-term usage.
-    - [WIP] Mariko RAM overvolting: rebuilding hekate is required.
+  - [WIP] [Mariko RAM overvolting](https://github.com/KazushiMe/Switch-OC-Suite/issues/5): hekate bootloader is required
-      - Let me know if you get stable 1996.8/2131.2MHz to work. Open an issue or Discord: Hirochi_6831(replace _ with #)
+    - Let me know if you get stable 1996.8-2131.2MHz to work. Reply in the issue, or DM me in Discord: Hirochi_6831(replace _ with #)
+    - Testing voltage > 650mV (not recommended):
       - ```shell
         cd $hekate_repo
         curl https://github.com/KazushiMe/Switch-OC-Suite/raw/master/Source/hekate.diff | git apply
         ```
-      - change voltage (600000) and `make -j`
+      - change Vddq voltage (600000) and `make -j`
   - Mariko variants have much lower power consumption compared to Erista, therefore **GPU clock capping is lifted for Mariko**.
   - For more info, see [README.md](https://github.com/KazushiMe/Switch-OC-Suite/tree/master/Source/sys-clk-OC) in sys-clk-OC.
 - **Auto-Boost CPU for faster game loading**
@@ -96,9 +97,9 @@ Overclocking suite for Switch **(Mariko Only)** running on Atmosphere CFW. Suppo
 - Prebuilt sys-clk-OC and ReverseNX-RT modified for OC
 - `system-settings.ini` with some QoL improvements
 
-1. **Restoring pcv backup if you have patched pcv module manually:** Launch the `patcher.te` script via TegraExplorer to restore your backup. Ptm and am-no-copyright patches can be removed.
+1. **Restoring pcv backup if you have patched pcv module manually:** Launch the `patcher.te` script via TegraExplorer to restore your backup. Separated **ptm patches should be removed** to avoid conflicts.
 
-2. Copy all the files in `SdOut` to the root of SD card.
+2. Copy all the files in `SdOut` to the root of SD card. `system_settings.ini` should be edited manually.
 
 3. Grab `x.x.x_loader_xxxx.x.kip` for your Atmosphere version and desired RAM frequency, rename it to `loader.kip` and place it in `/atmosphere/kips/`.
 

Source/Atmosphere/ldr_oc_patch.hpp

@@ -126,6 +126,9 @@ namespace pcv {
     };
 
     /* EMC */
+
+    // DvbTable is all about frequency scaling along with CPU core voltage, no need to care about this for now.
+
     // constexpr u32 EmcDvbTableOffsets[] =
     // {
     //     0xFFFFFFFF,
@@ -175,8 +178,8 @@ namespace pcv {
     // 0x1428AC    23              #0x14
     // 0x1428B0    12500           #0x18 // voltage step
     // 0x1428B4    600000          #0x1C
-    // 0x1428B8    1125000         #0x20 // min voltage, default voltage for Erista EMC
+    // 0x1428B8    1125000         #0x20 // min voltage, default Vddq for Erista EMC
-    // 0x1428BC    1125000         #0x24 // max voltage, default voltage for Erista EMC
+    // 0x1428BC    1125000         #0x24 // max voltage, default Vddq for Erista EMC
     // 0x1428C0    0               #0x28
     // 0x1428C4    0               #0x2C
 
@@ -190,12 +193,10 @@ namespace pcv {
 
     // in hekate/bdk/power/max77812.h:
     // #define MAX77812_REG_M3_VOUT     0x25 // DRAM on PHASE211.
-    // What about DRAM on PHASE31?
+    // 3 outputs (CPU/GPU/DRAM) from max77812. Does PHASE31 mode exist?
-
+    // If so, read/query max77812 pmic via i2c for voltage info in hekate and get DRAM reg on PHASE31.
     // max77812 document: https://datasheets.maximintegrated.com/en/ds/MAX77812.pdf
 
-    // See if we can read/query max77812 pmic via i2c for voltage info in fusee/hekate
-
     // TODO: investigate why frequencies lower than 1331 MHz cannot be set
     constexpr u32 EmcFreqOffsets[][30] = {
         { 0xD7C60, 0xD7C68, 0xD7C70, 0xD7C78, 0xD7C80, 0xD7C88, 0xD7C90, 0xD7C98, 0xD7CA0, 0xD7CA8, 0xE1800, 0xEEFA0, 0xF2478, 0xFE284, 0x10A304, 0x10D7DC, 0x110A40, 0x113CA4, 0x116F08, 0x11A16C, 0x11D3D0, 0x120634, 0x123898, 0x126AFC, 0x129D60, 0x12CFC4, 0x130228, 0x13BFE0, 0x140D00, 0x140D50, },

Source/Atmosphere/ldr_patcher.cpp

@@ -175,17 +175,6 @@ namespace ams::ldr {
                         std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::CpuVoltageOldTableCoeff[i][j]), &pcv::NewCpuVoltageCoeff, sizeof(pcv::NewCpuVoltageCoeff));
                     }
 
-                    /* Patch RAM DVB table */
-                    //if (i == 2)
-                    //    std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::EmcDvbTableOffsets[2]), pcv::EmcDvbTable, sizeof(pcv::EmcDvbTable));
-
-                    /* Patch RAM volt */
-                    //u32 EmcVolt = 650'000;
-                    //if (i == 2)
-                    //    for (u32 j = 0; j < sizeof(pcv::EmcVoltOffsets[i])/sizeof(u32); j++) {
-                    //        std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::EmcVoltOffsets[i][j]), &EmcVolt, sizeof(EmcVolt));
-                    //    }
-
                     /* Patch RAM Clock */
                     for (u32 j = 0; j < sizeof(pcv::EmcFreqOffsets[i])/sizeof(u32); j++) {
                         std::memcpy(reinterpret_cast<void *>(mapped_nso + pcv::EmcFreqOffsets[i][j]), &EmcClock, sizeof(EmcClock));
@@ -210,7 +199,6 @@ namespace ams::ldr {
                 }
             }
         }
-
     }
 
 }