Revert "hoc-clk: add live vdd2, live boost clock and basic pwm dimming"
This reverts commit 15b7df8ef1.
This commit is contained in:
@@ -1,161 +0,0 @@
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/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* Some macros taken from https://github.com/ARM-software/arm-trusted-firmware/blob/master/include/common/aarch64/asm_macros.S */
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* Declare the exception vector table, enforcing it is aligned on a
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* 2KB boundary, as required by the ARMv8 architecture.
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* Use zero bytes as the fill value to be stored in the padding bytes
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* so that it inserts illegal AArch64 instructions. This increases
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* security, robustness and potentially facilitates debugging.
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*/
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.macro vector_base label, section_name=.vectors
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.section \section_name, "ax"
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.align 11, 0
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\label:
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.endm
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/*
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* Create an entry in the exception vector table, enforcing it is
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* aligned on a 128-byte boundary, as required by the ARMv8 architecture.
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* Use zero bytes as the fill value to be stored in the padding bytes
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* so that it inserts illegal AArch64 instructions. This increases
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* security, robustness and potentially facilitates debugging.
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*/
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.macro vector_entry label, section_name=.vectors
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.cfi_sections .debug_frame
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.section \section_name, "ax"
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.align 7, 0
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.type \label, %function
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.func \label
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.cfi_startproc
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\label:
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.endm
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/*
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* This macro verifies that the given vector doesnt exceed the
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* architectural limit of 32 instructions. This is meant to be placed
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* immediately after the last instruction in the vector. It takes the
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* vector entry as the parameter
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*/
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.macro check_vector_size since
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.endfunc
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.cfi_endproc
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.if (. - \since) > (32 * 4)
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.error "Vector exceeds 32 instructions"
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.endif
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.endm
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/* Actual Vectors for KernelLdr. */
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.global kernelldr_vectors
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vector_base kernelldr_vectors
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/* Current EL, SP0 */
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.global unknown_exception
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unknown_exception:
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vector_entry synch_sp0
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/* Just infinite loop. */
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b unknown_exception
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check_vector_size synch_sp0
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vector_entry irq_sp0
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b unknown_exception
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check_vector_size irq_sp0
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vector_entry fiq_sp0
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b unknown_exception
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check_vector_size fiq_sp0
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vector_entry serror_sp0
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b unknown_exception
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check_vector_size serror_sp0
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/* Current EL, SPx */
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vector_entry synch_spx
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b restore_tpidr_el1
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check_vector_size synch_spx
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vector_entry irq_spx
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b unknown_exception
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check_vector_size irq_spx
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vector_entry fiq_spx
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b unknown_exception
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check_vector_size fiq_spx
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vector_entry serror_spx
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b unknown_exception
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check_vector_size serror_spx
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/* Lower EL, A64 */
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vector_entry synch_a64
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b unknown_exception
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check_vector_size synch_a64
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vector_entry irq_a64
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b unknown_exception
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check_vector_size irq_a64
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vector_entry fiq_a64
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b unknown_exception
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check_vector_size fiq_a64
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vector_entry serror_a64
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b unknown_exception
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check_vector_size serror_a64
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/* Lower EL, A32 */
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vector_entry synch_a32
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b unknown_exception
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check_vector_size synch_a32
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vector_entry irq_a32
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b unknown_exception
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check_vector_size irq_a32
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vector_entry fiq_a32
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b unknown_exception
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check_vector_size fiq_a32
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vector_entry serror_a32
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b unknown_exception
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.endfunc
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.cfi_endproc
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/* To save space, insert in an unused vector segment. */
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.global restore_tpidr_el1
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.type restore_tpidr_el1, %function
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restore_tpidr_el1:
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mrs x0, tpidr_el1
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/* Make sure that TPIDR_EL1 can be dereferenced. */
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invalid_tpidr:
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cbz x0, invalid_tpidr
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/* Restore saved registers. */
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ldp x19, x20, [x0], #0x10
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ldp x21, x22, [x0], #0x10
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ldp x23, x24, [x0], #0x10
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ldp x25, x26, [x0], #0x10
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ldp x27, x28, [x0], #0x10
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ldp x29, x30, [x0], #0x10
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ldp x1, xzr, [x0], #0x10
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mov sp, x1
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mov x0, #0x1
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ret
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@@ -1,48 +0,0 @@
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/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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.section .text._ZN3ams4kern4init6loader23SaveRegistersToTpidrEl1EPv, "ax", %progbits
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.global _ZN3ams4kern4init6loader23SaveRegistersToTpidrEl1EPv
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_ZN3ams4kern4init6loader23SaveRegistersToTpidrEl1EPv:
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/* Set TPIDR_EL1 to the input register. */
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msr tpidr_el1, x0
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/* Save registers to the region specified. */
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mov x1, sp
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stp x19, x20, [x0], #0x10
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stp x21, x22, [x0], #0x10
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stp x23, x24, [x0], #0x10
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stp x25, x26, [x0], #0x10
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stp x27, x28, [x0], #0x10
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stp x29, x30, [x0], #0x10
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stp x1, xzr, [x0], #0x10
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mov x0, #0x0
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ret
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.section .text._ZN3ams4kern4init6loader22VerifyAndClearTpidrEl1EPv, "ax", %progbits
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.global _ZN3ams4kern4init6loader22VerifyAndClearTpidrEl1EPv
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_ZN3ams4kern4init6loader22VerifyAndClearTpidrEl1EPv:
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/* Get system register area from thread-specific processor id */
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mrs x1, tpidr_el1
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/* We require here that the region registers are saved is same as input. */
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cmp x0, x1
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invalid_tpidr:
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b.ne invalid_tpidr
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/* Clear TPIDR_EL1. */
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msr tpidr_el1, xzr
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ret
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@@ -1,160 +0,0 @@
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/*
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* Copyright (c) Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* For some reason GAS doesn't know about it, even with .cpu cortex-a57 */
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#define cpuactlr_el1 s3_1_c15_c2_0
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#define cpuectlr_el1 s3_1_c15_c2_1
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#define LOAD_IMMEDIATE_32(reg, val) \
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mov reg, #(((val) >> 0x00) & 0xFFFF); \
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movk reg, #(((val) >> 0x10) & 0xFFFF), lsl#16
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.section .crt0.text.start, "ax", %progbits
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.global _start
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_start:
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b _main
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__metadata_begin:
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.ascii "MLD0" /* Magic */
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__metadata_target_firmware:
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.word 0xCCCCCCCC /* Target Firmware. */
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__metadata_reserved:
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.word 0xCCCCCCCC /* Reserved. */
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_main:
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/* KernelLdr_Main(uintptr_t kernel_base_address, KernelMap *kernel_map, uintptr_t ini1_base_address); */
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adr x18, _start
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adr x16, __external_references
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ldr x17, [x16, #0x8] /* bss end */
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ldr x16, [x16, #0x0] /* bss start */
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add x16, x16, x18
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add x17, x17, x18
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clear_bss:
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cmp x16, x17
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b.cs clear_bss_done
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str xzr, [x16],#0x8
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b clear_bss
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clear_bss_done:
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adr x17, __external_references
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ldr x17, [x17, #0x10] /* stack top */
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add sp, x17, x18
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/* Stack is now set up, so save important state. */
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sub sp, sp, #0x30
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stp x0, x1, [sp, #0x00]
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stp x2, x30, [sp, #0x10]
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stp xzr, xzr, [sp, #0x20]
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#ifdef ATMOSPHERE_BOARD_NINTENDO_NX
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/* Get the target firmware from exosphere. */
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LOAD_IMMEDIATE_32(w0, 0xC3000004)
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mov w1, #65000
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smc #1
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cmp x0, #0
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0:
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b.ne 0b
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/* Store the target firmware. */
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adr x0, __metadata_target_firmware
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str w1, [x0]
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#endif
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/* Apply relocations and call init array for KernelLdr. */
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adr x0, _start
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adr x1, __external_references
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ldr x1, [x1, #0x18] /* .dynamic. */
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add x1, x0, x1
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/* branch to ams::kern::init::Elf::ApplyRelocations(uintptr_t, const ams::kern::init::Elf::Elf64::Dyn *); */
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bl _ZN3ams4kern4init3Elf16ApplyRelocationsEmPKNS2_5Elf643DynE
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/* branch to ams::kern::init::Elf::CallInitArrayFuncs(uintptr_t, uintptr_t) */
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adr x2, _start
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adr x1, __external_references
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ldr x0, [x1, #0x20] /* init_array_start */
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ldr x1, [x1, #0x28] /* init_array_end */
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add x0, x0, x2
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add x1, x1, x2
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bl _ZN3ams4kern4init3Elf18CallInitArrayFuncsEmm
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/* Setup system registers, for detection of errors during init later. */
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msr tpidr_el1, xzr
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msr cntv_cval_el0, xzr
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adr x0, __external_references
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adr x1, _start
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ldr x0, [x0, #0x30]
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add x0, x1, x0
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msr vbar_el1, x0
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isb
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/* Call ams::kern::init::loader::Main(uintptr_t, ams::kern::init::KernelLayout *, uintptr_t) */
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ldp x0, x1, [sp, #0x00]
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ldr x2, [sp, #0x10]
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bl _ZN3ams4kern4init6loader4MainEmPNS1_12KernelLayoutEm
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str x0, [sp, #0x00]
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/* Get ams::kern::init::loader::AllocateKernelInitStack(). */
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bl _ZN3ams4kern4init6loader23AllocateKernelInitStackEv
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str x0, [sp, #0x20]
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/* Call ams::kern::init::loader::GetFinalState() */
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bl _ZN3ams4kern4init6loader13GetFinalStateEv
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/* X0 is now the saved state. */
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/* We will return this to the kernel. */
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/* Adjust return address to point to the relocated kernel. */
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ldr x1, [sp, #0x18] /* Return address to Kernel */
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ldr x2, [sp, #0x00] /* Relocated kernel base address diff. */
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add x1, x2, x1
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/* Translate the relocated address back to a physical address. */
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and x4, x1, #0xFFF
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sub x3, x1, x4
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at s1e1r, x3
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isb
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mrs x3, par_el1
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1:
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tbnz w3, #0, 1b
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and x3, x3, #0xFFFFFFFFF000
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add x3, x3, x4
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/* Return the difference between relocated and physical in x1. */
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sub x1, x1, x3
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/* Setup stack, and return to the kernel. */
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ldr x2, [sp, #0x20]
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mov sp, x2
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br x3
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#ifdef ATMOSPHERE_BOARD_NINTENDO_NX
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.global _ZN3ams4kern17GetTargetFirmwareEv
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.type _ZN3ams4kern17GetTargetFirmwareEv, %function
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_ZN3ams4kern17GetTargetFirmwareEv:
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adr x0, __metadata_target_firmware
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ldr w0, [x0]
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ret
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#endif
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.balign 8
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__external_references:
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.quad __bss_start__ - _start
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.quad __bss_end__ - _start
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.quad __stack_end - _start
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.quad _DYNAMIC - _start
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.quad __init_array_start - _start
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.quad __init_array_end - _start
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.quad __vectors_start__ - _start
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