move pllmb measurement to bpmp
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souldbminersmwc committed
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@@ -37,7 +37,6 @@
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#include "../hos/apm_ext.h"
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#include "../i2c/i2cDrv.h"
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#include "../soc/gm20b.hpp"
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#include "../soc/pllmb.hpp"
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#include "board.hpp"
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#include "board_name.hpp"
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#include <ipc_server.h>
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@@ -202,9 +201,7 @@ namespace board {
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return static_cast<u32>((static_cast<u64>(38400000) * divn) / (divm * divp) / 2);
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}
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case HocClkModule_MEM:
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return config::GetConfigValue(HocClkConfigValue_MemoryFrequencyMeasurementMode) == MemoryFrequencyMeasurementMode_PLL
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? pllmb::getRamClockRatePLLMB()
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: bpmp::GetSharedInfo()->freqMem * 1000;
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return bpmp::GetSharedInfo()->freqMemPll * 1000;
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case HocClkModule_Display:
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return GetDisplayRate(hz);
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default:
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@@ -1,116 +0,0 @@
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/*
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* Copyright (c) Souldbminer
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*
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* Copyright (c) KazushiMe
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include "pllmb.hpp"
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namespace pllmb {
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#define GET_BITS(VAL, HIGH, LOW) ((VAL & ((1UL << (HIGH + 1UL)) - 1UL)) >> LOW)
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#define GET_BIT(VAL, BIT) GET_BITS(VAL, BIT, BIT)
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static inline volatile u32 ®(uintptr_t addr) {
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return *reinterpret_cast<volatile u32 *>(addr);
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}
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// From jetson nano kernel
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typedef enum {
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/* divider = 2 */
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CLK_PLLX = 5,
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CLK_PLLM = 2,
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CLK_PLLMB = 37,
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/* PLLX & PLLG are backup PLLs for CPU & GPU */
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/* divider = 1 */
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CLK_CCLK_G = 18, // A57 CPU cluster
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CLK_EMC = 36,
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} PTO_ID; // PLL Test Output Register ID
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/* See if GM20B clock GPC PLL regs are accessible. */
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#define PLLX_MISC0 0xE4
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#define PLLM_MISC2 0x9C
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double ptoGetMHz(PTO_ID pto_id, u32 divider = 1, u32 presel_reg = 0, u32 presel_mask = 0) {
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u32 pre_val, val, presel_val;
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if (presel_reg) {
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val = REG(board::clkVirtAddr + presel_reg);
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usleep(10);
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presel_val = val & presel_mask;
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val &= ~presel_mask;
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val |= presel_mask;
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REG(board::clkVirtAddr + presel_reg) = val;
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usleep(10);
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}
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constexpr u32 cycle_count = 16;
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pre_val = REG(board::clkVirtAddr + 0x60);
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val = BIT(23) | BIT(13) | (cycle_count - 1);
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val |= pto_id << 14;
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REG(board::clkVirtAddr + 0x60) = val;
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usleep(10);
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REG(board::clkVirtAddr + 0x60) = val | BIT(10);
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usleep(10);
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REG(board::clkVirtAddr + 0x60) = val;
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usleep(10);
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REG(board::clkVirtAddr + 0x60) = val | BIT(9);
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usleep(500);
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while (REG(board::clkVirtAddr + 0x64) & BIT(31))
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;
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val = REG(board::clkVirtAddr + 0x64);
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val &= 0xFFFFFF;
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val *= divider;
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double rate_hz = (u64)val * 32768. / cycle_count;
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usleep(10);
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REG(board::clkVirtAddr + 0x60) = pre_val;
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usleep(10);
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if (presel_reg) {
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val = REG(board::clkVirtAddr + presel_reg);
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usleep(10);
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val &= ~presel_mask;
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val |= presel_val;
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REG(board::clkVirtAddr + presel_reg) = val;
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usleep(10);
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}
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return rate_hz;
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}
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u64 getRamClockRatePLLMB() {
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// printf("\n"
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// "EMC: %6.1f MHz\n"
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// "CCLK_G: %6.1f MHz\n"
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// "PLLX: %6.1f MHz\n"
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// "PLLM: %6.1f MHz\n"
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// "PLLMB: %6.1f MHz\n",
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// ptoGetMHz(CLK_EMC),
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// ptoGetMHz(CLK_CCLK_G),
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// ptoGetMHz(CLK_PLLX, 2, PLLX_MISC0, BIT(22)),
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// ptoGetMHz(CLK_PLLM, 2, PLLM_MISC2, BIT(8)),
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// ptoGetMHz(CLK_PLLMB, 2, PLLM_MISC2, BIT(9))
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// );
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u32 pllmb = ptoGetMHz(CLK_PLLMB, 2, PLLM_MISC2, BIT(9));
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u32 pllm = ptoGetMHz(CLK_PLLM, 2, PLLM_MISC2, BIT(8));
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return pllmb == 0 ? pllm : pllmb; // pllmb is zeroed out at times, fallback to pllm
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}
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} // namespace pllmb
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@@ -1,31 +0,0 @@
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/*
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* Copyright (c) Souldbminer
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*
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* Copyright (c) KazushiMe
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#pragma once
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#include <cstdint>
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#include <hocclk.h>
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#include <registers.h>
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#include <switch.h>
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#include "../board/board.hpp"
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namespace pllmb {
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u64 getRamClockRatePLLMB();
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}
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