perfect ram timings
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119099984d
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@@ -113,7 +113,7 @@ namespace ams::ldr::hoc {
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const std::array<u32, 8> tRCD_values = { 18, 17, 16, 15, 14, 13, 12, 11 };
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const std::array<u32, 8> tRP_values = { 18, 17, 16, 15, 14, 13, 12, 11 };
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const std::array<u32, 10> tRAS_values = { 42, 36, 34, 32, 30, 28, 26, 24, 22, 20 };
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const std::array<double, 7> tRRD_values = { /*10.0,*/ 7.5, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0 }; /* 10.0 is used for <2133mhz; do we care? 8gb uses 7.5 tRRD on >=1331. */
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const std::array<double, 8> tRRD_values = { 10.0, 7.5, 6.0, 5.0, 4.0, 3.0, 2.0, 1.0 };
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const std::array<u32, 11> tRFC_values = { 140, 130, 120, 110, 100, 90, 80, 70, 60, 50, 40 };
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const std::array<u32, 10> tWTR_values = { 10, 9, 8, 7, 6, 5, 4, 3, 2, 1 };
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const std::array<u32, 6> tREFpb_values = { 3900, 5850, 7800, 11700, 15600, 99999 };
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+28
-3
@@ -15,18 +15,42 @@
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*/
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#include <stratosphere.hpp>
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#include "../pcv.hpp"
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#include "../../mtc_timing_value.hpp"
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#include "timing_tables.hpp"
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namespace ams::ldr::hoc::pcv::mariko {
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double GetMaxTrrd(u32 freq) {
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DramId id = GetDramId();
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if (freq >= 1866'000) {
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return 7.5;
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}
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switch (id) {
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case HOAG_4GB_HYNIX_H9HCNNNBKMMLXR_NEE ... IOWA_4GB_HYNIX_H9HCNNNBKMMLXR_NEE:
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case IOWA_4GB_MICRON_MT53E512M32D2NP_046_WTE:
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case HOAG_4GB_MICRON_MT53E512M32D2NP_046_WTE:
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case IOWA_8GB_SAMSUNG_K4UBE3D4AA_MGCL:
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case HOAG_8GB_SAMSUNG_K4UBE3D4AA_MGCL:
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case AULA_8GB_SAMSUNG_K4UBE3D4AA_MGCL:
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case IOWA_4GB_MICRON_MT53E512M32D1NP_046_WTB ... AULA_4GB_MICRON_MT53E512M32D1NP_046_WTB:
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return 7.5;
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default:
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break;
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}
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return 10.0;
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}
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void GetRext(u32 freq) {
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if (auto r = FindRext(freq)) {
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rext = r->rext;
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return;
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}
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/* > 3200 */
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/* Fallback */
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rext = 0x1E;
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}
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@@ -46,9 +70,10 @@ namespace ams::ldr::hoc::pcv::mariko {
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}
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void AutoLatency(volatile u32 &latency, u32 freq, u32 latencyStep) {
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if (freq > 1600'000 && freq <= 1896'000) { /* 1866tRWL */
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if (freq > 1600'000 && freq <= 1866'000) { /* 1866tRWL */
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latency += latencyStep * 2;
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} else { /* 2133tRWL */
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// Note: JEDEC/Datasheet mandates 2133 for >1866, even if <2133
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latency += latencyStep * 3;
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}
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}
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@@ -139,7 +164,7 @@ namespace ams::ldr::hoc::pcv::mariko {
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tRCD = tRCD_values[lowFreq ? C.low_t1_tRCD : C.t1_tRCD];
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tRPpb = tRP_values[lowFreq ? C.low_t2_tRP : C.t2_tRP];
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tRAS = tRAS_values[lowFreq ? C.low_t3_tRAS : C.t3_tRAS];
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tRRD = tRRD_values[lowFreq ? C.low_t4_tRRD : C.t4_tRRD];
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tRRD = MIN(tRRD_values[lowFreq ? C.low_t4_tRRD : C.t4_tRRD], GetMaxTrrd(freq));
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tRFCpb = tRFC_values[lowFreq ? C.low_t5_tRFC : C.t5_tRFC];
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u32 tRTW = lowFreq ? C.low_t6_tRTW : C.t6_tRTW;
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@@ -26,6 +26,8 @@
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namespace ams::ldr::hoc::pcv::mariko {
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DramId GetDramId();
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void MtcGenerateFreqTables();
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Result MemFreqMtcTable(u32 *ptr);
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Result MemFreqDvbTable(u32 *ptr);
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