DRAM MR4 tsensor reading

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souldbminersmwc committed 2026-09-06 12:50:11 -04:00
1 parent bd6d615143
commit 5c215fcd02
6 files changed
+67 -7

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@@ -36,6 +36,7 @@
#include "../file/config.hpp"
#include "../hos/apm_ext.h"
#include "../i2c/i2cDrv.h"
#include "../soc/dram_mrr.hpp"
#include "../tsensor/aotag.hpp"
#include "../tsensor/bq24193.hpp"
#include "../tsensor/soctherm.hpp"
@@ -46,6 +47,32 @@
namespace board {
namespace {
/* Only poll every 10 ticks to avoid stalling EMC too much */
constexpr u32 DramMr4PollDivisor = 20; // 1 - 20 seconds depending on polling interval
u32 gDramMr4Tick = DramMr4PollDivisor;
s32 gDramMr4Millis = 30000; /* 4x refresh default */
s32 PollDramMr4TempMilli() {
u8 mr4 = 0;
if (!soc::mrr::ReadRamMr4(&mr4))
return 0; /* stock exosphere */
/* TODO: verify this table manually*/
switch (mr4 & 0x7)
{
case 0x0: return 0; /* below operating range */
case 0x1: return 30000; /* 4x refresh */
case 0x2: return 50000; /* 2x refresh */
case 0x3: return 85000; /* 1x refresh */
case 0x4: return 95000; /* 0.5x refresh */
case 0x5: return 100000; /* 0.25x refresh */
case 0x6: return 105000; /* 0.25x refresh, de-rated */
default: return 110000; /* above operating range */
}
}
}
s32 GetTemperatureMilli(HocClkThermalSensor sensor) {
s32 millis = 0;
BatteryChargeInfo info;
@@ -90,9 +117,9 @@ namespace board {
case HocClkThermalSensor_MEM: {
if (board::GetSocType() == HocClkSocType_Mariko && tsensor::IsInitialized() && tsensor::ReadAotag() > 0) {
if(board::GetConsoleType() == HocClkConsoleType_Aula) { // Aula has a misplaced thermal sensor that makes tBoard report too high
millis = tsensor::ReadAotag();
millis = (tsensor::ReadAotag() * 0.40f) + (gDramMr4Millis * 0.60f);
} else { // On other consoles it's placed correctly so avoid relying on AOTAG
millis = (tsensor::ReadAotag() * 0.40f) + (tmp451TempPcb() * 0.6f);
millis = (tsensor::ReadAotag() * 0.20f) + (tmp451TempPcb() * 0.40f) + (gDramMr4Millis * 0.40f);
}
} else {
millis = board::GetSocType() == HocClkSocType_Mariko ? temps.pllx : temps.mem;
@@ -111,6 +138,14 @@ namespace board {
millis = tsensor::ReadAotag();
break;
}
case HocClkThermalSensor_DRAM: {
if (++gDramMr4Tick >= DramMr4PollDivisor) {
gDramMr4Tick = 0;
gDramMr4Millis = PollDramMr4TempMilli();
}
millis = gDramMr4Millis;
break;
}
default: {
ASSERT_ENUM_VALID(HocClkThermalSensor, sensor);
}
@@ -251,6 +251,21 @@ namespace soc::mrr {
return data;
}
bool ReadRamMr4(u8 *mr4) {
EmcTopology topo = {};
if (!QueryTopology(&topo))
return false;
ClearMrrLeftovers();
emc_mr_data_t data = {};
if (!ReadMrxRank(MR4_TEMP, topo.ranks > 1, topo.channels > 1, &data))
return false;
*mr4 = data.chip0.rank0_ch0;
return true;
}
/* MR8 density field (bits 5:2) to MB */
static bool DecodeDensityMb(u8 mr8, u32 *mb) {
switch ((mr8 & 0x3C) >> 2)
@@ -99,9 +99,7 @@ namespace soc::mrr {
emc_mr_data_t sdram_read_mrx(emc_mr_t mrx);
bool IsMrrAvailable();
/* Fuse-style DRAM ID (hekate numbering, as in board::GetDramID):
derived from MRR when the patched exosphere grants EMC access,
otherwise falls back to the fuse ODM4 ID. MRR-detected 8GB WT:B/NEE
(no dedicated fuse numbering) alias to Aula AA-MGCL 8GB (28). */
bool ReadRamMr4(u8 *mr4);
u8 IdentifyDramId();
}