OmniNX/Horizon-OC-pro
2
0 Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Revert "hocclk: add watchdog"

Browse Source 
This watchdog prevents fatal errors which are *kinda* important.
This reverts commit c9e9b87bd0.
This commit is contained in:
Lightos1 committed 2026-10-04 13:55:01 +02:00
1 parent c9e9b87bd0
commit 1f1c28875c
4 files changed
+12 -220
Download Patch File Download Diff File Expand all files Collapse all files

No files matched your search

Source/hoc-clk/sysmodule/src/board/board.cpp
+7 -73
View File
@@ -50,8 +50,6 @@
#include <lockable_mutex.h>
#include "../mapping/mem_map.hpp"
#include "../soc/dram_mrr.hpp"
#include "../i2c/max77620_wdt.hpp"
namespace board {
u64 clkVirtAddr, dsiVirtAddr, apbVirtAddr, fuseVirtAddr;
@@ -65,52 +63,13 @@ namespace board {
u32 fd = 0, fd2 = 0;
#define PMC_BASE 0x7000E400
#define APB_MISC_GP_HIDREV 0x804
#define GP_HIDREV_MAJOR_T210 0x1
#define GP_HIDREV_MAJOR_T210B01 0x2
#define APB_BASE 0x70000000
#define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))
#define FUSE_OFFSET 0x800
constexpr u32 pscDependencies[] = { PscPmModuleId_Olsc };
constexpr PscPmModuleId PscModuleId = (PscPmModuleId)705;
PscPmModule s_pscModule;
bool s_pscPrepared = false;
Thread s_pscThread;
bool s_pscExit = false;
std::atomic_bool s_isAwake = true;
void PscThreadFunc(void *) {
while (!s_pscExit) {
Result rc = eventWait(&s_pscModule.event, 1'000'000'000ULL);
if (R_FAILED(rc)) {
continue; // Timeout
}
PscPmState state;
u32 flags;
rc = pscPmModuleGetRequest(&s_pscModule, &state, &flags);
if (R_SUCCEEDED(rc)) {
if (state == PscPmState_Awake) {
i2c::wdt::Arm(i2c::wdt::MAX77620_WDT_2S);
s_isAwake = true;
} else if (state == PscPmState_ReadySleep) {
i2c::wdt::Disarm();
s_isAwake = false;
} else if (state == PscPmState_ReadyShutdown) {
i2c::wdt::Disarm();
s_isAwake = false;
}
pscPmModuleAcknowledge(&s_pscModule, state);
}
}
}
#define PMC_BASE 0x7000E400
#define APB_MISC_GP_HIDREV 0x804
#define GP_HIDREV_MAJOR_T210 0x1
#define GP_HIDREV_MAJOR_T210B01 0x2
#define APB_BASE 0x70000000
#define FUSE_RESERVED_ODMX(x) (0x1C8 + 4 * (x))
#define FUSE_OFFSET 0x800
void FetchHardwareInfos() {
ReadFuses(fuseData, fuseVirtAddr);
SetGpuBracket(fuseData.gpuSpeedo, speedoBracket);
@@ -239,21 +198,6 @@ namespace board {
CacheDfllData();
CacheGpuVoltTable();
rc = pscmInitialize();
ASSERT_RESULT_OK(rc, "pscmInitialize");
rc = pscmGetPmModule(&s_pscModule, PscModuleId, pscDependencies, sizeof(pscDependencies) / sizeof(u32), true);
ASSERT_RESULT_OK(rc, "pscmGetPmModule");
rc = threadCreate(&s_pscThread, PscThreadFunc, nullptr, NULL, 0x1000, 0x10, 3);
ASSERT_RESULT_OK(rc, "threadCreate");
rc = threadStart(&s_pscThread);
ASSERT_RESULT_OK(rc, "threadStart");
/* Arm the watchdog */
i2c::wdt::Arm(i2c::wdt::MAX77620_WDT_2S);
}
void Exit() {
@@ -284,16 +228,6 @@ namespace board {
batteryInfoExit();
pmdmntExit();
nvExit();
eventFire(&s_pscModule.event);
threadWaitForExit(&s_pscThread);
threadClose(&s_pscThread);
pscPmModuleFinalize(&s_pscModule);
pscPmModuleClose(&s_pscModule);
pscmExit();
i2c::wdt::Disarm();
}
HocClkSocType GetSocType() {
Source/hoc-clk/sysmodule/src/i2c/max77620_wdt.cpp
-106
View File
@@ -1,106 +0,0 @@
/*
*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#include "max77620_wdt.hpp"
/* PMIC Registers */
#define MAX77620_REG_CNFGGLBL2 ((u8)0x01)
#define MAX77620_REG_CNFGGLBL3 ((u8)0x02)
#define MAX77620_REG_ONOFFCNFG2 ((u8)0x42)
/* CNFGGLBL2 bits */
#define MAX77620_WDTOFFC ((u8)(1u << 4)) /* WDT clear in OFF mode */
#define MAX77620_WDTSLPC ((u8)(1u << 3)) /* WDT clear in sleep mode */
#define MAX77620_WDTEN ((u8)(1u << 2)) /* WDT enabled */
/* Watchdog timeout period (CNFGGLBL2[1:0]) */
#define MAX77620_TWD_MASK ((u8)0x03)
#define MAX77620_TWD_2s ((u8)0x00)
#define MAX77620_TWD_16s ((u8)0x01)
#define MAX77620_TWD_64s ((u8)0x02)
#define MAX77620_TWD_128s ((u8)0x03)
/* CNFGGLBL3 watchdog-clear field (WDTC[1:0]). Writing 0x1 disables WDT. */
#define MAX77620_WDTC_MASK ((u8)0x03)
#define MAX77620_WDTC_KICK ((u8)0x01)
/* ONOFFCNFG2 bits */
#define MAX77620_ONOFFCNFG2_WD_RST_WK ((u8)(1u << 6))
/* Is this a watchdog or a watchcat, that is the question */
namespace i2c::wdt {
static Result update_bits(u8 reg, u8 mask, u8 val) {
u8 cur;
Result rc;
rc = I2cRead_OutU8(I2cDevice_Max77620Pmic, reg, &cur);
if (R_FAILED(rc))
return rc;
cur = (u8)((cur & (u8)~mask) | (val & mask));
return I2cSet_U8(I2cDevice_Max77620Pmic, reg, cur);
}
void Arm(max77620_wdt_time_t timeout) {
Result rc;
u8 twd;
if ((int)timeout < (int)MAX77620_WDT_2S || (int)timeout > (int)MAX77620_WDT_128S)
return;
twd = (u8)timeout;
/* WDT expiry results in a restart */
rc = update_bits(MAX77620_REG_ONOFFCNFG2,
MAX77620_ONOFFCNFG2_WD_RST_WK,
MAX77620_ONOFFCNFG2_WD_RST_WK);
ASSERT_RESULT_OK(rc, "update_bits");
/* Clear WDT in OFF and sleep modes. */
rc = update_bits(MAX77620_REG_CNFGGLBL2,
(u8)(MAX77620_WDTOFFC | MAX77620_WDTSLPC),
(u8)(MAX77620_WDTOFFC | MAX77620_WDTSLPC));
ASSERT_RESULT_OK(rc, "update_bits");
/* Do what the kernel dows */
rc = update_bits(MAX77620_REG_CNFGGLBL3,
MAX77620_WDTC_MASK, MAX77620_WDTC_KICK);
ASSERT_RESULT_OK(rc, "update_bits");
/* Program the period. */
rc = update_bits(MAX77620_REG_CNFGGLBL2, MAX77620_TWD_MASK, twd);
ASSERT_RESULT_OK(rc, "update_bits");
/* Enable. */
rc = update_bits(MAX77620_REG_CNFGGLBL2, MAX77620_WDTEN, MAX77620_WDTEN);
ASSERT_RESULT_OK(rc, "update_bits");
}
void Disarm() {
Result rc = update_bits(MAX77620_REG_CNFGGLBL2, MAX77620_WDTEN, (u8)0x00);
ASSERT_RESULT_OK(rc, "update_bits");
}
void Pet() {
Result rc = update_bits(MAX77620_REG_CNFGGLBL3, MAX77620_WDTC_MASK, MAX77620_WDTC_KICK);
ASSERT_RESULT_OK(rc, "update_bits");
}
} // namespace pwr::wdt
Source/hoc-clk/sysmodule/src/i2c/max77620_wdt.hpp
-37
View File
@@ -1,37 +0,0 @@
/*
* Copyright (c) Souldbminer, Lightos_ and Horizon OC Contributors
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
*/
#include <hocclk.h>
#include <switch.h>
#include "i2cDrv.h"
#include "../file/errors.hpp"
namespace i2c::wdt {
typedef enum {
MAX77620_WDT_2S = 0, /* ~2 seconds */
MAX77620_WDT_16S = 1, /* ~16 seconds */
MAX77620_WDT_64S = 2, /* ~64 seconds */
MAX77620_WDT_128S = 3, /* ~128 seconds */
} max77620_wdt_time_t;
void Arm(max77620_wdt_time_t timeout);
void Disarm();
void Pet();
} // namespace pwr::wdt
Source/hoc-clk/sysmodule/src/mgr/clock_manager.cpp
+5 -4
View File
@@ -44,8 +44,6 @@
#include "../util/lockable_mutex.h"
#include "clock_manager.hpp"
#include "governor.hpp"
#include "../i2c/max77620_wdt.hpp"
#define HOSPPC_HAS_BOOST (hosversionAtLeast(7, 0, 0))
@@ -881,7 +879,10 @@ namespace mgr {
}
void WaitForNextTick() {
i2c::wdt::Pet();
svcSleepThread(file::config::GetConfigValue(HocClkConfigValue_PollingIntervalMs) * 1000000ULL);
if (board::GetHz(HocClkModule_MEM) > 665000000)
svcSleepThread(file::config::GetConfigValue(HocClkConfigValue_PollingIntervalMs) * 1000000ULL);
else
svcSleepThread(5000 * 1000000ULL); // 5 seconds in sleep mode
}
} // namespace mgr