erpt: amend logic for culling orphan attachments

subrepo:
  subdir:   "libraries"
  merged:   "da6eac98"
upstream:
  origin:   "https://github.com/Atmosphere-NX/Atmosphere-libs"
  branch:   "master"
  commit:   "da6eac98"
git-subrepo:
  version:  "0.4.1"
  origin:   "???"
  commit:   "???"

.github/ISSUE_TEMPLATE/config.yml

@@ -0,0 +1,5 @@
+blank_issues_enabled: false
+contact_links:
+  - name: ReSwitched Discord
+    url: https://discordapp.com/invite/DThbZ7z
+    about: Please ask questions here, instead of making GitHub issues.

.github/ISSUE_TEMPLATE/question.md

@@ -1,7 +0,0 @@
----
-name: Question
-about: Please ask questions in the ReSwitched discord, instead of making issues. 
---- 
-We would like to use GitHub to keep track of problems/feature requests.  
-If you have a question, please join the ReSwitched discord for help. 
-- Discord link: https://discordapp.com/invite/DThbZ7z 

.gitignore

@@ -64,6 +64,7 @@ dkms.conf
 # Distribution files
 *.tgz
 *.zip
+*.bz2
 
 # IDA binaries
 *.id0

Makefile

@@ -1,4 +1,4 @@
-TOPTARGETS := all clean dist
+TOPTARGETS := all clean dist-no-debug dist
 AMSBRANCH := $(shell git symbolic-ref --short HEAD)
 AMSHASH := $(shell git rev-parse --short HEAD)
 AMSREV := $(AMSBRANCH)-$(AMSHASH)
@@ -7,7 +7,7 @@ ifneq (, $(strip $(shell git status --porcelain 2>/dev/null)))
     AMSREV := $(AMSREV)-dirty
 endif
 
-COMPONENTS := fusee stratosphere exosphere thermosphere troposphere libraries
+COMPONENTS := fusee stratosphere mesosphere exosphere thermosphere troposphere libraries
 
 all: $(COMPONENTS)
 
@@ -20,13 +20,16 @@ exosphere: thermosphere
 stratosphere: exosphere libraries
 	$(MAKE) -C stratosphere all
 
+mesosphere: exosphere libraries
+	$(MAKE) -C mesosphere all
+
 troposphere: stratosphere
 	$(MAKE) -C troposphere all
 
 sept: exosphere
 	$(MAKE) -C sept all
 
-fusee: exosphere stratosphere sept
+fusee: exosphere mesosphere stratosphere sept
 	$(MAKE) -C $@ all
 
 libraries:
@@ -36,7 +39,7 @@ clean:
 	$(MAKE) -C fusee clean
 	rm -rf out
 
-dist: all
+dist-no-debug: all
 	$(eval MAJORVER = $(shell grep 'define ATMOSPHERE_RELEASE_VERSION_MAJOR\b' libraries/libvapours/include/vapours/ams/ams_api_version.h \
 		| tr -s [:blank:] \
 		| cut -d' ' -f3))
@@ -70,6 +73,8 @@ dist: all
 	cp sept/sept-secondary/sept-secondary.bin atmosphere-$(AMSVER)/sept/sept-secondary.bin
 	cp sept/sept-secondary/sept-secondary_00.enc atmosphere-$(AMSVER)/sept/sept-secondary_00.enc
 	cp sept/sept-secondary/sept-secondary_01.enc atmosphere-$(AMSVER)/sept/sept-secondary_01.enc
+	cp sept/sept-secondary/sept-secondary_dev_00.enc atmosphere-$(AMSVER)/sept/sept-secondary_dev_00.enc
+	cp sept/sept-secondary/sept-secondary_dev_01.enc atmosphere-$(AMSVER)/sept/sept-secondary_dev_01.enc
 	cp config_templates/BCT.ini atmosphere-$(AMSVER)/atmosphere/config/BCT.ini
 	cp config_templates/override_config.ini atmosphere-$(AMSVER)/atmosphere/config_templates/override_config.ini
 	cp config_templates/system_settings.ini atmosphere-$(AMSVER)/atmosphere/config_templates/system_settings.ini
@@ -92,5 +97,45 @@ dist: all
 	mv atmosphere-$(AMSVER).zip out/atmosphere-$(AMSVER).zip
 	cp fusee/fusee-primary/fusee-primary.bin out/fusee-primary.bin
 
+dist: dist-no-debug
+	$(eval MAJORVER = $(shell grep 'define ATMOSPHERE_RELEASE_VERSION_MAJOR\b' libraries/libvapours/include/vapours/ams/ams_api_version.h \
+		| tr -s [:blank:] \
+		| cut -d' ' -f3))
+	$(eval MINORVER = $(shell grep 'define ATMOSPHERE_RELEASE_VERSION_MINOR\b' libraries/libvapours/include/vapours/ams/ams_api_version.h \
+		| tr -s [:blank:] \
+		| cut -d' ' -f3))
+	$(eval MICROVER = $(shell grep 'define ATMOSPHERE_RELEASE_VERSION_MICRO\b' libraries/libvapours/include/vapours/ams/ams_api_version.h \
+		| tr -s [:blank:] \
+		| cut -d' ' -f3))
+	$(eval AMSVER = $(MAJORVER).$(MINORVER).$(MICROVER)-$(AMSREV))
+	rm -rf atmosphere-$(AMSVER)-debug
+	mkdir atmosphere-$(AMSVER)-debug
+	cp fusee/fusee-primary/fusee-primary.elf atmosphere-$(AMSVER)-debug/fusee-primary.elf
+	cp fusee/fusee-mtc/fusee-mtc.elf atmosphere-$(AMSVER)-debug/fusee-mtc.elf
+	cp fusee/fusee-secondary/fusee-secondary.elf atmosphere-$(AMSVER)-debug/fusee-secondary.elf
+	cp sept/sept-primary/sept-primary.elf atmosphere-$(AMSVER)-debug/sept-primary.elf
+	cp sept/sept-secondary/sept-secondary.elf atmosphere-$(AMSVER)-debug/sept-secondary.elf
+	cp sept/sept-secondary/key_derivation/key_derivation.elf atmosphere-$(AMSVER)-debug/sept-secondary-key-derivation.elf
+	cp exosphere/exosphere.elf atmosphere-$(AMSVER)-debug/exosphere.elf
+	cp exosphere/lp0fw/lp0fw.elf atmosphere-$(AMSVER)-debug/lp0fw.elf
+	cp exosphere/sc7fw/sc7fw.elf atmosphere-$(AMSVER)-debug/sc7fw.elf
+	cp exosphere/rebootstub/rebootstub.elf atmosphere-$(AMSVER)-debug/rebootstub.elf
+	cp mesosphere/kernel_ldr/kernel_ldr.elf atmosphere-$(AMSVER)-debug/kernel_ldr.elf
+	cp stratosphere/ams_mitm/ams_mitm.elf atmosphere-$(AMSVER)-debug/ams_mitm.elf
+	cp stratosphere/boot/boot.elf atmosphere-$(AMSVER)-debug/boot.elf
+	cp stratosphere/boot2/boot2.elf atmosphere-$(AMSVER)-debug/boot2.elf
+	cp stratosphere/creport/creport.elf atmosphere-$(AMSVER)-debug/creport.elf
+	cp stratosphere/dmnt/dmnt.elf atmosphere-$(AMSVER)-debug/dmnt.elf
+	cp stratosphere/eclct.stub/eclct.stub.elf atmosphere-$(AMSVER)-debug/eclct.stub.elf
+	cp stratosphere/fatal/fatal.elf atmosphere-$(AMSVER)-debug/fatal.elf
+	cp stratosphere/loader/loader.elf atmosphere-$(AMSVER)-debug/loader.elf
+	cp stratosphere/pm/pm.elf atmosphere-$(AMSVER)-debug/pm.elf
+	cp stratosphere/ro/ro.elf atmosphere-$(AMSVER)-debug/ro.elf
+	cp stratosphere/sm/sm.elf atmosphere-$(AMSVER)-debug/sm.elf
+	cp stratosphere/spl/spl.elf atmosphere-$(AMSVER)-debug/spl.elf
+	cd atmosphere-$(AMSVER)-debug; zip -r ../atmosphere-$(AMSVER)-debug.zip ./*; cd ../;
+	rm -r atmosphere-$(AMSVER)-debug
+	mv atmosphere-$(AMSVER)-debug.zip out/atmosphere-$(AMSVER)-debug.zip
+
 
 .PHONY: $(TOPTARGETS) $(COMPONENTS)

README.md

@@ -28,6 +28,7 @@ You can find a copy of the license in the [LICENSE file](LICENSE).
 
 Exemptions:
 * The [yuzu emulator project](https://github.com/yuzu-emu/yuzu) is exempt from GPLv2 licensing and may (at its option) instead license any source code authored for the Atmosphère project as GPLv2 or later.
+* [Nintendo](https://github.com/Nintendo) is exempt from GPLv2 licensing and may (at its option) instead license any source code authored for the Atmosphère project under the Zero-Clause BSD license.
 
 Credits
 =====

config_templates/BCT.ini

@@ -18,3 +18,5 @@ enable_user_pmu_access = 0
 [stratosphere]
 ; To force-enable nogc, add nogc = 1
 ; To force-disable nogc, add nogc = 0
+
+; To opt in to using Atmosphere's NCM reimplementation, add enable_ncm = 1

config_templates/override_config.ini

@@ -1,9 +1,18 @@
 [hbl_config]
-; program_id=010000000000100D
+; Program Specific Config
+; Up to 8 program-specific configurations can be set.
+; These use `program_id_#` and `override_key_#`
+; where # is in range [0,7].
+; program_id_0=010000000000100D
+; override_key_0=!R
+
+; Any Application Config
+; Note that this will only apply to program IDs that
+; are both applications and not specified above
+; by a program specific config.
 ; override_any_app=true
-; path=atmosphere/hbl.nsp
-; override_key=!R
 ; override_any_app_key=R
+; path=atmosphere/hbl.nsp
 
 [default_config]
 ; override_key=!L

config_templates/system_settings.ini

@@ -32,6 +32,12 @@
 ; NOTE: EXPERIMENTAL
 ; If you do not know what you are doing, do not touch this yet.
 ; fsmitm_redirect_saves_to_sd = u8!0x0
+; Controls whether to enable the deprecated hid mitm
+; to fix compatibility with old homebrew.
+; 0 = Do not enable, 1 = Enable.
+; Please note this setting may be removed in a
+; future release of Atmosphere.
+; enable_deprecated_hid_mitm = u8!0x0
 [hbloader]
 ; Controls the size of the homebrew heap when running as applet.
 ; If set to zero, all available applet memory is used as heap.

docs/changelog.md

@@ -1,4 +1,86 @@
 # Changelog
+## 0.10.5
++ Changes were made to the way fs.mitm builds images when providing a layeredfs romfs.
+  + Building romfs metadata previously had a memory cost of about ~4-5x the file table size.
+  + This caused games that have particularly enormous file metadata tables (> 4 MB) to exhaust fs.mitm's 16 MB memory pool.
+  + The code that creates romfs images was thus changed to be significantly more memory efficient, again.
+  + Memory requirements have been lowered from ~4x file table size to ~2x file table size + 0.5 MB.
+  + There is a slight speed penalty to this, but testing on Football Manager 2020 only took an extra ~1.5 seconds for the game to boot with many modded files.
+    + This shouldn't be noticeable thanks to the async changes made in 0.10.2.
+  + If you encounter a game that exhausts ams.mitm's memory (crashing it) when loading layeredfs mods, please contact SciresM.
+    + Romfs building can be made even more memory efficient, but unless games show up with even more absurdly huge file tables it seems not worth the speed trade-off.
++ A bug was fixed that caused Atmosphere's fatal error context to not dump TLS for certain processes.
++ General system stability improvements to enhance the user's experience.
+## 0.10.4
++ With major thanks to @Adubbz for his work, the NCM system module has now been re-implemented.
+  + This was a major stepping stone towards the goal of having implementations everything in the Switch's package1/package2 firmware.
+  + This also lays the groundwork for libstratosphere providing bindings for changing the installed version of the Switch's OS.
+  + **Please Note**: The NCM implementation will initially be opt-in.
+    + The Atmosphere team is confident in our NCM implementation (and we have tested it on every firmware version).
+    + That said, this is our first system module that manages NAND savegames -- and caution is a habit.
+    + We do not anticipate any issues that didn't come up in testing, so this is just our being particularly careful.
+    + Users interested in opting in to using our implementation should set `stratosphere!ncm_enabled = 1` in BCT.ini.
+      + In the unlikely event that any issues are encountered, please report them to @SciresM.
+    + The NCM implementation will stop being opt-in in a future update, after thorough testing has been done in practice.
++ A bug was fixed in emummc that caused Nintendo path to be corrupted on 1.0.0.
+  + This manifested as the emummc folder being created inside the virtual NAND instead of the SD card.
+  + It's unlikely there are any negative consequences to this in practice.
+    + If you want to be truly sure, you can re-clone sysmmc before updating a 1.0.0 emummc to latest firmware.
++ Stratosphere system modules now use new Nintendo-style FS bindings instead of stdio.
+  + This saves a modest amount of memory due to leaner code, and greatly increases the accuracy of several components.
+  + These bindings will make it easier for other system modules using libstratosphere to interact with the filesystem.
+  + This also lays the groundwork for changes necessary to support per-emummc Atmosphere folders in a future update.
++ Atmosphere's fatal error context now dumps 0x100 of TLS.
+  + This will make it much easier to fix bugs when an error report is dumped for whatever caused the crash.
++ General system stability improvements to enhance the user's experience.
+## 0.10.3
++ Support was added for 9.2.0.
++ Support was added for redirecting manual html content for games.
+  + This works like normal layeredfs, replacing content placed in `/atmosphere/contents/<program id>/manual_html/`.
+  + This allows for game mods/translations to provide custom manual content, if they so choose.
++ A number of improvements were made to Atmosphere's memory usage, including:
+  + `fatal` now uses STB instead of freetype for rendering.
+    + This saves around 1 MB of memory, and makes our fatal substantially leaner than Nintendo's.
+  + `sm` no longer wastes 2 MiB unnecessarily.
++ fusee/sept's sdmmc access now better matches official behavior.
+  + This improves compatibility with some SD cards.
++ `ro` has been updated to reflect changes made in 9.1.0.
++ The temporary auto-migration added in 0.10.0 has been removed, since the transitionary period is well over.
++ General system stability improvements to enhance the user's experience.
+## 0.10.2
++ hbl configuration was made more flexible.
+  + Up to eight specific program ids can now be specified to have their own override keys.
+  + This allows designating both the album applet and a specific game as hbl by default as desired.
+  + Configuration targeting a specific program is now mutually exclusive with override-any-app for that program.
+    + This fixes unintuitive behavior when override key differed for an application specific program.
++ Loader's external content fileystem support was fixed (thanks @misson20000!).
++ KernelLdr was reimplemented.
+  + This is the first step towards developing mesosphere, Atmosphere's planned reimplementation of the Switch's Kernel.
+  + The typical user won't notice anything different, as there are no extensions, but a lot of groundwork was laid for future development.
++ Improvements were made to the way Atmosphere's buildsystem detects source code files.
+  + This significantly reduces compilation time (saving >30 seconds) on the machine that builds official releases.
++ Certain device code was cleaned up and made more correct in fusee/sept/exosphere (thanks @hexkyz!).
++ A number of changes were made to the way fs.mitm builds images when providing a layeredfs romfs.
+  + Some games (Resident Evil 6, Football Manager 2020 Touch, possibly others) have enormous numbers of files.
+  + Attempting to create a layeredfs mod for these games actually caused fs.mitm to run out of memory, causing a fatal error.
+  + The code that creates these images was changed to be significantly more memory efficient.
+  + However, these changes also cause a significant slowdown in the romfs building code (~2-5x).
+  + This introduced a noticeable stutter when launching a game, because the UI thread would block on the romfs creation.
+  + To solve this, fs.mitm now lazily initializes the image in a background thread.
+  + This fixes stutter issues, however some games may be slightly slower (~1-2s in the worst cases) to transition from the "loading" GIF to gameplay now.
+    + Please note: the slowdown is not noticeable in the common case where games don't have tons of files (typical is ~0.1-0.2 seconds).
+    + Once the image has been built, there is no further speed penalty at runtime -- only when the game is launched.
++ A number of other bugs were fixed, including:
+  + Several minor logic inversions that could have caused fatal errors when modding games.
+  + Atmosphere's new-ipc code did not handle "automatic" recvlist buffers correctly, so some non-libnx homebrew could crash.
+  + fs.mitm now correctly mitms sdb, which makes redirection of certain system data archives work again.
+    + In 0.10.0/0.10.1, changing the system font/language did not work correctly due to this.
+  +  A bug was fixed in process cleanup that caused the system to hang on < 5.0.0.
++ The temporary hid-mitm added in Atmosphere 0.9.0 was disabled by default.
+  + Please ensure your homebrew is updated.
+  + For now, users may re-enable this mitm by use of a custom setting (`atmosphere!enable_deprecated_hid_mitm`) to ease the transition process some.
+  + Please note: support for this setting may be removed to save memory in a future atmosphere release.
++ General system stability improvements to enhance the user's experience.
 ## 0.10.1
 + A bug was fixed that caused memory reallocation to the system pool to work improperly on firmware 5.0.0 and above.
   + Atmosphere was always trying to deallocate memory away from the applet pool and towards the system pool.

emummc/.gitrepo

@@ -6,7 +6,7 @@
 [subrepo]
 	remote = https://github.com/m4xw/emuMMC
 	branch = develop
-	commit = bd81a674a946c30b566e1732a95c18f19b701558
+	commit = d12dd5464422029a1e5601916517ec3f1c81d8d0
-	parent = 6ee525201ccef107c61d81ba73c891e3eb5f0215
+	parent = 259a1a7513236a1de4d373bc6cb99032ede2c626
 	method = rebase
-	cmdver = 0.4.0
+	cmdver = 0.4.1

emummc/README.md

@@ -1,21 +1,21 @@
 # emuMMC
-*A SDMMC driver replacement for Nintendo's Filesystem Services, by **m4xw***
+*A SDMMC driver replacement for Nintendo's Filesystem Services, by **m4xw***  
 
 ### Supported Horizon Versions
 **1.0.0 - 9.1.0**
 
 ## Features
-* Arbitrary SDMMC backend selection
+* Arbitrary SDMMC backend selection  
   **This allows loading eMMC from SD or even SD from eMMC**
-* On the fly hooking / patching, fully self-infesting
+* On the fly hooking / patching, fully self-infesting  
   **Only one payload required for all versions!**
-* File-based SDMMC backend support (from SD)
+* File-based SDMMC backend support (from SD)  
   **This allows loading eMMC images from hekate-backups (split or not)**
-* SDMMC device based sector offset (*currently eMMC only*)
+* SDMMC device based sector offset (*currently eMMC only*)  
   **Raw partition support for eMMC from SD with less performance overhead**
-* Full support for `/Nintendo` folder redirection to a arbitrary path
+* Full support for `/Nintendo` folder redirection to a arbitrary path  
   **No 8 char length restriction!**
-* exosphere based context configuration
+* exosphere based context configuration  
   **This includes full support for multiple emuMMC images**
 
 ## Compiling

emummc/source/FS/offsets/100.h

@@ -48,10 +48,8 @@
 // Nintendo Paths
 #define FS_OFFSET_100_NINTENDO_PATHS \
 { \
-    {.opcode_reg = 9, .adrp_offset = 0x00032C58, .add_rel_offset = 4}, \
+    {.opcode_reg = 8, .adrp_offset = 0x00032C58, .add_rel_offset = 8}, \
-    {.opcode_reg = 8, .adrp_offset = 0x00032C60, .add_rel_offset = 4}, \
+    {.opcode_reg = 9, .adrp_offset = 0x00032F40, .add_rel_offset = 8}, \
-    {.opcode_reg = 9, .adrp_offset = 0x00032F3C, .add_rel_offset = 4}, \
-    {.opcode_reg = 8, .adrp_offset = 0x00032F44, .add_rel_offset = 4}, \
     {.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
 }
 

emummc/source/main.c

@@ -48,6 +48,9 @@ extern char __argdata__;
 // TODO
 static char nintendo_path[0x80] = "Nintendo";
 
+// 1.0.0 requires special path handling because it has separate album and contents paths.
+#define FS_100_ALBUM_PATH    0
+#define FS_100_CONTENTS_PATH 1
 static char nintendo_path_album_100[0x100] = "/Nintendo/Album";
 static char nintendo_path_contents_100[0x100] = "/Nintendo/Contents";
 
@@ -275,23 +278,18 @@ void setup_nintendo_paths(void)
         // 1.0.0 needs special handling because it uses two paths.
         // Do album path
         {
-            int path_len = snprintf(nintendo_path_album_100, sizeof(nintendo_path_album_100), "/%s/Album", nintendo_path);
+            snprintf(nintendo_path_album_100, sizeof(nintendo_path_album_100), "/%s/Album", nintendo_path);
             intptr_t nintendo_album_path_location = (intptr_t)&nintendo_path_album_100;
-            intptr_t album_path_location = nintendo_album_path_location + path_len - 6; // "/Album"
+            uintptr_t fs_adrp_opcode_location = INJECT_OFFSET(uintptr_t, fs_offsets->nintendo_paths[FS_100_ALBUM_PATH].adrp_offset);
-            uintptr_t fs_n_adrp_opcode_location = INJECT_OFFSET(uintptr_t, fs_offsets->nintendo_paths[0].adrp_offset);
+            write_adrp_add(fs_offsets->nintendo_paths[FS_100_ALBUM_PATH].opcode_reg, fs_adrp_opcode_location, fs_offsets->nintendo_paths[FS_100_ALBUM_PATH].add_rel_offset, nintendo_album_path_location);
-            uintptr_t fs_adrp_opcode_location = INJECT_OFFSET(uintptr_t, fs_offsets->nintendo_paths[1].adrp_offset);
-            write_adrp_add(fs_offsets->nintendo_paths[0].opcode_reg, fs_n_adrp_opcode_location, fs_offsets->nintendo_paths[0].add_rel_offset, nintendo_album_path_location);
-            write_adrp_add(fs_offsets->nintendo_paths[1].opcode_reg, fs_adrp_opcode_location, fs_offsets->nintendo_paths[1].add_rel_offset, album_path_location);
         }
+
         // Do contents path
         {
-            int path_len = snprintf(nintendo_path_contents_100, sizeof(nintendo_path_contents_100), "/%s/Contents", nintendo_path);
+            snprintf(nintendo_path_contents_100, sizeof(nintendo_path_contents_100), "/%s/Contents", nintendo_path);
             intptr_t nintendo_contents_path_location = (intptr_t)&nintendo_path_contents_100;
-            intptr_t contents_path_location = nintendo_contents_path_location + path_len - 9; // "/Contents"
+            uintptr_t fs_adrp_opcode_location = INJECT_OFFSET(uintptr_t, fs_offsets->nintendo_paths[FS_100_CONTENTS_PATH].adrp_offset);
-            uintptr_t fs_n_adrp_opcode_location = INJECT_OFFSET(uintptr_t, fs_offsets->nintendo_paths[2].adrp_offset);
+            write_adrp_add(fs_offsets->nintendo_paths[FS_100_CONTENTS_PATH].opcode_reg, fs_adrp_opcode_location, fs_offsets->nintendo_paths[FS_100_CONTENTS_PATH].add_rel_offset, nintendo_contents_path_location);
-            uintptr_t fs_adrp_opcode_location = INJECT_OFFSET(uintptr_t, fs_offsets->nintendo_paths[3].adrp_offset);
-            write_adrp_add(fs_offsets->nintendo_paths[2].opcode_reg, fs_n_adrp_opcode_location, fs_offsets->nintendo_paths[2].add_rel_offset, nintendo_contents_path_location);
-            write_adrp_add(fs_offsets->nintendo_paths[3].opcode_reg, fs_adrp_opcode_location, fs_offsets->nintendo_paths[3].add_rel_offset, contents_path_location);
         }
     }
 }

exosphere/lp0fw/src/car.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -13,7 +13,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
- 
+
 #include <stdint.h>
 
 #include "utils.h"
@@ -33,7 +33,7 @@ static inline uint32_t get_special_clk_reg(CarDevice dev) {
         case CARDEVICE_BPMP: return 0;
         default: reboot();
     }
-} 
+}
 
 static inline uint32_t get_special_clk_val(CarDevice dev) {
     switch (dev) {
@@ -48,19 +48,19 @@ static inline uint32_t get_special_clk_val(CarDevice dev) {
 }
 
 static uint32_t g_clk_reg_offsets[NUM_CAR_BANKS] = {0x010, 0x014, 0x018, 0x360, 0x364, 0x280, 0x298};
-static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4}; 
+static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4};
 
 static uint32_t g_clk_clr_reg_offsets[NUM_CAR_BANKS] = {0x324, 0x32C, 0x334, 0x444, 0x44C, 0x228, 0x2A0};
 
 void car_configure_oscillators(void) {
     /* Enable the crystal oscillator, setting drive strength to the saved value in PMC. */
     CLK_RST_CONTROLLER_OSC_CTRL_0 = (CLK_RST_CONTROLLER_OSC_CTRL_0 & 0xFFFFFC0E) | 1 | (((APBDEV_PMC_OSC_EDPD_OVER_0 >> 1) & 0x3F) << 4);
-    
+
     /* Set CLK_M_DIVISOR to 1 (causes actual division by 2.) */
     CLK_RST_CONTROLLER_SPARE_REG0_0 = (1 << 2);
     /* Reading the register after writing it is required to ensure value takes. */
     (void)(CLK_RST_CONTROLLER_SPARE_REG0_0);
-    
+
     /* Set TIMERUS_USEC_CFG to cycle at 0x60 / 0x5 = 19.2 MHz. */
     /* Value is (dividend << 8) | (divisor). */
     TIMERUS_USEC_CFG_0 = 0x45F;
@@ -68,30 +68,30 @@ void car_configure_oscillators(void) {
 
 void car_mbist_workaround(void) {
     /* This code works around MBIST bug. */
-    
+
     /* Clear LVL2_CLK_GATE_OVR* registers. */
     CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRA_0 = 0;
     CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRB_0 = 0;
     CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC_0 = 0;
     CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD_0 = 0;
     CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE_0 = 0;
-    
+
     /* Clear bit patterns in CAR. */
-    /* L: Reset all but RTC, TMR, GPIO, BPMP Cache (CACHE2). */ 
+    /* L: Reset all but RTC, TMR, GPIO, BPMP Cache (CACHE2). */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[0]) = MAKE_CAR_REG(g_clk_reg_offsets[0]) & 0x7FFFFECF;
-    /* H: Reset all but MC, PMC, FUSE, EMC. */ 
+    /* H: Reset all but MC, PMC, FUSE, EMC. */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[1]) = MAKE_CAR_REG(g_clk_reg_offsets[1]) & 0xFDFFFF3E;
-    /* U: Reset all but CSITE, IRAM[A-D], BPMP Cache RAM (CRAM2). */ 
+    /* U: Reset all but CSITE, IRAM[A-D], BPMP Cache RAM (CRAM2). */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[2]) = MAKE_CAR_REG(g_clk_reg_offsets[2]) & 0xFE0FFDFF;
-    /* V: Reset all but MSELECT, S/PDIF audio doubler, TZRAM, SE. */ 
+    /* V: Reset all but MSELECT, S/PDIF audio doubler, TZRAM, SE. */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[3]) = MAKE_CAR_REG(g_clk_reg_offsets[3]) & 0x3FBFFFF7;
-    /* W: Reset all but PCIERX[0-5], ENTROPY. */ 
+    /* W: Reset all but PCIERX[0-5], ENTROPY. */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[4]) = MAKE_CAR_REG(g_clk_reg_offsets[4]) & 0xFFDFFF03;
-    /* X: Reset all but ETC, MCLK, MCLK2, I2C6, EMC_DLL, GPU, DBGAPB, PLLG_REF, . */ 
+    /* X: Reset all but ETC, MCLK, MCLK2, I2C6, EMC_DLL, GPU, DBGAPB, PLLG_REF, . */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[5]) = MAKE_CAR_REG(g_clk_reg_offsets[5]) & 0xDCFFB87F;
-    /* Y: Reset all but MC_CDPA, MC_CCPA. */ 
+    /* Y: Reset all but MC_CDPA, MC_CCPA. */
     MAKE_CAR_REG(g_clk_clr_reg_offsets[6]) = MAKE_CAR_REG(g_clk_reg_offsets[6]) & 0xFFFFFCFF;
-    
+
     /* Enable clock to MC1, if CH1 is enabled in EMC. */
     if (EMC_FBIO_CFG7_0 & 4) { /* CH1_ENABLE */
         CLK_RST_CONTROLLER_CLK_ENB_W_SET_0 |= 0x40000000; /* SET_CLK_ENB_MC1 */
@@ -132,3 +132,7 @@ void clkrst_reboot(CarDevice dev) {
     clkrst_disable(dev);
     clkrst_enable(dev);
 }
+
+void clkrst_enable_fuse_regs(bool enable) {
+    CLK_RST_CONTROLLER_MISC_CLK_ENB_0 = ((CLK_RST_CONTROLLER_MISC_CLK_ENB_0 & 0xEFFFFFFF) | ((enable & 1) << 28));
+}

exosphere/lp0fw/src/car.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -103,7 +103,8 @@ void rst_disable(CarDevice dev);
 
 void clkrst_enable(CarDevice dev);
 void clkrst_disable(CarDevice dev);
-
 void clkrst_reboot(CarDevice dev);
 
+void clkrst_enable_fuse_regs(bool enable);
+
 #endif

exosphere/lp0fw/src/cluster.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/cluster.h

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/emc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/emc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/flow.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/flow.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/fuse.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -29,7 +29,7 @@ bool fuse_check_downgrade_status(void) {
 }
 
 void fuse_disable_programming(void) {
-    FUSE_REGS->FUSE_DIS_PGM = 1;
+    FUSE_REGS->FUSE_DISABLEREGPROGRAM = 1;
 }
 
 static fuse_bypass_data_t g_fuse_bypass_entries[NUM_FUSE_BYPASS_ENTRIES] = {
@@ -37,13 +37,14 @@ static fuse_bypass_data_t g_fuse_bypass_entries[NUM_FUSE_BYPASS_ENTRIES] = {
 };
 
 void fuse_configure_fuse_bypass(void) {
-    /* Enable fuses in CAR? This seems to affect fuse data visibility. */
+    /* Make all fuse registers visible. */
-    CLK_RST_CONTROLLER_MISC_CLK_ENB_0 |= 0x10000000;
+    clkrst_enable_fuse_regs(true);
     
-    /* Configure bypass/override, only if programming is allowed.  */
+    /* Configure bypass/override, only if programming is allowed. */
-    if (!(FUSE_REGS->FUSE_DIS_PGM & 1)) {
+    if (!(FUSE_REGS->FUSE_DISABLEREGPROGRAM & 1)) {
-        /* Enable write access. */
+        /* Enable write access and flush status. */
-        FUSE_REGS->FUSE_WRITE_ACCESS = (FUSE_REGS->FUSE_WRITE_ACCESS & ~0x1) | 0x10000;
+        FUSE_REGS->FUSE_WRITE_ACCESS_SW = (FUSE_REGS->FUSE_WRITE_ACCESS_SW & ~0x1) | 0x10000;
+        
         /* Enable fuse bypass config. */
         FUSE_REGS->FUSE_FUSEBYPASS = 1;
         
@@ -53,7 +54,7 @@ void fuse_configure_fuse_bypass(void) {
         }
         
         /* Disable fuse write access. */
-        FUSE_REGS->FUSE_WRITE_ACCESS |= 1;
+        FUSE_REGS->FUSE_WRITE_ACCESS_SW |= 1;
         
         /* Enable fuse bypass config. */
         /* I think this is a bug, and Nintendo meant to write 0 here? */
@@ -63,7 +64,7 @@ void fuse_configure_fuse_bypass(void) {
         /* I have no idea why this happens. What? */
         /* This is probably also either a bug or does nothing. */
         /* Is this bit even clearable? */
-        FUSE_REGS->FUSE_DIS_PGM &= 0xFFFFFFFE;
+        FUSE_REGS->FUSE_DISABLEREGPROGRAM &= 0xFFFFFFFE;
         
         /* Restore saved private key disable bit. */
         FUSE_REGS->FUSE_PRIVATEKEYDISABLE |= (APBDEV_PMC_SECURE_SCRATCH21_0 & 0x10);
@@ -71,5 +72,4 @@ void fuse_configure_fuse_bypass(void) {
         /* Lock private key disable secure scratch. */
         APBDEV_PMC_SEC_DISABLE2_0 |= 0x4000000;
     }
-    
+}
-}

exosphere/lp0fw/src/fuse.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -23,154 +23,167 @@
 #include "utils.h"
 
 typedef struct {
-    uint32_t FUSE_CTRL;
+    uint32_t FUSE_FUSECTRL;
-    uint32_t FUSE_REG_ADDR;
+    uint32_t FUSE_FUSEADDR;
-    uint32_t FUSE_REG_READ;
+    uint32_t FUSE_FUSERDATA;
-    uint32_t FUSE_REG_WRITE;
+    uint32_t FUSE_FUSEWDATA;
-    uint32_t FUSE_TIME_RD1;
+    uint32_t FUSE_FUSETIME_RD1;
-    uint32_t FUSE_TIME_RD2;
+    uint32_t FUSE_FUSETIME_RD2;
-    uint32_t FUSE_TIME_PGM1;
+    uint32_t FUSE_FUSETIME_PGM1;
-    uint32_t FUSE_TIME_PGM2;
+    uint32_t FUSE_FUSETIME_PGM2;
-    uint32_t FUSE_PRIV2INTFC;
+    uint32_t FUSE_PRIV2INTFC_START;
     uint32_t FUSE_FUSEBYPASS;
     uint32_t FUSE_PRIVATEKEYDISABLE;
-    uint32_t FUSE_DIS_PGM;
+    uint32_t FUSE_DISABLEREGPROGRAM;
-    uint32_t FUSE_WRITE_ACCESS;
+    uint32_t FUSE_WRITE_ACCESS_SW;
     uint32_t FUSE_PWR_GOOD_SW;
-    uint32_t _0x38[0x32];
+    uint32_t _0x38;
-} fuse_registers_t;
+    uint32_t FUSE_PRIV2RESHIFT;
+    uint32_t _0x40[0x3];
+    uint32_t FUSE_FUSETIME_RD3;
+    uint32_t _0x50[0xC];
+    uint32_t FUSE_PRIVATE_KEY0_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY1_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY2_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY3_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY4_NONZERO;
+    uint32_t _0x90[0x1C];
+} tegra_fuse_t;
 
 typedef struct {
     uint32_t FUSE_PRODUCTION_MODE;
-    uint32_t _0x4;
+    uint32_t FUSE_JTAG_SECUREID_VALID;
-    uint32_t _0x8;
+    uint32_t FUSE_ODM_LOCK;
-    uint32_t _0xC;
+    uint32_t FUSE_OPT_OPENGL_EN;
     uint32_t FUSE_SKU_INFO;
-    uint32_t FUSE_CPU_SPEEDO_0;
+    uint32_t FUSE_CPU_SPEEDO_0_CALIB;
-    uint32_t FUSE_CPU_IDDQ;
+    uint32_t FUSE_CPU_IDDQ_CALIB;
-    uint32_t _0x1C;
+    uint32_t FUSE_DAC_CRT_CALIB;
-    uint32_t _0x20;
+    uint32_t FUSE_DAC_HDTV_CALIB;
-    uint32_t _0x24;
+    uint32_t FUSE_DAC_SDTV_CALIB;
-    uint32_t FUSE_FT_REV;
+    uint32_t FUSE_OPT_FT_REV;
-    uint32_t FUSE_CPU_SPEEDO_1;
+    uint32_t FUSE_CPU_SPEEDO_1_CALIB;
-    uint32_t FUSE_CPU_SPEEDO_2;
+    uint32_t FUSE_CPU_SPEEDO_2_CALIB;
-    uint32_t FUSE_SOC_SPEEDO_0;
+    uint32_t FUSE_SOC_SPEEDO_0_CALIB;
-    uint32_t FUSE_SOC_SPEEDO_1;
+    uint32_t FUSE_SOC_SPEEDO_1_CALIB;
-    uint32_t FUSE_SOC_SPEEDO_2;
+    uint32_t FUSE_SOC_SPEEDO_2_CALIB;
-    uint32_t FUSE_SOC_IDDQ;
+    uint32_t FUSE_SOC_IDDQ_CALIB;
-    uint32_t _0x44;
+    uint32_t FUSE_RESERVED_PRODUCTION_WP;
     uint32_t FUSE_FA;
-    uint32_t _0x4C;
+    uint32_t FUSE_RESERVED_PRODUCTION;
-    uint32_t _0x50;
+    uint32_t FUSE_HDMI_LANE0_CALIB;
-    uint32_t _0x54;
+    uint32_t FUSE_HDMI_LANE1_CALIB;
-    uint32_t _0x58;
+    uint32_t FUSE_HDMI_LANE2_CALIB;
-    uint32_t _0x5C;
+    uint32_t FUSE_HDMI_LANE3_CALIB;
-    uint32_t _0x60;
+    uint32_t FUSE_ENCRYPTION_RATE;
     uint32_t FUSE_PUBLIC_KEY[0x8];
-    uint32_t FUSE_TSENSOR_1;
+    uint32_t FUSE_TSENSOR1_CALIB;
-    uint32_t FUSE_TSENSOR_2;
+    uint32_t FUSE_TSENSOR2_CALIB;
-    uint32_t _0x8C;
+    uint32_t FUSE_VSENSOR_CALIB;
-    uint32_t FUSE_CP_REV;
+    uint32_t FUSE_OPT_CP_REV;
-    uint32_t _0x94;
+    uint32_t FUSE_OPT_PFG;
-    uint32_t FUSE_TSENSOR_0;
+    uint32_t FUSE_TSENSOR0_CALIB;
-    uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE_REG;
+    uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE;
     uint32_t FUSE_SECURITY_MODE;
-    uint32_t FUSE_PRIVATE_KEY[0x4];
+    uint32_t FUSE_PRIVATE_KEY[0x5];
-    uint32_t FUSE_DEVICE_KEY;
+    uint32_t FUSE_ARM_JTAG_DIS;
-    uint32_t _0xB8;
+    uint32_t FUSE_BOOT_DEVICE_INFO;
-    uint32_t _0xBC;
     uint32_t FUSE_RESERVED_SW;
-    uint32_t FUSE_VP8_ENABLE;
+    uint32_t FUSE_OPT_VP9_DISABLE;
     uint32_t FUSE_RESERVED_ODM[0x8];
-    uint32_t _0xE8;
+    uint32_t FUSE_OBS_DIS;
-    uint32_t _0xEC;
+    uint32_t FUSE_NOR_INFO;
-    uint32_t FUSE_SKU_USB_CALIB;
+    uint32_t FUSE_USB_CALIB;
     uint32_t FUSE_SKU_DIRECT_CONFIG;
-    uint32_t _0xF8;
+    uint32_t FUSE_KFUSE_PRIVKEY_CTRL;
-    uint32_t _0xFC;
+    uint32_t FUSE_PACKAGE_INFO;
-    uint32_t FUSE_VENDOR_CODE;
+    uint32_t FUSE_OPT_VENDOR_CODE;
-    uint32_t FUSE_FAB_CODE;
+    uint32_t FUSE_OPT_FAB_CODE;
-    uint32_t FUSE_LOT_CODE_0;
+    uint32_t FUSE_OPT_LOT_CODE_0;
-    uint32_t FUSE_LOT_CODE_1;
+    uint32_t FUSE_OPT_LOT_CODE_1;
-    uint32_t FUSE_WAFER_ID;
+    uint32_t FUSE_OPT_WAFER_ID;
-    uint32_t FUSE_X_COORDINATE;
+    uint32_t FUSE_OPT_X_COORDINATE;
-    uint32_t FUSE_Y_COORDINATE;
+    uint32_t FUSE_OPT_Y_COORDINATE;
-    uint32_t _0x11C;
+    uint32_t FUSE_OPT_SEC_DEBUG_EN;
-    uint32_t _0x120;
+    uint32_t FUSE_OPT_OPS_RESERVED;
     uint32_t FUSE_SATA_CALIB;
-    uint32_t FUSE_GPU_IDDQ;
+    uint32_t FUSE_GPU_IDDQ_CALIB;
-    uint32_t FUSE_TSENSOR_3;
+    uint32_t FUSE_TSENSOR3_CALIB;
-    uint32_t _0x130;
+    uint32_t FUSE_SKU_BOND_OUT_L;
-    uint32_t _0x134;
+    uint32_t FUSE_SKU_BOND_OUT_H;
-    uint32_t _0x138;
+    uint32_t FUSE_SKU_BOND_OUT_U;
-    uint32_t _0x13C;
+    uint32_t FUSE_SKU_BOND_OUT_V;
-    uint32_t _0x140;
+    uint32_t FUSE_SKU_BOND_OUT_W;
-    uint32_t _0x144;
+    uint32_t FUSE_OPT_SAMPLE_TYPE;
     uint32_t FUSE_OPT_SUBREVISION;
-    uint32_t _0x14C;
+    uint32_t FUSE_OPT_SW_RESERVED_0;
-    uint32_t _0x150;
+    uint32_t FUSE_OPT_SW_RESERVED_1;
-    uint32_t FUSE_TSENSOR_4;
+    uint32_t FUSE_TSENSOR4_CALIB;
-    uint32_t FUSE_TSENSOR_5;
+    uint32_t FUSE_TSENSOR5_CALIB;
-    uint32_t FUSE_TSENSOR_6;
+    uint32_t FUSE_TSENSOR6_CALIB;
-    uint32_t FUSE_TSENSOR_7;
+    uint32_t FUSE_TSENSOR7_CALIB;
-    uint32_t FUSE_OPT_PRIV_SEC_DIS;
+    uint32_t FUSE_OPT_PRIV_SEC_EN;
     uint32_t FUSE_PKC_DISABLE;
     uint32_t _0x16C;
     uint32_t _0x170;
     uint32_t _0x174;
     uint32_t _0x178;
-    uint32_t _0x17C;
+    uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE;
     uint32_t FUSE_TSENSOR_COMMON;
-    uint32_t _0x184;
+    uint32_t FUSE_OPT_CP_BIN;
-    uint32_t _0x188;
+    uint32_t FUSE_OPT_GPU_DISABLE;
-    uint32_t _0x18C;
+    uint32_t FUSE_OPT_FT_BIN;
-    uint32_t _0x190;
+    uint32_t FUSE_OPT_DONE_MAP;
     uint32_t _0x194;
-    uint32_t _0x198;
+    uint32_t FUSE_APB2JTAG_DISABLE;
-    uint32_t FUSE_DEBUG_AUTH_OVERRIDE;
+    uint32_t FUSE_ODM_INFO;
     uint32_t _0x1A0;
     uint32_t _0x1A4;
-    uint32_t _0x1A8;
+    uint32_t FUSE_ARM_CRYPT_DE_FEATURE;
     uint32_t _0x1AC;
     uint32_t _0x1B0;
     uint32_t _0x1B4;
     uint32_t _0x1B8;
     uint32_t _0x1BC;
-    uint32_t _0x1D0;
+    uint32_t FUSE_WOA_SKU_FLAG;
-    uint32_t FUSE_TSENSOR_8;
+    uint32_t FUSE_ECO_RESERVE_1;
+    uint32_t FUSE_GCPLEX_CONFIG_FUSE;
+    uint32_t FUSE_PRODUCTION_MONTH;
+    uint32_t FUSE_RAM_REPAIR_INDICATOR;
+    uint32_t FUSE_TSENSOR9_CALIB;
     uint32_t _0x1D8;
-    uint32_t _0x1DC;
+    uint32_t FUSE_VMIN_CALIBRATION;
-    uint32_t _0x1E0;
+    uint32_t FUSE_AGING_SENSOR_CALIBRATION;
-    uint32_t _0x1E4;
+    uint32_t FUSE_DEBUG_AUTHENTICATION;
-    uint32_t _0x1E8;
+    uint32_t FUSE_SECURE_PROVISION_INDEX;
-    uint32_t _0x1EC;
+    uint32_t FUSE_SECURE_PROVISION_INFO;
-    uint32_t _0x1F0;
+    uint32_t FUSE_OPT_GPU_DISABLE_CP1;
-    uint32_t _0x1F4;
+    uint32_t FUSE_SPARE_ENDIS;
-    uint32_t _0x1F8;
+    uint32_t FUSE_ECO_RESERVE_0;
     uint32_t _0x1FC;
     uint32_t _0x200;
-    uint32_t FUSE_RESERVED_CALIB;
+    uint32_t FUSE_RESERVED_CALIB0;
-    uint32_t _0x208;
+    uint32_t FUSE_RESERVED_CALIB1;
-    uint32_t _0x20C;
+    uint32_t FUSE_OPT_GPU_TPC0_DISABLE;
-    uint32_t _0x210;
+    uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1;
-    uint32_t _0x214;
+    uint32_t FUSE_OPT_CPU_DISABLE;
-    uint32_t _0x218;
+    uint32_t FUSE_OPT_CPU_DISABLE_CP1;
-    uint32_t FUSE_TSENSOR_9;
+    uint32_t FUSE_TSENSOR10_CALIB;
-    uint32_t _0x220;
+    uint32_t FUSE_TSENSOR10_CALIB_AUX;
-    uint32_t _0x224;
+    uint32_t FUSE_OPT_RAM_SVOP_DP;
-    uint32_t _0x228;
+    uint32_t FUSE_OPT_RAM_SVOP_PDP;
-    uint32_t _0x22C;
+    uint32_t FUSE_OPT_RAM_SVOP_REG;
-    uint32_t _0x230;
+    uint32_t FUSE_OPT_RAM_SVOP_SP;
-    uint32_t _0x234;
+    uint32_t FUSE_OPT_RAM_SVOP_SMPDP;
-    uint32_t _0x238;
+    uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2;
-    uint32_t _0x23C;
+    uint32_t FUSE_OPT_GPU_TPC1_DISABLE;
-    uint32_t _0x240;
+    uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1;
-    uint32_t _0x244;
+    uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2;
-    uint32_t _0x248;
+    uint32_t FUSE_OPT_CPU_DISABLE_CP2;
-    uint32_t _0x24C;
+    uint32_t FUSE_OPT_GPU_DISABLE_CP2;
     uint32_t FUSE_USB_CALIB_EXT;
-    uint32_t _0x254;
+    uint32_t FUSE_RESERVED_FIELD;
-    uint32_t _0x258;
+    uint32_t FUSE_OPT_ECC_EN;
     uint32_t _0x25C;
     uint32_t _0x260;
     uint32_t _0x264;
@@ -179,12 +192,12 @@ typedef struct {
     uint32_t _0x270;
     uint32_t _0x274;
     uint32_t _0x278;
-    uint32_t _0x27C;
+    uint32_t FUSE_SPARE_REALIGNMENT_REG;
     uint32_t FUSE_SPARE_BIT[0x20];
-} fuse_chip_registers_t;
+} tegra_fuse_chip_t;
 
-#define FUSE_REGS       ((volatile fuse_registers_t *)(0x7000F800))
+#define FUSE_REGS       ((volatile tegra_fuse_t *)(0x7000F800))
-#define FUSE_CHIP_REGS  ((volatile fuse_chip_registers_t *)(0x7000F900))
+#define FUSE_CHIP_REGS  ((volatile tegra_fuse_chip_t *)(0x7000F900))
 
 #define MAKE_FUSE_REG(n) MAKE_REG32(0x7000F800 + n)
 
@@ -194,9 +207,7 @@ typedef struct {
 } fuse_bypass_data_t;
 
 bool fuse_check_downgrade_status(void);
-
 void fuse_configure_fuse_bypass(void);
-
 void fuse_disable_programming(void);
 
 #endif

exosphere/lp0fw/src/i2c.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/i2c.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/lp0.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/lp0.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/mc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/mc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/misc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -23,26 +23,26 @@
 #include "pmc.h"
 
 void misc_configure_device_dbg_settings(void) {
-    /* Enable RTCK daisychaining by setting TBE bit. */
+    /* Set APB_MISC_PP_CONFIG_CTL_TBE (enables RTCK daisy-chaining). */
     APB_MISC_PP_CONFIG_CTL_0 = 0x80;
     
-    /* Literally none of this is documented in the TRM, lol. */
+    /* Configure JTAG and debug bits. */
     if (FUSE_CHIP_REGS->FUSE_SECURITY_MODE == 1) {
-        uint32_t secure_boot_val = 0b0100; /* Sets NIDEN for aarch64. */
+        uint32_t secure_boot_val = 0b0100;      /* Set NIDEN for aarch64. */
-        uint32_t misc_val = 0x40;
+        uint32_t pp_config_ctl_val = 0x40;      /* Set APB_MISC_PP_CONFIG_CTL_JTAG. */
         if (APBDEV_PMC_STICKY_BITS_0 & 0x40) {
-            misc_val = 0x0;
+            pp_config_ctl_val = 0x0;
         } else {
-            secure_boot_val = 0b1101; /* Sets SPNIDEN, NIDEN, DBGEN for aarch64. */
+            secure_boot_val = 0b1101;           /* Set SPNIDEN, NIDEN, DBGEN for aarch64. */
         }
-        SB_PFCFG_0 = (SB_PFCFG_0 & ~0b1111) | secure_boot_val; /* Configures debug bits. */
+        SB_PFCFG_0 = (SB_PFCFG_0 & ~0b1111) | secure_boot_val;      /* Configure debug bits. */
-        APB_MISC_PP_CONFIG_CTL_0 |= misc_val; /* Undocumented, seems to control invasive debugging/JTAG. */
+        APB_MISC_PP_CONFIG_CTL_0 |= pp_config_ctl_val;              /* Configure JTAG. */
     }
     
-    /* Set sticky bits based SECURITY_MODE. */
+    /* Set HDA_LPBK_DIS if FUSE_SECURITY_MODE is set (disables HDA codec loopback). */
     APBDEV_PMC_STICKY_BITS_0 |= FUSE_CHIP_REGS->FUSE_SECURITY_MODE;
     
-    /* Set E_INPUT in PINMUX_AUX_GPIO_PA6_0 */
+    /* Set E_INPUT in PINMUX_AUX_GPIO_PA6_0 (needed by the XUSB and SATA controllers). */
     PINMUX_AUX_GPIO_PA6_0 |= 0x40;
 }
 

exosphere/lp0fw/src/misc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -26,17 +26,14 @@
 #define MAKE_MISC_REG(n) MAKE_REG32(MISC_BASE + n)
 
 #define APB_MISC_PP_CONFIG_CTL_0 MAKE_MISC_REG(0x024)
-
 #define APB_MISC_GP_ASDBGREG_0 MAKE_MISC_REG(0x810)
 
 #define PINMUX_AUX_PWR_I2C_SCL_0 MAKE_MISC_REG(0x30DC)
 #define PINMUX_AUX_PWR_I2C_SDA_0 MAKE_MISC_REG(0x30E0)
 #define PINMUX_AUX_DVFS_PWM_0    MAKE_MISC_REG(0x3184)
-
 #define PINMUX_AUX_GPIO_PA6_0 MAKE_MISC_REG(0x3244)
 
 void misc_configure_device_dbg_settings(void);
-
 void misc_restore_ram_svop(void);
 
 #endif

exosphere/lp0fw/src/pmc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -23,47 +23,35 @@
 
 #define MAKE_PMC_REG(ofs) (MAKE_REG32(PMC_BASE + ofs))
 
-#define APBDEV_PMC_CNTRL_0           MAKE_PMC_REG(0x000)
+#define APBDEV_PMC_CNTRL_0                  MAKE_PMC_REG(0x000)
-
+#define APBDEV_PMC_DPD_SAMPLE_0             MAKE_PMC_REG(0x020)
-#define APBDEV_PMC_DPD_SAMPLE_0      MAKE_PMC_REG(0x020)
+#define APBDEV_PMC_DPD_ENABLE_0             MAKE_PMC_REG(0x024)
-
+#define APBDEV_PMC_CLAMP_STATUS_0           MAKE_PMC_REG(0x02C)
-#define APBDEV_PMC_DPD_ENABLE_0      MAKE_PMC_REG(0x024)
+#define APBDEV_PMC_PWRGATE_TOGGLE_0         MAKE_PMC_REG(0x030)
-
+#define APBDEV_PMC_REMOVE_CLAMPING_CMD_0    MAKE_PMC_REG(0x034)
-#define APBDEV_PMC_CLAMP_STATUS_0    MAKE_PMC_REG(0x02C)
+#define APBDEV_PMC_PWRGATE_STATUS_0         MAKE_PMC_REG(0x038)
-
+#define APBDEV_PMC_SCRATCH12_0              MAKE_PMC_REG(0x080)
-#define APBDEV_PMC_PWRGATE_TOGGLE_0       MAKE_PMC_REG(0x030)
+#define APBDEV_PMC_SCRATCH13_0              MAKE_PMC_REG(0x084)
-#define APBDEV_PMC_REMOVE_CLAMPING_CMD_0  MAKE_PMC_REG(0x034)
+#define APBDEV_PMC_SCRATCH18_0              MAKE_PMC_REG(0x098)
-#define APBDEV_PMC_PWRGATE_STATUS_0       MAKE_PMC_REG(0x038)
+#define APBDEV_PMC_SCRATCH190_0             MAKE_PMC_REG(0x818)
-
+#define APBDEV_PMC_OSC_EDPD_OVER_0          MAKE_PMC_REG(0x1A4)
-#define APBDEV_PMC_SCRATCH12_0       MAKE_PMC_REG(0x080)
+#define APBDEV_PMC_STICKY_BITS_0            MAKE_PMC_REG(0x2C0)
-#define APBDEV_PMC_SCRATCH13_0       MAKE_PMC_REG(0x084)
+#define APBDEV_PMC_SEC_DISABLE2_0           MAKE_PMC_REG(0x2C4)
-#define APBDEV_PMC_SCRATCH18_0       MAKE_PMC_REG(0x098)
+#define APBDEV_PMC_WEAK_BIAS_0              MAKE_PMC_REG(0x2C8)
-#define APBDEV_PMC_SCRATCH190_0      MAKE_PMC_REG(0x818)
+#define APBDEV_PMC_SECURE_SCRATCH21_0       MAKE_PMC_REG(0x334)
-
+#define APBDEV_PMC_SECURE_SCRATCH32_0       MAKE_PMC_REG(0x360)
-#define APBDEV_PMC_OSC_EDPD_OVER_0   MAKE_PMC_REG(0x1A4)
+#define APBDEV_PMC_SECURE_SCRATCH34_0       MAKE_PMC_REG(0x368)
-
+#define APBDEV_PMC_SECURE_SCRATCH35_0       MAKE_PMC_REG(0x36C)
-#define APBDEV_PMC_STICKY_BITS_0     MAKE_PMC_REG(0x2C0)
+#define APBDEV_PMC_SECURE_SCRATCH112_0      MAKE_PMC_REG(0xB18)
-#define APBDEV_PMC_SEC_DISABLE2_0    MAKE_PMC_REG(0x2C4)
+#define APBDEV_PMC_SECURE_SCRATCH113_0      MAKE_PMC_REG(0xB1C)
-#define APBDEV_PMC_WEAK_BIAS_0       MAKE_PMC_REG(0x2C8)
+#define APBDEV_PMC_SECURE_SCRATCH114_0      MAKE_PMC_REG(0xB20)
-
+#define APBDEV_PMC_SECURE_SCRATCH115_0      MAKE_PMC_REG(0xB24)
-#define APBDEV_PMC_SECURE_SCRATCH21_0 MAKE_PMC_REG(0x334)
+#define APBDEV_PMC_FUSE_CTRL                MAKE_PMC_REG(0x450)
-#define APBDEV_PMC_SECURE_SCRATCH32_0 MAKE_PMC_REG(0x360)
+#define APBDEV_PMC_IO_DPD3_REQ_0            MAKE_PMC_REG(0x45C)
-#define APBDEV_PMC_SECURE_SCRATCH34_0 MAKE_PMC_REG(0x368)
+#define APBDEV_PMC_IO_DPD3_STATUS_0         MAKE_PMC_REG(0x460)
-#define APBDEV_PMC_SECURE_SCRATCH35_0 MAKE_PMC_REG(0x36C)
+#define APBDEV_PMC_IO_DPD4_REQ_0            MAKE_PMC_REG(0x464)
-
+#define APBDEV_PMC_IO_DPD4_STATUS_0         MAKE_PMC_REG(0x468)
-#define APBDEV_PMC_SECURE_SCRATCH112_0 MAKE_PMC_REG(0xB18)
+#define APBDEV_PMC_SET_SW_CLAMP_0           MAKE_PMC_REG(0x47C)
-#define APBDEV_PMC_SECURE_SCRATCH113_0 MAKE_PMC_REG(0xB1C)
+#define APBDEV_PMC_DDR_CNTRL_0              MAKE_PMC_REG(0x4E4)
-#define APBDEV_PMC_SECURE_SCRATCH114_0 MAKE_PMC_REG(0xB20)
-#define APBDEV_PMC_SECURE_SCRATCH115_0 MAKE_PMC_REG(0xB24)
-
-#define APBDEV_PMC_IO_DPD3_REQ_0     MAKE_PMC_REG(0x45C)
-#define APBDEV_PMC_IO_DPD3_STATUS_0  MAKE_PMC_REG(0x460)
-
-#define APBDEV_PMC_IO_DPD4_REQ_0     MAKE_PMC_REG(0x464)
-#define APBDEV_PMC_IO_DPD4_STATUS_0  MAKE_PMC_REG(0x468)
-
-#define APBDEV_PMC_SET_SW_CLAMP_0    MAKE_PMC_REG(0x47C)
-
-#define APBDEV_PMC_DDR_CNTRL_0       MAKE_PMC_REG(0x4E4)
 
 #endif

exosphere/lp0fw/src/se.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -36,20 +36,20 @@ static void __attribute__((__noinline__)) ll_init(volatile se_ll_t *ll, void *bu
 }
 
 void se_check_error_status_reg(void) {
-    if (se_get_regs()->ERR_STATUS_REG) {
+    if (se_get_regs()->SE_ERR_STATUS) {
         reboot();
     }
 }
 
 void se_check_for_error(void) {
     volatile tegra_se_t *se = se_get_regs();
-    if (se->INT_STATUS_REG & 0x10000 || se->FLAGS_REG & 3 || se->ERR_STATUS_REG) {
+    if (se->SE_INT_STATUS & 0x10000 || se->SE_STATUS & 3 || se->SE_ERR_STATUS) {
         reboot();
     }
 }
 
 void se_verify_flags_cleared(void) {
-    if (se_get_regs()->FLAGS_REG & 3) {
+    if (se_get_regs()->SE_STATUS & 3) {
         reboot();
     }
 }
@@ -63,8 +63,8 @@ void clear_aes_keyslot(unsigned int keyslot) {
 
     /* Zero out the whole keyslot and IV. */
     for (unsigned int i = 0; i < 0x10; i++) {
-        se->AES_KEYTABLE_ADDR = (keyslot << 4) | i;
+        se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | i;
-        se->AES_KEYTABLE_DATA = 0;
+        se->SE_CRYPTO_KEYTABLE_DATA = 0;
     }
 }
 
@@ -78,13 +78,13 @@ void clear_rsa_keyslot(unsigned int keyslot) {
     /* Zero out the whole keyslot. */
     for (unsigned int i = 0; i < 0x40; i++) {
         /* Select Keyslot Modulus[i] */
-        se->RSA_KEYTABLE_ADDR = (keyslot << 7) | i | 0x40;
+        se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i | 0x40;
-        se->RSA_KEYTABLE_DATA = 0;
+        se->SE_RSA_KEYTABLE_DATA = 0;
     }
     for (unsigned int i = 0; i < 0x40; i++) {
         /* Select Keyslot Expontent[i] */
-        se->RSA_KEYTABLE_ADDR = (keyslot << 7) | i;
+        se->SE_RSA_KEYTABLE_ADDR = (keyslot << 7) | i;
-        se->RSA_KEYTABLE_DATA = 0;
+        se->SE_RSA_KEYTABLE_DATA = 0;
     }
 }
 
@@ -96,8 +96,8 @@ void clear_aes_keyslot_iv(unsigned int keyslot) {
     }
 
     for (size_t i = 0; i < (0x10 >> 2); i++) {
-        se->AES_KEYTABLE_ADDR = (keyslot << 4) | 8 | i;
+        se->SE_CRYPTO_KEYTABLE_ADDR = (keyslot << 4) | 8 | i;
-        se->AES_KEYTABLE_DATA = 0;
+        se->SE_CRYPTO_KEYTABLE_DATA = 0;
     }
 }
 
@@ -111,15 +111,15 @@ void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const v
     ll_init(&out_ll, dst, dst_size);
 
     /* Set the LLs. */
-    se->IN_LL_ADDR_REG = (uint32_t)(&in_ll);
+    se->SE_IN_LL_ADDR = (uint32_t)(&in_ll);
-    se->OUT_LL_ADDR_REG = (uint32_t) (&out_ll);
+    se->SE_OUT_LL_ADDR = (uint32_t) (&out_ll);
 
     /* Set registers for operation. */
-    se->ERR_STATUS_REG = se->ERR_STATUS_REG;
+    se->SE_ERR_STATUS = se->SE_ERR_STATUS;
-    se->INT_STATUS_REG = se->INT_STATUS_REG;
+    se->SE_INT_STATUS = se->SE_INT_STATUS;
-    se->OPERATION_REG = op;
+    se->SE_OPERATION = op;
 
-    while (!(se->INT_STATUS_REG & 0x10)) { /* Wait a while */ }
+    while (!(se->SE_INT_STATUS & 0x10)) { /* Wait a while */ }
     se_check_for_error();
 }
 
@@ -137,7 +137,7 @@ void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src,
     }
 
     /* Trigger AES operation. */
-    se_get_regs()->BLOCK_COUNT_REG = 0;
+    se_get_regs()->SE_CRYPTO_LAST_BLOCK = 0;
     trigger_se_blocking_op(OP_START, block, sizeof(block), block, sizeof(block));
 
     /* Copy output data into dst. */
@@ -154,8 +154,8 @@ void se_aes_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_size,
     }
 
     /* Set configuration high (256-bit vs 128-bit) based on parameter. */
-    se->CONFIG_REG = (ALG_AES_ENC | DST_MEMORY) | (config_high << 16);
+    se->SE_CONFIG = (ALG_AES_ENC | DST_MEMORY) | (config_high << 16);
-    se->CRYPTO_REG = keyslot << 24 | 0x100;
+    se->SE_CRYPTO_CONFIG = keyslot << 24 | 0x100;
     se_perform_aes_block_operation(dst, 0x10, src, 0x10);
 }
 
@@ -166,8 +166,8 @@ void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size,
         reboot();
     }
 
-    se->CONFIG_REG = (ALG_AES_DEC | DST_MEMORY);
+    se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY);
-    se->CRYPTO_REG = keyslot << 24;
+    se->SE_CRYPTO_CONFIG = keyslot << 24;
     se_perform_aes_block_operation(dst, 0x10, src, 0x10);
 }
 
@@ -198,16 +198,16 @@ void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, con
         shift_left_xor_rb(derived_key);
     }
 
-    se->CONFIG_REG = (ALG_AES_ENC | DST_HASHREG) | (config_high << 16);
+    se->SE_CONFIG = (ALG_AES_ENC | DST_HASHREG) | (config_high << 16);
-    se->CRYPTO_REG = (keyslot << 24) | (0x145);
+    se->SE_CRYPTO_CONFIG = (keyslot << 24) | (0x145);
     clear_aes_keyslot_iv(keyslot);
 
     unsigned int num_blocks = (data_size + 0xF) >> 4;
     /* Handle aligned blocks. */
     if (num_blocks > 1) {
-        se->BLOCK_COUNT_REG = num_blocks - 2;
+        se->SE_CRYPTO_LAST_BLOCK = num_blocks - 2;
         trigger_se_blocking_op(OP_START, NULL, 0, data, data_size);
-        se->CRYPTO_REG |= 0x80;
+        se->SE_CRYPTO_CONFIG |= 0x80;
     }
 
     /* Create final block. */
@@ -224,12 +224,12 @@ void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, con
     }
 
     /* Perform last operation. */
-    se->BLOCK_COUNT_REG = 0;
+    se->SE_CRYPTO_LAST_BLOCK = 0;
     trigger_se_blocking_op(OP_START, NULL, 0, last_block, sizeof(last_block));
 
     /* Copy output CMAC. */
     for (unsigned int i = 0; i < (cmac_size >> 2); i++) {
-        ((uint32_t *)cmac)[i] = ((volatile uint32_t *)se->HASH_RESULT_REG)[i];
+        ((uint32_t *)cmac)[i] = ((volatile uint32_t *)se->SE_HASH_RESULT)[i];
     }
 }
 
@@ -244,9 +244,9 @@ void se_aes_256_cbc_decrypt(unsigned int keyslot, void *dst, size_t dst_size, co
         reboot();
     }
 
-    se->CONFIG_REG = (ALG_AES_DEC | DST_MEMORY) | (0x202 << 16);
+    se->SE_CONFIG = (ALG_AES_DEC | DST_MEMORY) | (0x202 << 16);
-    se->CRYPTO_REG = (keyslot << 24) | 0x66;
+    se->SE_CRYPTO_CONFIG = (keyslot << 24) | 0x66;
     clear_aes_keyslot_iv(keyslot);
-    se->BLOCK_COUNT_REG = (src_size >> 4) - 1;
+    se->SE_CRYPTO_LAST_BLOCK = (src_size >> 4) - 1;
     trigger_se_blocking_op(OP_START, dst, dst_size, src, src_size);
 }

exosphere/lp0fw/src/se.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -92,71 +92,59 @@
 #define RSA_2048_BYTES 0x100
 
 typedef struct {
-    uint32_t _0x0;
+    uint32_t SE_SE_SECURITY;
-    uint32_t _0x4;
+    uint32_t SE_TZRAM_SECURITY;
-    uint32_t OPERATION_REG;
+    uint32_t SE_OPERATION;
-    uint32_t INT_ENABLE_REG;
+    uint32_t SE_INT_ENABLE;
-    uint32_t INT_STATUS_REG;
+    uint32_t SE_INT_STATUS;
-    uint32_t CONFIG_REG;
+    uint32_t SE_CONFIG;
-    uint32_t IN_LL_ADDR_REG;
+    uint32_t SE_IN_LL_ADDR;
-    uint32_t _0x1C;
+    uint32_t SE_IN_CUR_BYTE_ADDR;
-    uint32_t _0x20;
+    uint32_t SE_IN_CUR_LL_ID;
-    uint32_t OUT_LL_ADDR_REG;
+    uint32_t SE_OUT_LL_ADDR;
-    uint32_t _0x28;
+    uint32_t SE_OUT_CUR_BYTE_ADDR;
-    uint32_t _0x2C;
+    uint32_t SE_OUT_CUR_LL_ID;
-    uint8_t HASH_RESULT_REG[0x20];
+    uint32_t SE_HASH_RESULT[0x10];
-    uint8_t _0x50[0x20];
+    uint32_t SE_CTX_SAVE_CONFIG;
-    uint32_t CONTEXT_SAVE_CONFIG_REG;
+    uint32_t _0x74[0x63];
-    uint8_t _0x74[0x18C];
+    uint32_t SE_SHA_CONFIG;
-    uint32_t SHA_CONFIG_REG;
+    uint32_t SE_SHA_MSG_LENGTH[0x4];
-    uint32_t SHA_MSG_LENGTH_REG;
+    uint32_t SE_SHA_MSG_LEFT[0x4];
-    uint32_t _0x208;
+    uint32_t _0x224[0x17];
-    uint32_t _0x20C;
+    uint32_t SE_CRYPTO_SECURITY_PERKEY;
-    uint32_t _0x210;
+    uint32_t SE_CRYPTO_KEYTABLE_ACCESS[0x10];
-    uint32_t SHA_MSG_LEFT_REG;
+    uint32_t _0x2C4[0x10];
-    uint32_t _0x218;
+    uint32_t SE_CRYPTO_CONFIG;
-    uint32_t _0x21C;
+    uint32_t SE_CRYPTO_LINEAR_CTR[0x4];
-    uint32_t _0x220;
+    uint32_t SE_CRYPTO_LAST_BLOCK;
-    uint32_t _0x224;
+    uint32_t SE_CRYPTO_KEYTABLE_ADDR;
-    uint8_t _0x228[0x58];
+    uint32_t SE_CRYPTO_KEYTABLE_DATA;
-    uint32_t AES_KEY_READ_DISABLE_REG;
+    uint32_t _0x324[0x3];
-    uint32_t AES_KEYSLOT_FLAGS[0x10];
+    uint32_t SE_CRYPTO_KEYTABLE_DST;
-    uint8_t _0x2C4[0x3C];
+    uint32_t _0x334[0x3];
-    uint32_t _0x300;
+    uint32_t SE_RNG_CONFIG;
-    uint32_t CRYPTO_REG;
+    uint32_t SE_RNG_SRC_CONFIG;
-    uint32_t CRYPTO_CTR_REG[4];
+    uint32_t SE_RNG_RESEED_INTERVAL;
-    uint32_t BLOCK_COUNT_REG;
+    uint32_t _0x34C[0x2D];
-    uint32_t AES_KEYTABLE_ADDR;
+    uint32_t SE_RSA_CONFIG;
-    uint32_t AES_KEYTABLE_DATA;
+    uint32_t SE_RSA_KEY_SIZE;
-    uint32_t _0x324;
+    uint32_t SE_RSA_EXP_SIZE;
-    uint32_t _0x328;
+    uint32_t SE_RSA_SECURITY_PERKEY;
-    uint32_t _0x32C;
+    uint32_t SE_RSA_KEYTABLE_ACCESS[0x2];
-    uint32_t CRYPTO_KEYTABLE_DST_REG;
+    uint32_t _0x418[0x2];
-    uint8_t _0x334[0xC];
+    uint32_t SE_RSA_KEYTABLE_ADDR;
-    uint32_t RNG_CONFIG_REG;
+    uint32_t SE_RSA_KEYTABLE_DATA;
-    uint32_t RNG_SRC_CONFIG_REG;
+    uint32_t SE_RSA_OUTPUT[0x40];
-    uint32_t RNG_RESEED_INTERVAL_REG;
+    uint32_t _0x528[0xB6];
-    uint8_t _0x34C[0xB4];
+    uint32_t SE_STATUS;
-    uint32_t RSA_CONFIG;
+    uint32_t SE_ERR_STATUS;
-    uint32_t RSA_KEY_SIZE_REG;
+    uint32_t SE_MISC;
-    uint32_t RSA_EXP_SIZE_REG;
+    uint32_t SE_SPARE;
-    uint32_t RSA_KEY_READ_DISABLE_REG;
+    uint32_t SE_ENTROPY_DEBUG_COUNTER;
-    uint32_t RSA_KEYSLOT_FLAGS[2];
-    uint32_t _0x418;
-    uint32_t _0x41C;
-    uint32_t RSA_KEYTABLE_ADDR;
-    uint32_t RSA_KEYTABLE_DATA;
-    uint8_t RSA_OUTPUT[0x100];
-    uint8_t _0x528[0x2D8];
-    uint32_t FLAGS_REG;
-    uint32_t ERR_STATUS_REG;
-    uint32_t _0x808;
-    uint32_t SPARE_0;
-    uint32_t _0x810;
     uint32_t _0x814;
     uint32_t _0x818;
     uint32_t _0x81C;
-    uint8_t _0x820[0x17E0];
+    uint32_t _0x820[0x5F8];
 } tegra_se_t;
 
 typedef struct {

exosphere/lp0fw/src/secmon.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -46,7 +46,7 @@ void secmon_restore_to_tzram(const uint32_t target_firmware) {
     }
 
     /* Make security engine require secure busmaster. */
-    se_get_regs()->_0x4 = 0;
+    se_get_regs()->SE_TZRAM_SECURITY = 0;
 
     /* TODO: se_verify_keys_unreadable(); */
 

exosphere/lp0fw/src/secmon.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/start.s

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/sysreg.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/timer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/lp0fw/src/utils.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/i2c.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/i2c.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/max77620.h

@@ -2,7 +2,7 @@
  * Defining registers address and its bit definitions of MAX77620 and MAX20024
  *
  * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/shutdown.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/start.s

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/timer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/rebootstub/src/utils.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/emc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/emc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/i2c.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/i2c.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/pmc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/sc7.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/sc7.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/start.s

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/timer.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/sc7fw/src/utils.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/actmon.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/actmon.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/arm.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/arm.s

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/bootconfig.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/bootconfig.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/bootup.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/bootup.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/bpmp.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/car.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -13,7 +13,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
- 
+
 #include <stdint.h>
 
 #include "utils.h"
@@ -30,7 +30,7 @@ static inline uint32_t get_special_clk_reg(CarDevice dev) {
         case CARDEVICE_BPMP: return 0;
         default: generic_panic();
     }
-} 
+}
 
 static inline uint32_t get_special_clk_val(CarDevice dev) {
     switch (dev) {
@@ -45,7 +45,7 @@ static inline uint32_t get_special_clk_val(CarDevice dev) {
 }
 
 static uint32_t g_clk_reg_offsets[NUM_CAR_BANKS] = {0x010, 0x014, 0x018, 0x360, 0x364, 0x280, 0x298};
-static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4}; 
+static uint32_t g_rst_reg_offsets[NUM_CAR_BANKS] = {0x004, 0x008, 0x00C, 0x358, 0x35C, 0x28C, 0x2A4};
 
 void clk_enable(CarDevice dev) {
     uint32_t special_reg;
@@ -67,7 +67,6 @@ void rst_disable(CarDevice dev) {
     MAKE_CAR_REG(g_rst_reg_offsets[dev >> 5]) &= ~(BIT(dev & 0x1F));
 }
 
-
 void clkrst_enable(CarDevice dev) {
     clk_enable(dev);
     rst_disable(dev);
@@ -82,3 +81,7 @@ void clkrst_reboot(CarDevice dev) {
     clkrst_disable(dev);
     clkrst_enable(dev);
 }
+
+void clkrst_enable_fuse_regs(bool enable) {
+    CLK_RST_CONTROLLER_MISC_CLK_ENB_0 = ((CLK_RST_CONTROLLER_MISC_CLK_ENB_0 & 0xEFFFFFFF) | ((enable & 1) << 28));
+}

exosphere/src/car.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -51,7 +51,8 @@ void rst_disable(CarDevice dev);
 
 void clkrst_enable(CarDevice dev);
 void clkrst_disable(CarDevice dev);
-
 void clkrst_reboot(CarDevice dev);
 
+void clkrst_enable_fuse_regs(bool enable);
+
 #endif

exosphere/src/coldboot_init.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/coldboot_main.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/configitem.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -187,11 +187,10 @@ uint32_t configitem_get(bool privileged, ConfigItem item, uint64_t *p_outvalue)
             *p_outvalue = INTERRUPT_ID_USER_SECURITY_ENGINE;
             break;
         case CONFIGITEM_VERSION:
-            /* Always returns maxver - 1 on hardware. */
+            *p_outvalue = fuse_get_expected_fuse_version(exosphere_get_target_firmware());
-            *p_outvalue = PACKAGE2_MAXVER_400_410 - 1;
             break;
         case CONFIGITEM_HARDWARETYPE:
-            *p_outvalue = fuse_get_hardware_type();
+            *p_outvalue = fuse_get_hardware_type(exosphere_get_target_firmware());
             break;
         case CONFIGITEM_ISRETAIL:
             *p_outvalue = fuse_get_retail_type();

exosphere/src/configitem.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/cpu_context.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/cpu_context.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/emummc_cfg.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/exceptions.s

@@ -4,7 +4,7 @@
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
- 
+
 
 /*
  * Declare the exception vector table, enforcing it is aligned on a
@@ -92,7 +92,7 @@ vector_entry fiq_spx
 vector_entry serror_spx
     b unknown_exception
     check_vector_size serror_spx
-    
+
 /* Lower EL, A64 */
 vector_entry synch_a64
     stp x29, x30, [sp, #-0x10]!

exosphere/src/exocfg.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/exocfg.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/flow.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/fuse.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -13,185 +13,168 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
- 
+
 #include <string.h>
+#include <vapours/ams_version.h>
 
 #include "car.h"
 #include "fuse.h"
-#include "utils.h"
-#include "timers.h"
-#include "exocfg.h"
-
 #include "masterkey.h"
+#include "pmc.h"
+#include "timers.h"
 
 static bool g_has_checked_for_rcm_bug_patch = false;
 static bool g_has_rcm_bug_patch = false;
 
 /* Prototypes for internal commands. */
-void fuse_make_regs_visible(void);
-
 void fuse_enable_power(void);
 void fuse_disable_power(void);
 void fuse_wait_idle(void);
 
-/* Initialize the FUSE driver */
+/* Initialize the fuse driver */
-void fuse_init(void)
+void fuse_init(void) {
-{
+    /* Make all fuse registers visible, disable the private key and disable programming. */
-    fuse_make_regs_visible();
+    clkrst_enable_fuse_regs(true);
-    fuse_secondary_private_key_disable();
+    fuse_disable_private_key();
     fuse_disable_programming();
-    
+
     /* TODO: Should we allow this to be done later? */
     if (!g_has_checked_for_rcm_bug_patch) {
         (void)(fuse_has_rcm_bug_patch());
     }
-
-    /* TODO: Overrides (iROM patches) and various reads happen here */
 }
 
-/* Make all fuse registers visible */
+/* Disable access to the private key and set the TZ sticky bit. */
-void fuse_make_regs_visible(void)
+void fuse_disable_private_key(void) {
-{
+    FUSE_REGS->FUSE_PRIVATEKEYDISABLE = 0x10;
-    CLK_RST_CONTROLLER_MISC_CLK_ENB_0 |= BIT(28);
-}
-
-/* Enable power to the fuse hardware array */
-void fuse_enable_power(void)
-{
-    FUSE_REGS->FUSE_PWR_GOOD_SW = 1;
-    wait(1);
-}
-
-/* Disable power to the fuse hardware array */
-void fuse_disable_power(void)
-{
-    FUSE_REGS->FUSE_PWR_GOOD_SW = 0;
-    wait(1);
-}
-
-/* Wait for the fuse driver to go idle */
-void fuse_wait_idle(void)
-{
-    uint32_t ctrl_val = 0;
-
-    /* Wait for STATE_IDLE */
-    while ((ctrl_val & (0xF0000)) != 0x40000)
-    {
-        wait(1);
-        ctrl_val = FUSE_REGS->FUSE_CTRL;
-    }
-}
-
-/* Read a fuse from the hardware array */
-uint32_t fuse_hw_read(uint32_t addr)
-{
-    fuse_wait_idle();
-
-    /* Program the target address */
-    FUSE_REGS->FUSE_REG_ADDR = addr;
-
-    /* Enable read operation in control register */
-    uint32_t ctrl_val = FUSE_REGS->FUSE_CTRL;
-    ctrl_val &= ~0x3;
-    ctrl_val |= 0x1;    /* Set FUSE_READ command */
-    FUSE_REGS->FUSE_CTRL = ctrl_val;
-
-    fuse_wait_idle();
-
-    return FUSE_REGS->FUSE_REG_READ;
-}
-
-/* Write a fuse in the hardware array */
-void fuse_hw_write(uint32_t value, uint32_t addr)
-{
-    fuse_wait_idle();
-
-    /* Program the target address and value */
-    FUSE_REGS->FUSE_REG_ADDR = addr;
-    FUSE_REGS->FUSE_REG_WRITE = value;
-
-    /* Enable write operation in control register */
-    uint32_t ctrl_val = FUSE_REGS->FUSE_CTRL;
-    ctrl_val &= ~0x3;
-    ctrl_val |= 0x2;    /* Set FUSE_WRITE command */
-    FUSE_REGS->FUSE_CTRL = ctrl_val;
-
-    fuse_wait_idle();
-}
-
-/* Sense the fuse hardware array into the shadow cache */
-void fuse_hw_sense(void)
-{
-    fuse_wait_idle();
-
-    /* Enable sense operation in control register */
-    uint32_t ctrl_val = FUSE_REGS->FUSE_CTRL;
-    ctrl_val &= ~0x3;
-    ctrl_val |= 0x3;    /* Set FUSE_SENSE command */
-    FUSE_REGS->FUSE_CTRL = ctrl_val;
-
-    fuse_wait_idle();
 }
 
 /* Disables all fuse programming. */
 void fuse_disable_programming(void) {
-    FUSE_REGS->FUSE_DIS_PGM = 1;
+    FUSE_REGS->FUSE_DISABLEREGPROGRAM = 1;
 }
 
-/* Unknown exactly what this does, but it alters the contents read from the fuse cache. */
+/* Enable power to the fuse hardware array. */
-void fuse_secondary_private_key_disable(void) {
+void fuse_enable_power(void) {
-    FUSE_REGS->FUSE_PRIVATEKEYDISABLE = 0x10;
+    APBDEV_PMC_FUSE_CTRL &= ~(0x200);      /* Clear PMC_FUSE_CTRL_PS18_LATCH_CLEAR. */
+    mdelay(1);
+    APBDEV_PMC_FUSE_CTRL |= 0x100;         /* Set PMC_FUSE_CTRL_PS18_LATCH_SET. */
+    mdelay(1);
 }
 
+/* Disable power to the fuse hardware array. */
+void fuse_disable_power(void) {
+    APBDEV_PMC_FUSE_CTRL &= ~(0x100);      /* Clear PMC_FUSE_CTRL_PS18_LATCH_SET. */
+    mdelay(1);
+    APBDEV_PMC_FUSE_CTRL |= 0x200;         /* Set PMC_FUSE_CTRL_PS18_LATCH_CLEAR. */
+    mdelay(1);
+}
 
-/* Read the SKU info register from the shadow cache */
+/* Wait for the fuse driver to go idle. */
-uint32_t fuse_get_sku_info(void)
+void fuse_wait_idle(void) {
-{
+    uint32_t ctrl_val = 0;
+
+    /* Wait for STATE_IDLE */
+    while ((ctrl_val & (0xF0000)) != 0x40000)
+        ctrl_val = FUSE_REGS->FUSE_FUSECTRL;
+}
+
+/* Read a fuse from the hardware array. */
+uint32_t fuse_hw_read(uint32_t addr) {
+    /* Wait for idle state. */
+    fuse_wait_idle();
+
+    /* Program the target address. */
+    FUSE_REGS->FUSE_FUSEADDR = addr;
+
+    /* Enable read operation in control register. */
+    uint32_t ctrl_val = FUSE_REGS->FUSE_FUSECTRL;
+    ctrl_val &= ~0x3;
+    ctrl_val |= 0x1;    /* Set READ command. */
+    FUSE_REGS->FUSE_FUSECTRL = ctrl_val;
+
+    /* Wait for idle state. */
+    fuse_wait_idle();
+
+    return FUSE_REGS->FUSE_FUSERDATA;
+}
+
+/* Write a fuse in the hardware array. */
+void fuse_hw_write(uint32_t value, uint32_t addr) {
+    /* Wait for idle state. */
+    fuse_wait_idle();
+
+    /* Program the target address and value. */
+    FUSE_REGS->FUSE_FUSEADDR = addr;
+    FUSE_REGS->FUSE_FUSEWDATA = value;
+
+    /* Enable write operation in control register. */
+    uint32_t ctrl_val = FUSE_REGS->FUSE_FUSECTRL;
+    ctrl_val &= ~0x3;
+    ctrl_val |= 0x2;    /* Set WRITE command. */
+    FUSE_REGS->FUSE_FUSECTRL = ctrl_val;
+
+    /* Wait for idle state. */
+    fuse_wait_idle();
+}
+
+/* Sense the fuse hardware array into the shadow cache. */
+void fuse_hw_sense(void) {
+    /* Wait for idle state. */
+    fuse_wait_idle();
+
+    /* Enable sense operation in control register */
+    uint32_t ctrl_val = FUSE_REGS->FUSE_FUSECTRL;
+    ctrl_val &= ~0x3;
+    ctrl_val |= 0x3;    /* Set SENSE_CTRL command */
+    FUSE_REGS->FUSE_FUSECTRL = ctrl_val;
+
+    /* Wait for idle state. */
+    fuse_wait_idle();
+}
+
+/* Read the SKU info register from the shadow cache. */
+uint32_t fuse_get_sku_info(void) {
     return FUSE_CHIP_REGS->FUSE_SKU_INFO;
 }
 
-/* Read the bootrom patch version from a register in the shadow cache */
+/* Read the bootrom patch version from a register in the shadow cache. */
-uint32_t fuse_get_bootrom_patch_version(void)
+uint32_t fuse_get_bootrom_patch_version(void) {
-{
+    return FUSE_CHIP_REGS->FUSE_SOC_SPEEDO_1_CALIB;
-    return FUSE_CHIP_REGS->FUSE_SOC_SPEEDO_1;
 }
 
 /* Read a spare bit register from the shadow cache */
-uint32_t fuse_get_spare_bit(uint32_t idx)
+uint32_t fuse_get_spare_bit(uint32_t idx) {
-{
+    if (idx < 32) {
-    if (idx >= 32) {
+        return FUSE_CHIP_REGS->FUSE_SPARE_BIT[idx];
-        return 0;
-    }
-
-    return FUSE_CHIP_REGS->FUSE_SPARE_BIT[idx];
-}
-
-/* Read a reserved ODM register from the shadow cache */
-uint32_t fuse_get_reserved_odm(uint32_t idx)
-{
-    if (idx >= 8) {
-        return 0;
-    }
-
-    return FUSE_CHIP_REGS->FUSE_RESERVED_ODM[idx];
-}
-
-uint32_t fuse_get_5x_key_generation(void) {
-    if ((fuse_get_reserved_odm(4) & 0x800) && fuse_get_reserved_odm(0) == 0x8E61ECAE && fuse_get_reserved_odm(1) == 0xF2BA3BB2) {
-        return fuse_get_reserved_odm(2) & 0x1F;
     } else {
         return 0;
     }
 }
 
-/* Derive the Device ID using values in the shadow cache */
+/* Read a reserved ODM register from the shadow cache. */
+uint32_t fuse_get_reserved_odm(uint32_t idx) {
+    if (idx < 8) {
+        return FUSE_CHIP_REGS->FUSE_RESERVED_ODM[idx];
+    } else {
+        return 0;
+    }
+}
+
+/* Get the DRAM ID using values in the shadow cache. */
+uint32_t fuse_get_dram_id(void) {
+    return ((fuse_get_reserved_odm(4) >> 3) & 0x7);
+}
+
+/* Derive the Device ID using values in the shadow cache. */
 uint64_t fuse_get_device_id(void) {
     uint64_t device_id = 0;
-    uint64_t y_coord = FUSE_CHIP_REGS->FUSE_Y_COORDINATE & 0x1FF;
+    uint64_t y_coord = FUSE_CHIP_REGS->FUSE_OPT_Y_COORDINATE & 0x1FF;
-    uint64_t x_coord = FUSE_CHIP_REGS->FUSE_X_COORDINATE & 0x1FF;
+    uint64_t x_coord = FUSE_CHIP_REGS->FUSE_OPT_X_COORDINATE & 0x1FF;
-    uint64_t wafer_id = FUSE_CHIP_REGS->FUSE_WAFER_ID & 0x3F;
+    uint64_t wafer_id = FUSE_CHIP_REGS->FUSE_OPT_WAFER_ID & 0x3F;
-    uint32_t lot_code = FUSE_CHIP_REGS->FUSE_LOT_CODE_0;
+    uint32_t lot_code = FUSE_CHIP_REGS->FUSE_OPT_LOT_CODE_0;
-    uint64_t fab_code = FUSE_CHIP_REGS->FUSE_FAB_CODE & 0x3F;
+    uint64_t fab_code = FUSE_CHIP_REGS->FUSE_OPT_FAB_CODE & 0x3F;
+
     uint64_t derived_lot_code = 0;
     for (unsigned int i = 0; i < 5; i++) {
         derived_lot_code = (derived_lot_code * 0x24) + ((lot_code >> (24 - 6*i)) & 0x3F);
@@ -203,40 +186,41 @@ uint64_t fuse_get_device_id(void) {
     device_id |= wafer_id << 18;
     device_id |= derived_lot_code << 24;
     device_id |= fab_code << 50;
+
     return device_id;
 }
 
-/* Get the DRAM ID using values in the shadow cache */
+/* Derive the Hardware Type using values in the shadow cache. */
-uint32_t fuse_get_dram_id(void) {
+uint32_t fuse_get_hardware_type(uint32_t target_firmware) {
-    return (FUSE_CHIP_REGS->FUSE_RESERVED_ODM[4] >> 3) & 0x7;
+    uint32_t fuse_reserved_odm4 = fuse_get_reserved_odm(4);
-}
+    uint32_t hardware_type = (((fuse_reserved_odm4 >> 7) & 2) | ((fuse_reserved_odm4 >> 2) & 1));
 
-/* Derive the Hardware Type using values in the shadow cache */
+    /* Firmware from versions 1.0.0 to 3.0.2. */
-uint32_t fuse_get_hardware_type(void) {
+    if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_400) {
-    /* This function is very different between 4.x and < 4.x */
+        volatile tegra_fuse_chip_t *fuse_chip = fuse_chip_get_regs();
-    uint32_t hardware_type = ((FUSE_CHIP_REGS->FUSE_RESERVED_ODM[4] >> 7) & 2) | ((FUSE_CHIP_REGS->FUSE_RESERVED_ODM[4] >> 2) & 1);
-    
-    if (exosphere_get_target_firmware() >= ATMOSPHERE_TARGET_FIRMWARE_400) {
-        static const uint32_t types[] = {0,1,4,3};
-
-        hardware_type |= (FUSE_CHIP_REGS->FUSE_RESERVED_ODM[4] >> 14) & 0x3C;
-        hardware_type--;
-        return hardware_type > 3 ? 4 : types[hardware_type];
-    } else {
         if (hardware_type >= 1) {
-            return hardware_type > 2 ? 3 : hardware_type - 1; 
+            return (hardware_type > 2) ? 3 : hardware_type - 1;
-        } else if ((FUSE_CHIP_REGS->FUSE_SPARE_BIT[9] & 1) == 0) {
+        } else if ((fuse_chip->FUSE_SPARE_BIT[9] & 1) == 0) {
             return 0;
         } else {
             return 3;
         }
+    } else if (target_firmware < ATMOSPHERE_TARGET_FIRMWARE_700) {      /* Firmware versions from 4.0.0 to 6.2.0. */
+        static const uint32_t types[] = {0,1,4,3};
+        hardware_type |= ((fuse_reserved_odm4 >> 14) & 0x3C);
+        hardware_type--;
+        return (hardware_type > 3) ? 4 : types[hardware_type];
+    } else {    /* Firmware versions from 7.0.0 onwards. */
+        /* Always return 0 in retail. */
+        return 0;
     }
 }
 
-/* Derive the Retail Type using values in the shadow cache */
+/* Derive the Retail Type using values in the shadow cache. */
 uint32_t fuse_get_retail_type(void) {
-    /* Retail type = IS_RETAIL | UNIT_TYPE */
+    /* Retail Type = IS_RETAIL | UNIT_TYPE. */
-    uint32_t retail_type = ((FUSE_CHIP_REGS->FUSE_RESERVED_ODM[4] >> 7) & 4) | (FUSE_CHIP_REGS->FUSE_RESERVED_ODM[4] & 3);
+    uint32_t fuse_reserved_odm4 = fuse_get_reserved_odm(4);
+    uint32_t retail_type = (((fuse_reserved_odm4 >> 7) & 4) | (fuse_reserved_odm4 & 3));
     if (retail_type == 4) { /* Standard retail unit, IS_RETAIL | 0. */
         return 1;
     } else if (retail_type == 3) { /* Standard dev unit, 0 | DEV_UNIT. */
@@ -249,17 +233,17 @@ uint32_t fuse_get_retail_type(void) {
 void fuse_get_hardware_info(void *dst) {
     uint32_t hw_info[0x4];
 
-    uint32_t unk_hw_fuse = FUSE_CHIP_REGS->_0x120 & 0x3F;
+    uint32_t ops_reserved = FUSE_CHIP_REGS->FUSE_OPT_OPS_RESERVED & 0x3F;
-    uint32_t y_coord = FUSE_CHIP_REGS->FUSE_Y_COORDINATE & 0x1FF;
+    uint32_t y_coord = FUSE_CHIP_REGS->FUSE_OPT_Y_COORDINATE & 0x1FF;
-    uint32_t x_coord = FUSE_CHIP_REGS->FUSE_X_COORDINATE & 0x1FF;
+    uint32_t x_coord = FUSE_CHIP_REGS->FUSE_OPT_X_COORDINATE & 0x1FF;
-    uint32_t wafer_id = FUSE_CHIP_REGS->FUSE_WAFER_ID & 0x3F;
+    uint32_t wafer_id = FUSE_CHIP_REGS->FUSE_OPT_WAFER_ID & 0x3F;
-    uint32_t lot_code_0 = FUSE_CHIP_REGS->FUSE_LOT_CODE_0;
+    uint32_t lot_code_0 = FUSE_CHIP_REGS->FUSE_OPT_LOT_CODE_0;
-    uint32_t lot_code_1 = FUSE_CHIP_REGS->FUSE_LOT_CODE_1 & 0x0FFFFFFF;
+    uint32_t lot_code_1 = FUSE_CHIP_REGS->FUSE_OPT_LOT_CODE_1 & 0x0FFFFFFF;
-    uint32_t fab_code = FUSE_CHIP_REGS->FUSE_FAB_CODE & 0x3F;
+    uint32_t fab_code = FUSE_CHIP_REGS->FUSE_OPT_FAB_CODE & 0x3F;
-    uint32_t vendor_code = FUSE_CHIP_REGS->FUSE_VENDOR_CODE & 0xF;
+    uint32_t vendor_code = FUSE_CHIP_REGS->FUSE_OPT_VENDOR_CODE & 0xF;
 
-    /* Hardware Info = unk_hw_fuse || Y_COORD || X_COORD || WAFER_ID || LOT_CODE || FAB_CODE || VENDOR_ID */
+    /* Hardware Info = OPS_RESERVED || Y_COORD || X_COORD || WAFER_ID || LOT_CODE || FAB_CODE || VENDOR_ID */
-    hw_info[0] = (uint32_t)((lot_code_1 << 30) | (wafer_id << 24) | (x_coord << 15) | (y_coord << 6) | (unk_hw_fuse));
+    hw_info[0] = (uint32_t)((lot_code_1 << 30) | (wafer_id << 24) | (x_coord << 15) | (y_coord << 6) | (ops_reserved));
     hw_info[1] = (uint32_t)((lot_code_0 << 26) | (lot_code_1 >> 2));
     hw_info[2] = (uint32_t)((fab_code << 26) | (lot_code_0 >> 6));
     hw_info[3] = (uint32_t)(vendor_code);
@@ -267,15 +251,52 @@ void fuse_get_hardware_info(void *dst) {
     memcpy(dst, hw_info, 0x10);
 }
 
+/* Get the Key Generation value. */
+uint32_t fuse_get_5x_key_generation(void) {
+    if ((fuse_get_reserved_odm(4) & 0x800) && (fuse_get_reserved_odm(0) == 0x8E61ECAE) && (fuse_get_reserved_odm(1) == 0xF2BA3BB2)) {
+        return (fuse_get_reserved_odm(2) & 0x1F);
+    } else {
+        return 0;
+    }
+}
+
+/* Returns the fuse version expected for the firmware. */
+uint32_t fuse_get_expected_fuse_version(uint32_t target_firmware) {
+    static const uint8_t expected_versions[ATMOSPHERE_TARGET_FIRMWARE_COUNT+1] = {
+        [ATMOSPHERE_TARGET_FIRMWARE_100] = 1,
+        [ATMOSPHERE_TARGET_FIRMWARE_200] = 2,
+        [ATMOSPHERE_TARGET_FIRMWARE_300] = 3,
+     /* [ATMOSPHERE_TARGET_FIRMWARE_302] = 4, */
+        [ATMOSPHERE_TARGET_FIRMWARE_400] = 5,
+        [ATMOSPHERE_TARGET_FIRMWARE_500] = 6,
+        [ATMOSPHERE_TARGET_FIRMWARE_600] = 7,
+        [ATMOSPHERE_TARGET_FIRMWARE_620] = 8,
+        [ATMOSPHERE_TARGET_FIRMWARE_700] = 9,
+        [ATMOSPHERE_TARGET_FIRMWARE_800] = 9,
+        [ATMOSPHERE_TARGET_FIRMWARE_810] = 10,
+        [ATMOSPHERE_TARGET_FIRMWARE_900] = 11,
+        [ATMOSPHERE_TARGET_FIRMWARE_910] = 12,
+    };
+
+    if (target_firmware > ATMOSPHERE_TARGET_FIRMWARE_COUNT) {
+        generic_panic();
+    }
+    if (fuse_get_retail_type() != 0)
+        return expected_versions[target_firmware];
+    else
+        return (target_firmware > ATMOSPHERE_TARGET_FIRMWARE_200) ? 1 : 0;
+}
+
+/* Check for RCM bug patches. */
 bool fuse_has_rcm_bug_patch(void) {
     /* Only check for RCM bug patch once, and cache our result. */
     if (!g_has_checked_for_rcm_bug_patch) {
-        /* Patched units have this bit set in reserved_sw, according to reports. */
+        /* Some patched units use XUSB in RCM. */
         if (FUSE_CHIP_REGS->FUSE_RESERVED_SW & 0x80) {
             g_has_rcm_bug_patch = true;
         }
 
-        /* Also check for an ipatch. */
+        /* Other units have a proper ipatch instead. */
         {
             uint32_t word_count = FUSE_CHIP_REGS->FUSE_FIRST_BOOTROM_PATCH_SIZE & 0x7f;
             uint32_t word_addr = 191;
@@ -301,4 +322,4 @@ bool fuse_has_rcm_bug_patch(void) {
     g_has_checked_for_rcm_bug_patch = true;
 
     return g_has_rcm_bug_patch;
-}
+}

exosphere/src/fuse.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -13,7 +13,7 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
- 
+
 #ifndef EXOSPHERE_FUSE_H
 #define EXOSPHERE_FUSE_H
 
@@ -24,154 +24,167 @@
 /* Exosphere driver for the Tegra X1 FUSE registers. */
 
 typedef struct {
-    uint32_t FUSE_CTRL;
+    uint32_t FUSE_FUSECTRL;
-    uint32_t FUSE_REG_ADDR;
+    uint32_t FUSE_FUSEADDR;
-    uint32_t FUSE_REG_READ;
+    uint32_t FUSE_FUSERDATA;
-    uint32_t FUSE_REG_WRITE;
+    uint32_t FUSE_FUSEWDATA;
-    uint32_t FUSE_TIME_RD1;
+    uint32_t FUSE_FUSETIME_RD1;
-    uint32_t FUSE_TIME_RD2;
+    uint32_t FUSE_FUSETIME_RD2;
-    uint32_t FUSE_TIME_PGM1;
+    uint32_t FUSE_FUSETIME_PGM1;
-    uint32_t FUSE_TIME_PGM2;
+    uint32_t FUSE_FUSETIME_PGM2;
-    uint32_t FUSE_PRIV2INTFC;
+    uint32_t FUSE_PRIV2INTFC_START;
     uint32_t FUSE_FUSEBYPASS;
     uint32_t FUSE_PRIVATEKEYDISABLE;
-    uint32_t FUSE_DIS_PGM;
+    uint32_t FUSE_DISABLEREGPROGRAM;
-    uint32_t FUSE_WRITE_ACCESS;
+    uint32_t FUSE_WRITE_ACCESS_SW;
     uint32_t FUSE_PWR_GOOD_SW;
-    uint32_t _0x38[0x32];
+    uint32_t _0x38;
-} fuse_registers_t;
+    uint32_t FUSE_PRIV2RESHIFT;
+    uint32_t _0x40[0x3];
+    uint32_t FUSE_FUSETIME_RD3;
+    uint32_t _0x50[0xC];
+    uint32_t FUSE_PRIVATE_KEY0_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY1_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY2_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY3_NONZERO;
+    uint32_t FUSE_PRIVATE_KEY4_NONZERO;
+    uint32_t _0x90[0x1C];
+} tegra_fuse_t;
 
 typedef struct {
     uint32_t FUSE_PRODUCTION_MODE;
-    uint32_t _0x4;
+    uint32_t FUSE_JTAG_SECUREID_VALID;
-    uint32_t _0x8;
+    uint32_t FUSE_ODM_LOCK;
-    uint32_t _0xC;
+    uint32_t FUSE_OPT_OPENGL_EN;
     uint32_t FUSE_SKU_INFO;
-    uint32_t FUSE_CPU_SPEEDO_0;
+    uint32_t FUSE_CPU_SPEEDO_0_CALIB;
-    uint32_t FUSE_CPU_IDDQ;
+    uint32_t FUSE_CPU_IDDQ_CALIB;
-    uint32_t _0x1C;
+    uint32_t FUSE_DAC_CRT_CALIB;
-    uint32_t _0x20;
+    uint32_t FUSE_DAC_HDTV_CALIB;
-    uint32_t _0x24;
+    uint32_t FUSE_DAC_SDTV_CALIB;
-    uint32_t FUSE_FT_REV;
+    uint32_t FUSE_OPT_FT_REV;
-    uint32_t FUSE_CPU_SPEEDO_1;
+    uint32_t FUSE_CPU_SPEEDO_1_CALIB;
-    uint32_t FUSE_CPU_SPEEDO_2;
+    uint32_t FUSE_CPU_SPEEDO_2_CALIB;
-    uint32_t FUSE_SOC_SPEEDO_0;
+    uint32_t FUSE_SOC_SPEEDO_0_CALIB;
-    uint32_t FUSE_SOC_SPEEDO_1;
+    uint32_t FUSE_SOC_SPEEDO_1_CALIB;
-    uint32_t FUSE_SOC_SPEEDO_2;
+    uint32_t FUSE_SOC_SPEEDO_2_CALIB;
-    uint32_t FUSE_SOC_IDDQ;
+    uint32_t FUSE_SOC_IDDQ_CALIB;
-    uint32_t _0x44;
+    uint32_t FUSE_RESERVED_PRODUCTION_WP;
     uint32_t FUSE_FA;
-    uint32_t _0x4C;
+    uint32_t FUSE_RESERVED_PRODUCTION;
-    uint32_t _0x50;
+    uint32_t FUSE_HDMI_LANE0_CALIB;
-    uint32_t _0x54;
+    uint32_t FUSE_HDMI_LANE1_CALIB;
-    uint32_t _0x58;
+    uint32_t FUSE_HDMI_LANE2_CALIB;
-    uint32_t _0x5C;
+    uint32_t FUSE_HDMI_LANE3_CALIB;
-    uint32_t _0x60;
+    uint32_t FUSE_ENCRYPTION_RATE;
     uint32_t FUSE_PUBLIC_KEY[0x8];
-    uint32_t FUSE_TSENSOR_1;
+    uint32_t FUSE_TSENSOR1_CALIB;
-    uint32_t FUSE_TSENSOR_2;
+    uint32_t FUSE_TSENSOR2_CALIB;
-    uint32_t _0x8C;
+    uint32_t FUSE_VSENSOR_CALIB;
-    uint32_t FUSE_CP_REV;
+    uint32_t FUSE_OPT_CP_REV;
-    uint32_t _0x94;
+    uint32_t FUSE_OPT_PFG;
-    uint32_t FUSE_TSENSOR_0;
+    uint32_t FUSE_TSENSOR0_CALIB;
     uint32_t FUSE_FIRST_BOOTROM_PATCH_SIZE;
     uint32_t FUSE_SECURITY_MODE;
-    uint32_t FUSE_PRIVATE_KEY[0x4];
+    uint32_t FUSE_PRIVATE_KEY[0x5];
-    uint32_t FUSE_DEVICE_KEY;
+    uint32_t FUSE_ARM_JTAG_DIS;
-    uint32_t _0xB8;
+    uint32_t FUSE_BOOT_DEVICE_INFO;
-    uint32_t _0xBC;
     uint32_t FUSE_RESERVED_SW;
-    uint32_t FUSE_VP8_ENABLE;
+    uint32_t FUSE_OPT_VP9_DISABLE;
     uint32_t FUSE_RESERVED_ODM[0x8];
-    uint32_t _0xE8;
+    uint32_t FUSE_OBS_DIS;
-    uint32_t _0xEC;
+    uint32_t FUSE_NOR_INFO;
-    uint32_t FUSE_SKU_USB_CALIB;
+    uint32_t FUSE_USB_CALIB;
     uint32_t FUSE_SKU_DIRECT_CONFIG;
-    uint32_t _0xF8;
+    uint32_t FUSE_KFUSE_PRIVKEY_CTRL;
-    uint32_t _0xFC;
+    uint32_t FUSE_PACKAGE_INFO;
-    uint32_t FUSE_VENDOR_CODE;
+    uint32_t FUSE_OPT_VENDOR_CODE;
-    uint32_t FUSE_FAB_CODE;
+    uint32_t FUSE_OPT_FAB_CODE;
-    uint32_t FUSE_LOT_CODE_0;
+    uint32_t FUSE_OPT_LOT_CODE_0;
-    uint32_t FUSE_LOT_CODE_1;
+    uint32_t FUSE_OPT_LOT_CODE_1;
-    uint32_t FUSE_WAFER_ID;
+    uint32_t FUSE_OPT_WAFER_ID;
-    uint32_t FUSE_X_COORDINATE;
+    uint32_t FUSE_OPT_X_COORDINATE;
-    uint32_t FUSE_Y_COORDINATE;
+    uint32_t FUSE_OPT_Y_COORDINATE;
-    uint32_t _0x11C;
+    uint32_t FUSE_OPT_SEC_DEBUG_EN;
-    uint32_t _0x120;
+    uint32_t FUSE_OPT_OPS_RESERVED;
     uint32_t FUSE_SATA_CALIB;
-    uint32_t FUSE_GPU_IDDQ;
+    uint32_t FUSE_GPU_IDDQ_CALIB;
-    uint32_t FUSE_TSENSOR_3;
+    uint32_t FUSE_TSENSOR3_CALIB;
-    uint32_t _0x130;
+    uint32_t FUSE_SKU_BOND_OUT_L;
-    uint32_t _0x134;
+    uint32_t FUSE_SKU_BOND_OUT_H;
-    uint32_t _0x138;
+    uint32_t FUSE_SKU_BOND_OUT_U;
-    uint32_t _0x13C;
+    uint32_t FUSE_SKU_BOND_OUT_V;
-    uint32_t _0x140;
+    uint32_t FUSE_SKU_BOND_OUT_W;
-    uint32_t _0x144;
+    uint32_t FUSE_OPT_SAMPLE_TYPE;
     uint32_t FUSE_OPT_SUBREVISION;
-    uint32_t _0x14C;
+    uint32_t FUSE_OPT_SW_RESERVED_0;
-    uint32_t _0x150;
+    uint32_t FUSE_OPT_SW_RESERVED_1;
-    uint32_t FUSE_TSENSOR_4;
+    uint32_t FUSE_TSENSOR4_CALIB;
-    uint32_t FUSE_TSENSOR_5;
+    uint32_t FUSE_TSENSOR5_CALIB;
-    uint32_t FUSE_TSENSOR_6;
+    uint32_t FUSE_TSENSOR6_CALIB;
-    uint32_t FUSE_TSENSOR_7;
+    uint32_t FUSE_TSENSOR7_CALIB;
-    uint32_t FUSE_OPT_PRIV_SEC_DIS;
+    uint32_t FUSE_OPT_PRIV_SEC_EN;
     uint32_t FUSE_PKC_DISABLE;
     uint32_t _0x16C;
     uint32_t _0x170;
     uint32_t _0x174;
     uint32_t _0x178;
-    uint32_t _0x17C;
+    uint32_t FUSE_FUSE2TSEC_DEBUG_DISABLE;
     uint32_t FUSE_TSENSOR_COMMON;
-    uint32_t _0x184;
+    uint32_t FUSE_OPT_CP_BIN;
-    uint32_t _0x188;
+    uint32_t FUSE_OPT_GPU_DISABLE;
-    uint32_t _0x18C;
+    uint32_t FUSE_OPT_FT_BIN;
-    uint32_t _0x190;
+    uint32_t FUSE_OPT_DONE_MAP;
     uint32_t _0x194;
-    uint32_t _0x198;
+    uint32_t FUSE_APB2JTAG_DISABLE;
-    uint32_t FUSE_DEBUG_AUTH_OVERRIDE;
+    uint32_t FUSE_ODM_INFO;
     uint32_t _0x1A0;
     uint32_t _0x1A4;
-    uint32_t _0x1A8;
+    uint32_t FUSE_ARM_CRYPT_DE_FEATURE;
     uint32_t _0x1AC;
     uint32_t _0x1B0;
     uint32_t _0x1B4;
     uint32_t _0x1B8;
     uint32_t _0x1BC;
-    uint32_t _0x1D0;
+    uint32_t FUSE_WOA_SKU_FLAG;
-    uint32_t FUSE_TSENSOR_8;
+    uint32_t FUSE_ECO_RESERVE_1;
+    uint32_t FUSE_GCPLEX_CONFIG_FUSE;
+    uint32_t FUSE_PRODUCTION_MONTH;
+    uint32_t FUSE_RAM_REPAIR_INDICATOR;
+    uint32_t FUSE_TSENSOR9_CALIB;
     uint32_t _0x1D8;
-    uint32_t _0x1DC;
+    uint32_t FUSE_VMIN_CALIBRATION;
-    uint32_t _0x1E0;
+    uint32_t FUSE_AGING_SENSOR_CALIBRATION;
-    uint32_t _0x1E4;
+    uint32_t FUSE_DEBUG_AUTHENTICATION;
-    uint32_t _0x1E8;
+    uint32_t FUSE_SECURE_PROVISION_INDEX;
-    uint32_t _0x1EC;
+    uint32_t FUSE_SECURE_PROVISION_INFO;
-    uint32_t _0x1F0;
+    uint32_t FUSE_OPT_GPU_DISABLE_CP1;
-    uint32_t _0x1F4;
+    uint32_t FUSE_SPARE_ENDIS;
-    uint32_t _0x1F8;
+    uint32_t FUSE_ECO_RESERVE_0;
     uint32_t _0x1FC;
     uint32_t _0x200;
-    uint32_t FUSE_RESERVED_CALIB;
+    uint32_t FUSE_RESERVED_CALIB0;
-    uint32_t _0x208;
+    uint32_t FUSE_RESERVED_CALIB1;
-    uint32_t _0x20C;
+    uint32_t FUSE_OPT_GPU_TPC0_DISABLE;
-    uint32_t _0x210;
+    uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP1;
-    uint32_t _0x214;
+    uint32_t FUSE_OPT_CPU_DISABLE;
-    uint32_t _0x218;
+    uint32_t FUSE_OPT_CPU_DISABLE_CP1;
-    uint32_t FUSE_TSENSOR_9;
+    uint32_t FUSE_TSENSOR10_CALIB;
-    uint32_t _0x220;
+    uint32_t FUSE_TSENSOR10_CALIB_AUX;
-    uint32_t _0x224;
+    uint32_t FUSE_OPT_RAM_SVOP_DP;
-    uint32_t _0x228;
+    uint32_t FUSE_OPT_RAM_SVOP_PDP;
-    uint32_t _0x22C;
+    uint32_t FUSE_OPT_RAM_SVOP_REG;
-    uint32_t _0x230;
+    uint32_t FUSE_OPT_RAM_SVOP_SP;
-    uint32_t _0x234;
+    uint32_t FUSE_OPT_RAM_SVOP_SMPDP;
-    uint32_t _0x238;
+    uint32_t FUSE_OPT_GPU_TPC0_DISABLE_CP2;
-    uint32_t _0x23C;
+    uint32_t FUSE_OPT_GPU_TPC1_DISABLE;
-    uint32_t _0x240;
+    uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP1;
-    uint32_t _0x244;
+    uint32_t FUSE_OPT_GPU_TPC1_DISABLE_CP2;
-    uint32_t _0x248;
+    uint32_t FUSE_OPT_CPU_DISABLE_CP2;
-    uint32_t _0x24C;
+    uint32_t FUSE_OPT_GPU_DISABLE_CP2;
     uint32_t FUSE_USB_CALIB_EXT;
-    uint32_t _0x254;
+    uint32_t FUSE_RESERVED_FIELD;
-    uint32_t _0x258;
+    uint32_t FUSE_OPT_ECC_EN;
     uint32_t _0x25C;
     uint32_t _0x260;
     uint32_t _0x264;
@@ -180,41 +193,42 @@ typedef struct {
     uint32_t _0x270;
     uint32_t _0x274;
     uint32_t _0x278;
-    uint32_t _0x27C;
+    uint32_t FUSE_SPARE_REALIGNMENT_REG;
     uint32_t FUSE_SPARE_BIT[0x20];
-} fuse_chip_registers_t;
+} tegra_fuse_chip_t;
 
-static inline volatile fuse_registers_t *get_fuse_regs(void) {
+static inline volatile tegra_fuse_t *fuse_get_regs(void) {
-    return (volatile fuse_registers_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_FUSE) + 0x800);
+    return (volatile tegra_fuse_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_FUSE) + 0x800);
 }
 
-static inline volatile fuse_chip_registers_t *get_fuse_chip_regs(void) {
+static inline volatile tegra_fuse_chip_t *fuse_chip_get_regs(void) {
-    return (volatile fuse_chip_registers_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_FUSE) + 0x900);
+    return (volatile tegra_fuse_chip_t *)(MMIO_GET_DEVICE_ADDRESS(MMIO_DEVID_FUSE) + 0x900);
 }
-#define FUSE_REGS       (get_fuse_regs())
+
-#define FUSE_CHIP_REGS  (get_fuse_chip_regs())
+#define FUSE_REGS       (fuse_get_regs())
+#define FUSE_CHIP_REGS  (fuse_chip_get_regs())
 
 void fuse_init(void);
-
-uint32_t fuse_hw_read(uint32_t addr);
-void fuse_hw_write(uint32_t value, uint32_t addr);
-void fuse_hw_sense(void);
 void fuse_disable_programming(void);
-void fuse_secondary_private_key_disable(void);
+void fuse_disable_private_key(void);
 
 uint32_t fuse_get_sku_info(void);
 uint32_t fuse_get_spare_bit(uint32_t idx);
 uint32_t fuse_get_reserved_odm(uint32_t idx);
-
-uint32_t fuse_get_5x_key_generation(void);
-
 uint32_t fuse_get_bootrom_patch_version(void);
 uint64_t fuse_get_device_id(void);
 uint32_t fuse_get_dram_id(void);
-uint32_t fuse_get_hardware_type(void);
+uint32_t fuse_get_hardware_type(uint32_t target_firmware);
 uint32_t fuse_get_retail_type(void);
 void fuse_get_hardware_info(void *dst);
-
+uint32_t fuse_get_5x_key_generation(void);
 bool fuse_has_rcm_bug_patch(void);
 
+uint32_t fuse_hw_read(uint32_t addr);
+void fuse_hw_write(uint32_t value, uint32_t addr);
+void fuse_hw_sense(void);
+
+
+uint32_t fuse_get_expected_fuse_version(uint32_t target_firmware);
+
 #endif

exosphere/src/gcm.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/gcm.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/i2c.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/i2c.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/interrupt.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/interrupt.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/masterkey.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -42,9 +42,9 @@ static const uint8_t mkey_vectors_dev[MASTERKEY_REVISION_MAX][0x10] =
     {0x78, 0xD5, 0xF1, 0x20, 0x3D, 0x16, 0xE9, 0x30, 0x32, 0x27, 0x34, 0x6F, 0xCF, 0xE0, 0x27, 0xDC}, /* Master key 04 encrypted with Master key 05. */
     {0x6F, 0xD2, 0x84, 0x1D, 0x05, 0xEC, 0x40, 0x94, 0x5F, 0x18, 0xB3, 0x81, 0x09, 0x98, 0x8D, 0x4E}, /* Master key 05 encrypted with Master key 06. */
     {0x37, 0xAF, 0xAB, 0x35, 0x79, 0x09, 0xD9, 0x48, 0x29, 0xD2, 0xDB, 0xA5, 0xA5, 0xF5, 0x30, 0x19}, /* Master key 06 encrypted with Master key 07. */
-    {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* TODO: Master key 07 encrypted with Master key 08. */
+    {0xEC, 0xE1, 0x46, 0x89, 0x37, 0xFD, 0xD2, 0x15, 0x8C, 0x3F, 0x24, 0x82, 0xEF, 0x49, 0x68, 0x04}, /* Master key 07 encrypted with Master key 08. */
-    {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* TODO: Master key 08 encrypted with Master key 09. */
+    {0x43, 0x3D, 0xC5, 0x3B, 0xEF, 0x91, 0x02, 0x21, 0x61, 0x54, 0x63, 0x8A, 0x35, 0xE7, 0xCA, 0xEE}, /* Master key 08 encrypted with Master key 09. */
-    {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* TODO: Master key 09 encrypted with Master key 0A. */
+    {0x6C, 0x2E, 0xCD, 0xB3, 0x34, 0x61, 0x77, 0xF5, 0xF9, 0xB1, 0xDD, 0x61, 0x98, 0x19, 0x3E, 0xD4}, /* Master key 09 encrypted with Master key 0A. */
 };
 
 /* Retail unit keys. */
@@ -76,7 +76,7 @@ bool check_mkey_revision(unsigned int revision, bool is_retail) {
         }
     }
 
-    se_aes_ecb_decrypt_block(check_keyslot, final_vector, 0x10, mkey_vectors[0], 0x10);
+    se_aes_ecb_decrypt_block(check_keyslot, final_vector, 0x10, is_retail ? mkey_vectors[0] : mkey_vectors_dev[0], 0x10);
     for (unsigned int i = 0; i < 0x10; i++) {
         if (final_vector[i] != 0) {
             return false;

exosphere/src/masterkey.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/mc.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/mc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/memory_map.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/misc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/mmu.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/package2.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -106,15 +106,15 @@ static void setup_se(void) {
 
     /* Perform some sanity initialization. */
     volatile tegra_se_t *se = se_get_regs();
-    se->_0x0 &= 0xFFFEFFFF; /* Clear bit 16. */
+    se->SE_SE_SECURITY &= 0xFFFEFFFF; /* Clear bit 16. */
-    (void)(se->FLAGS_REG);
+    (void)(se->SE_STATUS);
     __dsb_sy();
 
     /* NOTE: On 8.1.0+, Nintendo does not make keyslots 0-5 unreadable. */
-    se->_0x4 = 0;
+    se->SE_TZRAM_SECURITY = 0;
-    se->AES_KEY_READ_DISABLE_REG = 0;
+    se->SE_CRYPTO_SECURITY_PERKEY = 0;
-    se->RSA_KEY_READ_DISABLE_REG = 0;
+    se->SE_RSA_SECURITY_PERKEY = 0;
-    se->_0x0 &= 0xFFFFFFFB;
+    se->SE_SE_SECURITY &= 0xFFFFFFFB;
 
     /* Currently unknown what each flag does. */
     for (unsigned int i = 0; i < KEYSLOT_AES_MAX; i++) {

exosphere/src/package2.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/panic_color.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/pinmux.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,

exosphere/src/pmc.h

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -29,32 +29,24 @@ static inline uintptr_t get_pmc_base(void) {
 #define PMC_BASE (get_pmc_base())
 
 #define APBDEV_PMC_DPD_ENABLE_0 MAKE_REG32(PMC_BASE + 0x24)
-
 #define APBDEV_PMC_PWRGATE_TOGGLE_0 MAKE_REG32(PMC_BASE + 0x30)
 #define APBDEV_PMC_PWRGATE_STATUS_0 MAKE_REG32(PMC_BASE + 0x38)
-
 #define APBDEV_PMC_SCRATCH0_0 MAKE_REG32(PMC_BASE + 0x50)
-
 #define APBDEV_PMC_CRYPTO_OP_0 MAKE_REG32(PMC_BASE + 0xF4)
-
 #define APBDEV_PM_0 MAKE_REG32(PMC_BASE + 0x14)
 #define APBDEV_PMC_WAKE2_STATUS_0 MAKE_REG32(PMC_BASE + 0x168)
 #define APBDEV_PMC_CNTRL2_0 MAKE_REG32(PMC_BASE + 0x440)
-
+#define APBDEV_PMC_FUSE_CTRL MAKE_REG32(PMC_BASE + 0x450)
 #define APBDEV_PMC_SCRATCH43_0 MAKE_REG32(PMC_BASE + 0x22C)
 #define APBDEV_PMC_SEC_DISABLE8_0 MAKE_REG32(PMC_BASE + 0x5C0)
 #define APBDEV_PMC_SECURE_SCRATCH112_0 MAKE_REG32(PMC_BASE + 0xB18)
 #define APBDEV_PMC_SECURE_SCRATCH113_0 MAKE_REG32(PMC_BASE + 0xB1C)
 #define APBDEV_PMC_SECURE_SCRATCH114_0 MAKE_REG32(PMC_BASE + 0xB20)
 #define APBDEV_PMC_SECURE_SCRATCH115_0 MAKE_REG32(PMC_BASE + 0xB24)
-
 #define APBDEV_PMC_SCRATCH200_0 MAKE_REG32(PMC_BASE + 0x840)
-
-
 #define APBDEV_PMC_SEC_DISABLE3_0 MAKE_REG32(PMC_BASE + 0x2D8)
 #define APBDEV_PMC_SECURE_SCRATCH34_0 MAKE_REG32(PMC_BASE + 0x368)
 #define APBDEV_PMC_SECURE_SCRATCH35_0 MAKE_REG32(PMC_BASE + 0x36C)
-
 #define APBDEV_PMC_SECURE_SCRATCH16_0 MAKE_REG32(PMC_BASE + 0x320)
 #define APBDEV_PMC_SECURE_SCRATCH51_0 MAKE_REG32(PMC_BASE + 0x3AC)
 #define APBDEV_PMC_SECURE_SCRATCH55_0 MAKE_REG32(PMC_BASE + 0x3BC)
@@ -70,5 +62,4 @@ static inline uintptr_t get_pmc_base(void) {
 #define APBDEV_PMC_SECURE_SCRATCH103_0 MAKE_REG32(PMC_BASE + 0xAF4)
 #define APBDEV_PMC_SECURE_SCRATCH39_0 MAKE_REG32(PMC_BASE + 0x37C)
 
-
 #endif

exosphere/src/randomcache.c

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2018-2019 Atmosphère-NX
+ * Copyright (c) 2018-2020 Atmosphère-NX
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,