ams: bump version to 0.19.4

subrepo:
  subdir:   "emummc"
  merged:   "219c723c"
upstream:
  origin:   "https://github.com/m4xw/emuMMC"
  branch:   "develop"
  commit:   "219c723c"
git-subrepo:
  version:  "0.4.1"
  origin:   "???"
  commit:   "???"

.github/ISSUE_TEMPLATE/bug_report.md

@@ -49,6 +49,8 @@ X.X.X</br>
      - [ Ex: Kosmos' distribution of Atmosphère ]
 - Do you have additional kips or sysmodules you're loading:
 - Homebrew software installed: [ * ]
+- EmuMMC or SysNAND:
+  - [ If using an EmuMMC, include whether it's partition-based or file-based. ]
 
 ### Additional context?
 

.gitignore

@@ -31,12 +31,16 @@
 
 # Executables
 *.exe
+*.lz4
 *.out
 *.app
 *.i*86
 *.x86_64
 *.hex
 
+# Deko3d shaders
+*.dksh
+
 # Switch Executables
 *.nso
 *.nro
@@ -87,3 +91,9 @@ sept/sept-secondary/KEYS.py
 
 **/out
 **/build
+**/build_nintendo_nx_arm64
+**/build_nintendo_nx_arm
+**/build_nintendo_nx_x64
+**/build_nintendo_nx_x86
+
+stratosphere/test/

Makefile

@@ -1,3 +1,9 @@
+ifeq ($(strip $(DEVKITPRO)),)
+$(error "Please set DEVKITPRO in your environment. export DEVKITPRO=<path to>devkitPro)
+endif
+
+include $(DEVKITPRO)/devkitA64/base_tools
+
 TOPTARGETS := all clean dist-no-debug dist
 AMSBRANCH := $(shell git symbolic-ref --short HEAD)
 AMSHASH := $(shell git rev-parse --short HEAD)
@@ -56,49 +62,58 @@ dist-no-debug: all
 	mkdir atmosphere-$(AMSVER)/atmosphere
 	mkdir atmosphere-$(AMSVER)/sept
 	mkdir atmosphere-$(AMSVER)/switch
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000008
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/010000000000000D
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/010000000000002B
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000032
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000034
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000036
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000037
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/010000000000003C
 	mkdir -p atmosphere-$(AMSVER)/atmosphere/fatal_errors
 	mkdir -p atmosphere-$(AMSVER)/atmosphere/config_templates
 	mkdir -p atmosphere-$(AMSVER)/atmosphere/config
+	mkdir -p atmosphere-$(AMSVER)/atmosphere/flags
+	touch atmosphere-$(AMSVER)/atmosphere/flags/clean_stratosphere_for_0.19.0.flag
 	cp fusee/fusee-primary/fusee-primary.bin atmosphere-$(AMSVER)/atmosphere/reboot_payload.bin
 	cp fusee/fusee-mtc/fusee-mtc.bin atmosphere-$(AMSVER)/atmosphere/fusee-mtc.bin
-	cp fusee/fusee-secondary/fusee-secondary.bin atmosphere-$(AMSVER)/atmosphere/fusee-secondary.bin
+	cp fusee/fusee-secondary/fusee-secondary-experimental.bin atmosphere-$(AMSVER)/atmosphere/fusee-secondary.bin
-	cp fusee/fusee-secondary/fusee-secondary.bin atmosphere-$(AMSVER)/sept/payload.bin
+	cp fusee/fusee-secondary/fusee-secondary-experimental.bin atmosphere-$(AMSVER)/sept/payload.bin
 	cp sept/sept-primary/sept-primary.bin atmosphere-$(AMSVER)/sept/sept-primary.bin
 	cp sept/sept-secondary/sept-secondary.bin atmosphere-$(AMSVER)/sept/sept-secondary.bin
 	cp sept/sept-secondary/sept-secondary_00.enc atmosphere-$(AMSVER)/sept/sept-secondary_00.enc
 	cp sept/sept-secondary/sept-secondary_01.enc atmosphere-$(AMSVER)/sept/sept-secondary_01.enc
 	cp sept/sept-secondary/sept-secondary_dev_00.enc atmosphere-$(AMSVER)/sept/sept-secondary_dev_00.enc
 	cp sept/sept-secondary/sept-secondary_dev_01.enc atmosphere-$(AMSVER)/sept/sept-secondary_dev_01.enc
-	cp config_templates/BCT.ini atmosphere-$(AMSVER)/atmosphere/config/BCT.ini
+	cp config_templates/BCT.ini atmosphere-$(AMSVER)/atmosphere/config_templates/BCT.ini
 	cp config_templates/override_config.ini atmosphere-$(AMSVER)/atmosphere/config_templates/override_config.ini
 	cp config_templates/system_settings.ini atmosphere-$(AMSVER)/atmosphere/config_templates/system_settings.ini
+	cp config_templates/exosphere.ini atmosphere-$(AMSVER)/atmosphere/config_templates/exosphere.ini
 	cp -r config_templates/kip_patches atmosphere-$(AMSVER)/atmosphere/kip_patches
 	cp -r config_templates/hbl_html atmosphere-$(AMSVER)/atmosphere/hbl_html
-	cp stratosphere/boot2/boot2.nsp atmosphere-$(AMSVER)/atmosphere/contents/0100000000000008/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000008
-	cp stratosphere/dmnt/dmnt.nsp atmosphere-$(AMSVER)/atmosphere/contents/010000000000000D/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000008
-	cp stratosphere/erpt/erpt.nsp atmosphere-$(AMSVER)/atmosphere/contents/010000000000002B/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/010000000000000D
-	cp stratosphere/eclct.stub/eclct.stub.nsp atmosphere-$(AMSVER)/atmosphere/contents/0100000000000032/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/010000000000002B
-	cp stratosphere/fatal/fatal.nsp atmosphere-$(AMSVER)/atmosphere/contents/0100000000000034/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000032
-	cp stratosphere/creport/creport.nsp atmosphere-$(AMSVER)/atmosphere/contents/0100000000000036/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000034
-	cp stratosphere/ro/ro.nsp atmosphere-$(AMSVER)/atmosphere/contents/0100000000000037/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000036
-	cp stratosphere/jpegdec/jpegdec.nsp atmosphere-$(AMSVER)/atmosphere/contents/010000000000003C/exefs.nsp
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000037
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000032/flags
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/010000000000003C
-	touch atmosphere-$(AMSVER)/atmosphere/contents/0100000000000032/flags/boot2.flag
+	mkdir -p atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000042
-	mkdir -p atmosphere-$(AMSVER)/atmosphere/contents/0100000000000037/flags
+	cp stratosphere/boot2/boot2.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000008/exefs.nsp
-	touch atmosphere-$(AMSVER)/atmosphere/contents/0100000000000037/flags/boot2.flag
+	cp stratosphere/dmnt/dmnt.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/010000000000000D/exefs.nsp
+	cp stratosphere/erpt/erpt.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/010000000000002B/exefs.nsp
+	cp stratosphere/eclct.stub/eclct.stub.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000032/exefs.nsp
+	cp stratosphere/fatal/fatal.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000034/exefs.nsp
+	cp stratosphere/creport/creport.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000036/exefs.nsp
+	cp stratosphere/ro/ro.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000037/exefs.nsp
+	cp stratosphere/jpegdec/jpegdec.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/010000000000003C/exefs.nsp
+	cp stratosphere/pgl/pgl.nsp atmosphere-$(AMSVER)/stratosphere_romfs/atmosphere/contents/0100000000000042/exefs.nsp
+	@build_romfs atmosphere-$(AMSVER)/stratosphere_romfs atmosphere-$(AMSVER)/atmosphere/stratosphere.romfs
+	rm -r atmosphere-$(AMSVER)/stratosphere_romfs
 	cp troposphere/reboot_to_payload/reboot_to_payload.nro atmosphere-$(AMSVER)/switch/reboot_to_payload.nro
+	cp troposphere/daybreak/daybreak.nro atmosphere-$(AMSVER)/switch/daybreak.nro
 	cd atmosphere-$(AMSVER); zip -r ../atmosphere-$(AMSVER).zip ./*; cd ../;
+	cp fusee/fusee-secondary/fusee-secondary.bin atmosphere-$(AMSVER)/atmosphere/fusee-secondary.bin
+	cp fusee/fusee-secondary/fusee-secondary.bin atmosphere-$(AMSVER)/sept/payload.bin
+	cd atmosphere-$(AMSVER); zip -r ../atmosphere-$(AMSVER)-WITHOUT_MESOSPHERE.zip ./*; cd ../;
 	rm -r atmosphere-$(AMSVER)
 	mkdir out
 	mv atmosphere-$(AMSVER).zip out/atmosphere-$(AMSVER).zip
+	mv atmosphere-$(AMSVER)-WITHOUT_MESOSPHERE.zip out/atmosphere-$(AMSVER)-WITHOUT_MESOSPHERE.zip
 	cp fusee/fusee-primary/fusee-primary.bin out/fusee-primary.bin
 
 dist: dist-no-debug
@@ -116,29 +131,35 @@ dist: dist-no-debug
 	mkdir atmosphere-$(AMSVER)-debug
 	cp fusee/fusee-primary/fusee-primary.elf atmosphere-$(AMSVER)-debug/fusee-primary.elf
 	cp fusee/fusee-mtc/fusee-mtc.elf atmosphere-$(AMSVER)-debug/fusee-mtc.elf
-	cp fusee/fusee-secondary/fusee-secondary.elf atmosphere-$(AMSVER)-debug/fusee-secondary.elf
+	cp fusee/fusee-secondary/fusee-secondary-experimental.elf atmosphere-$(AMSVER)-debug/fusee-secondary.elf
 	cp sept/sept-primary/sept-primary.elf atmosphere-$(AMSVER)-debug/sept-primary.elf
 	cp sept/sept-secondary/sept-secondary.elf atmosphere-$(AMSVER)-debug/sept-secondary.elf
 	cp sept/sept-secondary/key_derivation/key_derivation.elf atmosphere-$(AMSVER)-debug/sept-secondary-key-derivation.elf
-	cp exosphere/exosphere.elf atmosphere-$(AMSVER)-debug/exosphere.elf
+	cp exosphere/loader_stub/loader_stub.elf atmosphere-$(AMSVER)-debug/exosphere-loader-stub.elf
-	cp exosphere/lp0fw/lp0fw.elf atmosphere-$(AMSVER)-debug/lp0fw.elf
+	cp exosphere/program/program.elf atmosphere-$(AMSVER)-debug/exosphere-program.elf
-	cp exosphere/sc7fw/sc7fw.elf atmosphere-$(AMSVER)-debug/sc7fw.elf
+	cp exosphere/warmboot/warmboot.elf atmosphere-$(AMSVER)-debug/exosphere-warmboot.elf
-	cp exosphere/rebootstub/rebootstub.elf atmosphere-$(AMSVER)-debug/rebootstub.elf
+	cp exosphere/mariko_fatal/mariko_fatal.elf atmosphere-$(AMSVER)-debug/exosphere-mariko-fatal.elf
+	cp exosphere/program/sc7fw/sc7fw.elf atmosphere-$(AMSVER)-debug/exosphere-sc7fw.elf
+	cp exosphere/program/rebootstub/rebootstub.elf atmosphere-$(AMSVER)-debug/exosphere-rebootstub.elf
 	cp mesosphere/kernel_ldr/kernel_ldr.elf atmosphere-$(AMSVER)-debug/kernel_ldr.elf
+	cp mesosphere/kernel/kernel.elf atmosphere-$(AMSVER)-debug/kernel.elf
 	cp stratosphere/ams_mitm/ams_mitm.elf atmosphere-$(AMSVER)-debug/ams_mitm.elf
 	cp stratosphere/boot/boot.elf atmosphere-$(AMSVER)-debug/boot.elf
 	cp stratosphere/boot2/boot2.elf atmosphere-$(AMSVER)-debug/boot2.elf
 	cp stratosphere/creport/creport.elf atmosphere-$(AMSVER)-debug/creport.elf
 	cp stratosphere/dmnt/dmnt.elf atmosphere-$(AMSVER)-debug/dmnt.elf
 	cp stratosphere/eclct.stub/eclct.stub.elf atmosphere-$(AMSVER)-debug/eclct.stub.elf
+	cp stratosphere/erpt/erpt.elf atmosphere-$(AMSVER)-debug/erpt.elf
 	cp stratosphere/fatal/fatal.elf atmosphere-$(AMSVER)-debug/fatal.elf
+	cp stratosphere/jpegdec/jpegdec.elf atmosphere-$(AMSVER)-debug/jpegdec.elf
 	cp stratosphere/loader/loader.elf atmosphere-$(AMSVER)-debug/loader.elf
+	cp stratosphere/ncm/ncm.elf atmosphere-$(AMSVER)-debug/ncm.elf
+	cp stratosphere/pgl/pgl.elf atmosphere-$(AMSVER)-debug/pgl.elf
 	cp stratosphere/pm/pm.elf atmosphere-$(AMSVER)-debug/pm.elf
 	cp stratosphere/ro/ro.elf atmosphere-$(AMSVER)-debug/ro.elf
 	cp stratosphere/sm/sm.elf atmosphere-$(AMSVER)-debug/sm.elf
 	cp stratosphere/spl/spl.elf atmosphere-$(AMSVER)-debug/spl.elf
-	cp stratosphere/erpt/erpt.elf atmosphere-$(AMSVER)-debug/erpt.elf
+	cp troposphere/daybreak/daybreak.elf atmosphere-$(AMSVER)-debug/daybreak.elf
-	cp stratosphere/jpegdec/jpegdec.elf atmosphere-$(AMSVER)-debug/jpegdec.elf
 	cd atmosphere-$(AMSVER)-debug; zip -r ../atmosphere-$(AMSVER)-debug.zip ./*; cd ../;
 	rm -r atmosphere-$(AMSVER)-debug
 	mv atmosphere-$(AMSVER)-debug.zip out/atmosphere-$(AMSVER)-debug.zip

config_templates/BCT.ini

@@ -9,4 +9,4 @@ stage2_entrypoint = 0xF0000000
 ; To force-enable nogc, add nogc = 1
 ; To force-disable nogc, add nogc = 0
 
-; To opt in to using Atmosphere's NCM reimplementation, add enable_ncm = 1
+; To opt out of using Atmosphere's NCM reimplementation, add disable_ncm = 1

config_templates/exosphere.ini

@@ -35,6 +35,17 @@
 #    mmc space, encrypted to prevent detection. This backup can be used
 #    to prevent unrecoverable edits in emergencies.
 
+# Key: log_port, default: 0.
+#  Desc: Controls what uart port exosphere will set up for logging.
+#  NOTE: 0 = UART-A, 1 = UART-B, 2 = UART-C, 3 = UART-D
+
+# Key: log_baud_rate, default: 115200
+#  Desc: Controls the baud rate exosphere will set up for logging.
+#  NOTE: 0 is treated as equivalent to 115200.
+
+# Key: log_inverted, default: 0.
+#  Desc: Controls whether the logging uart port is inverted.
+
 [exosphere]
 debugmode=1
 debugmode_user=0
@@ -43,3 +54,6 @@ enable_user_pmu_access=0
 blank_prodinfo_sysmmc=0
 blank_prodinfo_emummc=0
 allow_writing_to_cal_sysmmc=0
+log_port=0
+log_baud_rate=115200
+log_inverted=0

config_templates/override_config.ini

@@ -1,9 +1,10 @@
 [hbl_config]
 ; Program Specific Config
 ; Up to 8 program-specific configurations can be set.
-; These use `program_id_#` and `override_key_#`
+; These use `program_id_#`, `override_address_space_#`, and `override_key_#`
 ; where # is in range [0,7].
 ; program_id_0=010000000000100D
+; override_address_space=39_bit
 ; override_key_0=!R
 
 ; Any Application Config
@@ -12,6 +13,7 @@
 ; by a program specific config.
 ; override_any_app=true
 ; override_any_app_key=R
+; override_any_app_address_space=39_bit
 ; path=atmosphere/hbl.nsp
 
 [default_config]

config_templates/system_settings.ini

@@ -1,10 +1,14 @@
-; Disable uploading error reports to Nintendo
 [eupld]
+; Disable uploading error reports to Nintendo
 ; upload_enabled = u8!0x0
+[usb]
+; Enable USB 3.0 superspeed for homebrew
+; 0 = USB 3.0 support is system default (usually disabled), 1 = USB 3.0 support is enabled.
+; usb30_force_enabled = u8!0x0
+[ro]
 ; Control whether RO should ease its validation of NROs.
 ; (note: this is normally not necessary, and ips patches can be used.)
-[ro]
+; ease_nro_restriction = u8!0x1
-; ease_nro_restriction = u8!0x0
 ; Atmosphere custom settings
 [atmosphere]
 ; Reboot from fatal automatically after some number of milliseconds.
@@ -32,12 +36,23 @@
 ; NOTE: EXPERIMENTAL
 ; If you do not know what you are doing, do not touch this yet.
 ; fsmitm_redirect_saves_to_sd = u8!0x0
-; Controls whether to enable the deprecated hid mitm
+; Controls whether am sees system settings "DebugModeFlag" as
-; to fix compatibility with old homebrew.
+; enabled or disabled.
-; 0 = Do not enable, 1 = Enable.
+; 0 = Disabled (not debug mode), 1 = Enabled (debug mode)
-; Please note this setting may be removed in a
+; enable_am_debug_mode = u8!0x0
-; future release of Atmosphere.
+; Controls whether dns.mitm is enabled
-; enable_deprecated_hid_mitm = u8!0x0
+; 0 = Disabled, 1 = Enabled
+; enable_dns_mitm = u8!0x1
+; Controls whether dns.mitm uses the default redirections in addition to
+; whatever is specified in the user's hosts file.
+; 0 = Disabled (use hosts file contents), 1 = Enabled (use defaults and hosts file contents)
+; add_defaults_to_dns_hosts = u8!0x1
+; Controls whether dns.mitm logs to the sd card for debugging
+; 0 = Disabled, 1 = Enabled
+; enable_dns_mitm_debug_log = u8!0x0
+; Controls whether htc is enabled
+; 0 = Disabled, 1 = Enabled
+; enable_htc = u8!0x0
 [hbloader]
 ; Controls the size of the homebrew heap when running as applet.
 ; If set to zero, all available applet memory is used as heap.

docs/building.md

@@ -4,7 +4,8 @@ Building Atmosphère is a very straightforward process that relies almost exclus
 ## Dependencies
 + [devkitA64](https://devkitpro.org)
 + [devkitARM](https://devkitpro.org)
-+ [Python 2 or 3](https://www.python.org) (optional)
++ [Python 2](https://www.python.org) (Python 3 may work as well, but this is not guaranteed)
++ [LZ4](https://pypi.org/project/lz4)
 + [PyCryptodome](https://pypi.org/project/pycryptodome) (optional)
 
 ## Instructions
@@ -12,16 +13,20 @@ Building Atmosphère is a very straightforward process that relies almost exclus
 
 2. Install the following packages via (dkp-)pacman:
     + `switch-dev`
+    + `switch-glm`
     + `switch-libjpeg-turbo`
     + `devkitARM`
     + `devkitarm-rules`
 
-3. (Optional) In order to build [sept](components/sept.md) the pycryptodome PyPi package is required, which can be installed by running `pip install pycryptodome` under the installed Python environment of your choice or by installing the complete zip package to support the `make dist` recipe. This is an optional step included for advanced users who have the ability to provide the necessary encryption/signing keys themselves.
+3. Install the following library via python's package manager `pip`, required by [exosphere](components/exosphere.md):
+    + `lz4`
 
-4. It is, instead, possible to build [sept](components/sept.md) by providing previously encrypted/signed binaries distributed by official Atmosphère release packages. In order to do so, export the following variables in your current environment:
+4. (Optional) In order to build [sept](components/sept.md) the pycryptodome PyPi package is required, which can be installed by running `pip install pycryptodome` under the installed Python environment of your choice or by installing the complete zip package to support the `make dist` recipe. This is an optional step included for advanced users who have the ability to provide the necessary encryption/signing keys themselves.
+
+5. It is, instead, possible to build [sept](components/sept.md) by providing previously encrypted/signed binaries distributed by official Atmosphère release packages. In order to do so, export the following variables in your current environment:
     + `SEPT_00_ENC_PATH` (must point to the `sept-secondary_00.enc` file)
     + `SEPT_01_ENC_PATH` (must point to the `sept-secondary_01.enc` file)
     + `SEPT_DEV_00_ENC_PATH` (must point to the `sept-secondary_dev_00.enc` file)
     + `SEPT_DEV_01_ENC_PATH` (must point to the `sept-secondary_dev_01.enc` file)
 
-5. Finally, clone the Atmosphère repository and run `make` under its root directory.
+6. Finally, clone the Atmosphère repository and run `make` under its root directory.

docs/changelog.md

@@ -1,4 +1,290 @@
 # Changelog
+## 0.19.4
++ Support was added for 12.0.3.
++ A number of minor issues were fixed, including:
+  + An issue was fixed that could cause heap memory corruption when allocation was highly contended.
+  + An issue was fixed that could cause sleep to fail under certain conditions.
+  + An issue was fixed that could cause a scheduler slow path to be taken more often than necessary.
++ General system stability improvements to enhance the user's experience.
+## 0.19.3
++ Support was added for 12.0.2.
++ A number of minor issues were fixed, including:
+  + An issue was fixed in dns.mitm that caused a crash when games attempted to resolve the IP address of nullptr.
+  + An issue was fixed in erpt that would cause an abort when booting without having ever booted stock previously.
+  + An issue was fixed in (file-based) emummc that caused an error on system format/downloading certain games.
++ General system stability improvements to enhance the user's experience.
+## 0.19.2
++ Atmosphère's components were further updated to reflect latest official behaviors as of 12.0.0.
+  + Notably, `erpt` was updated to implement the new forced shutdown detection feature.
+    + When a forced-shutdown occurs, an erpt_report will be generated and saved to the SD card on the next boot.
++ Atmosphere-libs was updated to use GCC 11 (latest devkitA64/devkitARM releases).
+  + Initial inspections show mild-to-moderate optimizer improvements in several important places (kernel is 0x3000 smaller).
+  + General system stability improvements to enhance the user's experience.
++ A number of minor issues were fixed, including:
+  + A bug was fixed that caused a black screen when attempting to boot firmware versions 2.0.0-4.1.0.
+  + A bug was fixed that caused sm to abort when at the session limit, rather than returning error codes.
+  + A bug was fixed that allowed for resource exhaustion on 12.0.0, under certain circumstances.
++ Several issues were fixed, and usability and stability were improved.
+## 0.19.1
++ An issue was fixed that caused a fatal error when using official `migration` services to transfer data between consoles.
++ An issue was fixed in `ncm` that caused an error when the OS tried to enumerate installed SD card content.
++ Several issues were fixed, and usability and stability were improved.
+## 0.19.0
++ Support was added for 12.0.0.
+  + `mesosphère` was updated to reflect the latest official kernel behavior.
+  + `sm`, `boot2`, `pgl` were updated to reflect the latest official behaviors.
+    + **Please Note**: 12.0.0 added a new protocol for IPC ("tipc"), which has been freshly reimplemented in its entirety.
+      + It is possible there may be as of yet unfound issues; if there are, please send the appropriate crash reports to SciresM (SciresM#0524 on discord).
+      + Homebrew which uses atmosphere extensions (including the mitm API) will need to be re-compiled in order to function on 0.19.0.
+        + I apologize for this, but it's unavoidable for technical reasons. If you're affected by this and mad about it, please contact SciresM to complain.
+  + `erpt` was partially updated to reflect the latest official behaviors.
+    + New features were added to erpt to track the activity of running applets, and to detect when a forced shutdown occurs.
+    + These behaviors have been temporarily stubbed, as they are not necessary for 12.0.0 to run (and their outputs won't be saved anywhere).
+    + A future atmosphère update will implement these behaviors, in the interest of reflecting official logic as faithfully as we can.
++ Atmosphère no longer uses the /contents/ folder for its own programs.
+  + Atmosphère's system modules are now bundled together in the single file "stratosphere.romfs".
+    + For those working on developing for atmosphère, executables inside the /contents/ directory will be preferred to those in "stratosphere.romfs".
+  + **Please Note**: In order to facilitate this change (and the desired behavior), the first time you boot after extracting a release zip, atmosphère system modules inside /contents/ will be deleted.
+    + This will have no impact on user programs (it only removes programs with specific program ids).
++ Improvements were made to mesosphere, including:
+  + An extension InfoType was added for getting the current process handle, without having to spawn a thread and do IPC with oneself.
+  + An issue was fixed in SvcSetDebugThreadContext.
+  + An issue was fixed when doing IPC with user buffers.
++ Support was fixed for toggling the custom setting `usb!usb30_force_enabled` on 9.0.0+.
+  + This was broken by Nintendo's introducing a dependency that made USB a requirement to launch before custom settings are parsed.
+  + Since the fix, you can now toggle the setting (as you could prior to atmosphère 0.9.4), and it will work as expected.
+  + **Please Note**: Enabling USB 3.0 often severely impacts wireless communications.
+    + Because of this, the setting will default to off. If you experience issues with it enabled, consider disabling it.
++ A warning was added to daybreak when resetting the console to factory settings.
++ Substantial work was completed towards atmosphere's upcoming implementation of the host target connection protocol.
+  + Once completed, users will be able to interact with a Switch running atmosphère via a PC application ("Starlink") currently under development.
+    + Planned eventual features for connected consoles include a gdbstub, interacting with memory (for cheat development), streaming gameplay audio and video, and accessing the Switch's SD card filesystem.
+    + Switch homebrew will also have access to a (configurable and sandboxed) filesystem on the host PC, while connected.
+  + Towards this end, the following was accomplished:
+    + The "htc" system module was reimplemented completely.
+    + The system module which provides remote access to the SD card was reimplemented completely.
+  + This is currently the active focus of atmosphère's development.
+  + **Please Note**: Support is not yet completed, and users are disadvised from interacting with the related settings for the time being, unless they particularly know what they're doing.
++ A number of minor issues were fixed, including:
+  + A bug was fixed in `dmnt` that could cause a fatal when launching certain games with cheats active.
+  + An issue was fixed that could cause an abort in `sm` when using a large number of custom system modules.
+  + An issue was fixed that prevented launching gamecards on 1.0.0.
+  + Minor issues were fixed in the cheat virtual machine's behavior.
++ Several issues were fixed, and usability and stability were improved.
+## 0.18.1
++ A number of minor issues were fixed, including:
+  + The new `dns.mitm` module added in 0.18.0 no longer fatal errors when receiving port=nullptr.
+    + This fixes youtube ad-blocking, and possibly other usecases.
+  + A bug was fixed that caused ams.mitm to incorrectly cache data storages.
+    + This potentially broke DLC when using romfs mods, and could have caused other issues (e.g. with custom themes, and maybe other cases).
+  + A bug was fixed in power state control module registration.
+    + This might fix a weird edge case with system module dependencies on sleep/wake, but probably nobody should notice any differences.
+  + A bug was fixed where mesosphere sometimes treated virtual core IDs as though they were physical core IDs.
+    + This had zero impact, because for Switch virtual core == physical core, but it could have affected future platforms if it had remained unresolved.
++ Several issues were fixed, and usability and stability were improved.
+## 0.18.0
++ A new mitm module was added (`dns.mitm`).
+  + This provides a highly configurable mechanism for redirecting DNS resolution requests.
+  + By default atmosphère redirects resolution requests for official telemetry servers to a loopback address.
+  + Documentation on how to configure `dns.mitm` to meet your more specific needs may be found [here](https://github.com/Atmosphere-NX/Atmosphere/blob/master/docs/features/dns_mitm.md).
++ The service framework API (`sf`) was refactored to be more accurate to official logic and greatly reduce memory requirements.
+  + The comparison of atmosphère module memory usage versus Nintendo's found [here](https://github.com/Atmosphere-NX/Atmosphere/wiki/Memory-Comparisons) was updated to reflect this.
+  + **Please Note**: If you are a developer using the libstratosphere service APIs, some updating may be required. Contact SciresM#0524 on discord for assistance if required.
++ A number of deprecations were removed, following a general codebase cleanup:
+  + The `sm` extension to not unregister services on connection close was superseded by official opt-in logic in 11.0.0, and has been removed in favor of official logic.
+    + This should have zero impact on users.
+  + The temporary `hid-mitm` added in 0.9.0 has finally been removed, following over a year of deprecation.
+    + There shouldn't be any homebrew in use still affected by this, but the situation will be monitored.
+    + If this is somehow still a real issue, an unaffiliated hid mitm sysmodule providing the same functionality can be created and released, separate from atmosphère itself.
++ Several issues were fixed, and usability and stability were improved.
+## 0.17.1
++ A number of atmosphère's modules were using more memory than their Nintendo equivalent's in 0.17.0; a number of code generatio tweaks have been applied to fix this across the board.
+  + A detailed comparison of atmosphère module memory usage versus Nintendo's was made and can be found [here](https://github.com/Atmosphere-NX/Atmosphere/wiki/Memory-Comparisons).
++ Several minor bugs were fixed, including:
+  + A bug was fixed in mesosphère that caused games which attempt to map more memory than the Switch has to fail.
+    + This affected "Piczle Lines DX 500 More Puzzles!", and possibly other games.
+  + Enabling configuration to "blank" PRODINFO no longer causes a hang on Mariko devices (or any devices with newer format).
++ Several issues were fixed, and usability and stability were improved.
+## 0.17.0
++ fusee was heavily rewritten in order to add support for Mariko hardware.
+  + **Please Note**: Mariko hardware currently has no (and may not ever have any) software exploits; fusee works when loaded from bootloader context with the right keys in the security engine. No means of getting the system into this state is provided.
++ An issue was fixed in the way shutdown was performed on Erista hardware.
+  + This fixes an issue that caused OFW to black screen on boot after power off from atmosphere without first doing a reboot.
+  + This also substantially improves power drain when the system is shut off; consoles powered off from Atmosphere should now drain battery at the same reduced rate as original firmware.
++ A number of minor changes were made, including:
+  + A number of inconsistencies in the build system were fixed.
+    + For those building atmosphère at home, the `boot` sysmodule will no longer rebuild every time make is invoked.
+    + This substantially improves build times during development iteration.
+  + `sm` was updated to more accurately reflect how official code manages request deferral.
+  + `mesosphère` was updated to more accurately reflect official kernel management of the trace buffer.
+  + `mesosphère` was updated to improve kernel loader's logic by taking advantage of the assumption that we only boot our kernel, not Nintendo's.
++ As it has been a few months with zero reported issues, `mesosphère` is now opt-out.
+    + Users who wish to begin using or continue using mesosphere should use the standard/cool kids zip ("atmosphere-").
+    + Users who wish to opt-out of mesosphere should download and extract the opt-out zip ("atmosphere-WITHOUT_MESOSPHERE-").
++ Several issues were fixed, and usability and stability were improved.
+## 0.16.2
++ Atmosphère release zips no longer bundle BCT.ini, instead relying on defaults in code.
+  + This means atmosphere updates should no longer overwrite any user configuration at all.
+  + If you wish to modify BCT.ini config, copy the template from /config_templates/ as with other configuration.
++ `pgl` and `creport` were further updated to reflect differences in official behavior in 11.0.0.
++ An issue was fixed that caused creport to be launched multiple times on process crash.
+  + This fixes the "duplicate reports" issue that sometimes plagued people.
++ A new system setting (`atmosphere!enable_am_debug_mode`) configuring am to use debug mode.
+  + If you are not a developer or don't see a clear use for this, leave it configured to the default (off).
++ Reboot to payload NRO was updated to fix support with certain payloads.
++ Support was fixed for atmosphere's extension to support homebrew use of new (8.0.0+) kernel mappings.
+  + In particular, when running tracing debug builds of `mesosphère`, hbloader now has access to the kernel trace buffer.
++ Several issues were fixed, and usability and stability were improved.
+## 0.16.1
++ Support was added for 11.0.1.
+  + `mesosphère` was updated to reflect the latest official kernel behavior.
+    + A new svc::InfoType added in 11.0.0 was implemented (it wasn't discovered before 0.16.0 released).
+    + The new Control Flow Integrity (CFI) logic added in 11.0.0 kernel was implemented.
++ `fs` logic was refactored and cleaned up to reflect some newer sysmodule behavioral and structural changes.
++ `exosphère` was updated to allow dynamic control of what uart port is used for logging.
+  + This can be controlled by editing the `log_port`, `log_baud_rate`, and `log_inverted` fields in `exosphere.ini`.
++ `mesosphère` was updated to improve debugging capabilities.
+  + This is still a work in progress, but developers may be interested.
++ A bug was fixed that caused `fatal` to fatal error if the fatal process was already being debugged.
++ Several issues were fixed, and usability and stability were improved.
+## 0.16.0
++ Support was added for 11.0.0.
+  + `exosphère` was updated to reflect the latest official secure monitor behavior.
+  + `mesosphère` was updated to reflect the latest official kernel behavior.
+  + `loader`, `sm`, `boot`, `pgl` were updated to reflect the latest official behaviors.
+    + **Please Note**: 11.0.0 implements an opt-in version of the atmosphère `sm` extension that allows for closing session without unregistering services.
+      + Correspondingly, the extension will be deprecated in favor of the new official opt-in command. In 0.17.0, it will be removed entirely.
+      + If your custom system module relies on this extension (however unlikely that seems to me), please update it accordingly.
+  + `erpt` was partially updated to provide compatibility with 11.0.0.
+    + The latest firmware attaches additional fields and context information to logs.
+    + A future atmosphère update will implement this logic, so that users who are interested can also get the new information when examining their logs.
+  + **Please Note**: 11.0.0 introduced breaking changes to the `usb` system module's `usb:ds` API.
+    + Homebrew which uses the `usb:ds` service should rebuild with the latest libnx version to support running on 11.0.0.
++ The `boot` system module was rewritten to reflect the huge driver changes introduced in 8.0.0.
+  + This includes a number of improvements to both logo display and battery management logic.
++ Support was added for configuring the address space width for `hbl`.
+  + The `hbl_config!override_address_space_(#)` and `hbl_config!override_any_app_address_space` can now be set to `39_bit`, `36_bit`, or `32_bit` to control the address space for hbl on a per-override basis.
+  + If a configuration has not been set, hbl will now default to 39-bit address space.
+    + Previously, a legacy 36-bit address space was always used to maintain compatibility with 1.0.0.
+    + A new loader extension was added to support 39-bit whenever possible (including mesosphere-on-1.0.0), with fallback to 36-bit when unavailable.
++ Support was added to a number of components for running on Mariko hardware.
+  + The `boot` system module can now safely be run on mariko hardware, performing correct hardware initialization.
+  + Daybreak (and generally, system update logic) were updated to be usable on Mariko.
+  + Boot0 protection/management logic was updated to perform correct actions on Mariko.
+  + Reboot to payload does not and cannot work on Mariko. Correspondingly, A "fatal error" handler was written, to display and save fatal errors from within TrustZone.
+  + **Please Note:** Atmosphere is still not properly usable on Mariko hardware.
+    + In particular, wake-from-sleep will not properly function (the magic numbers aren't set correctly), among a few other minor issues.
++ `exosphère` received support for building under debug configuration.
+  + A small (otherwise unused) portion of IRAM is now reserved for debug-only exosphere code (this region is unused/untouched under release config).
+  + This enables logging (including printf) to uart from the secure monitor, for those interested.
++ A number of bugs were fixed, including:
+  + Minor issues in a number of filesystem related code were fixed.
+  + An issue was fixed that could cause NCM to abort on consoles which came with 3.0.x and were never updated.
++ Several issues were fixed, and usability and stability were improved.
+## 0.15.0
++ fusee-primary's panic display was updated to automatically identify and give suggestions to resolve many of the most common errors users encounter.
++ Having been tested as well as I can alone, `mesosphere` (atmosphère's reimplementation of the Nintendo Switch kernel) is now available for users interested in trying it.
+  + Beginning in this release and until it is stable and well-tested, atmosphère will distribute two zips.
+    + Users who wish to opt-in to mesosphere should download and extract the "cool kids" zip ("atmosphere-EXPERIMENTAL-").
+    + Users who do not wish to use mesosphere should continue using the normal zip ("atmosphere-").
+  + Users may detect whether mesosphere is active in system settings.
+    + When mesosphere is active, the system version string will display "M.15.0" rather than "0.15.0", and so on for future releases.
+    + Crash reports and the like will contain information on whether or not the user is using mesosphere, as well.
+  + There are "probably" no material user-facing benefits to using mesosphere at this time.
+    + Developers may be interested in the fact that mesosphere provides many newer SVC APIs even when on lower firmware versions.
+    + The primary benefit to using mesosphere is that any issues you may encounter and report to me will be fixed.
+      + All users who choose to opt in to using mesosphere have my deepest gratitude.
+  + **Note:** If using hekate instead of fusee-primary, you will have to wait for the next hekate release for mesosphere to function, as hekate's support has not yet been included in an official release build.
+    + This will be updated in the release notes when hekate provides a new release.
+  + As mentioned in previous release notes, when mesosphere is stable and well-tested, it will be enabled by default and atmosphère's version will transition to 1.0.0.
++ Having been tested sufficiently over the last half-year, Atmosphere's NCM implementation is now opt-out, rather than opt in.
+  + In the unlikely event that any issues are encountered, please report them to @SciresM.
+  + Users interested in opting out of using our implementation should set `stratosphere!disable_ncm = 1` in BCT.ini.
+  + The NCM implementation will stop being opt-out in a future update, probably around the same time that mesosphere becomes opt-out instead of opt-in.
++ Several bugs were fixed, including:
+  + Loader now sets HBL's thread priority to a higher value when loading it in applet mode.
+    + This fixes an extremely-slow launch ("hang") when using applet-HBL with certain games that do not suspend while inactive (e.g. Super Mario Sunshine).
+  + set.mitm now caches user language configuration much more heavily.
+    + This severely reduces lag in certain games which misuse the "nn::oe::GetDesiredLanguage()" API.
+  + A bug was fixed that could cause erpt to fatal when loading an official save file that had error report attachments in it.
++ General system stability improvements to enhance the user's experience.
+## 0.14.4
++ Several bugs were fixed involving the official jit sysmodule added in 10.0.0.
+  + A Process handle leak was fixed when JitPlugin NRRs were registered with the `ro` sysmodule.
+    + This prevented processes using jit from being able to exit, causing a full system freeze.
+  + The `sm` atmosphere extension to not unregister services when the server's connection is closed was special-case disabled for `jit:u`.
+    + This extension is normally desirable in order to allow more concurrent processes to exist (as only 0x40 sm connections may ever be concurrently open), but official jit sysmodule relies on the behavior.
+    + This would cause crashes on attempts to launch a program using jit services more than once per reboot.
++ General system stability improvements to enhance the user's experience.
+## 0.14.3
++ Support was added for 10.2.0.
++ General system stability improvements to enhance the user's experience.
+## 0.14.2
++ A bug was fixed that could cause a deadlock when installing mitm services.
+  + Fixing this required a breaking change to the client behavior when installing a mitm service, and so custom sysmodules which use mitm will need to be re-compiled to function properly.
++ A bug was fixed that caused atmosphere sysmodules to respond incorrectly when receiving invalid messages.
++ A bug was fixed that caused fatal auto-reboot timing to work improperly.
++ Support was added to fusee for loading binaries for `mesosphere`, atmosphère's reimplementation of the Nintendo Switch kernel.
+  + 0.14.2 does not include mesosphere, but those who are especially interested can build and test mesosphere themselves.
+  + In the future, to enable a sufficient testing period Atmosphère releases will distribute two zips for some time.
+    + One zip will use mesosphere, and the other will not.
+    + This will allow users who are interested to opt-in to mesosphere usage before it has been tested to be stable.
+  + When mesosphere is stable and well-tested, it will be enabled by default and Atmosphère's version will transition to 1.0.0.
++ General system stability improvements to enhance the user's experience.
+## 0.14.1
++ An issue was fixed in 0.14.0 that would cause a black screen on boot when the INI1's size was not aligned to 8 bytes.
++ General system stability improvements to enhance the user's experience.
+## 0.14.0
++ An API (`ams:su`) was added to allow homebrew to safely install system upgrades or downgrades.
+  + This is a re-implementation of the logic that `ns` uses to install gamecard system updates.
+  + Nintendo (and now atmosphère) uses an installation process that can recover no matter where a failure occurs, which should significantly improve the safety of custom system update installation.
++ Support was added to `exosphère` for running on Mariko hardware.
+  + **Please note**: Atmosphère still does not support Mariko, and should not be run on Mariko yet.
+    + Certain stratosphere components do not handle mariko-specific logic fully correctly yet, and may initialize or interact with hardware incorrectly.
+    + This will be fixed and support will be added over the remainder of the Summer.
++ A homebrew application (`daybreak`) was added that uses the system updater API (with thanks to @Adubbz for both design and implementation).
+  + `daybreak` is included with atmosphère, and functions as a safer/more accurate equivalent to e.g. ChoiDujourNX.
+  + Upgrades/downgrades can be installed from a folder containing the update NCAs on the SD card.
+  + Because the update logic functions identically to Nintendo's, `daybreak` will be safe to use on Mariko when the rest of atmosphère has support.
+  + **Please note**: Daybreak requires that meta (.cnmt) NCAs have the correct extension `.cnmt.nca`.
+    + This is because gamecard system update logic uses extension to determine whether to mount the content.
+    + [Several](https://gist.github.com/HookedBehemoth/df36b5970e1c5b1b512ec7bdd9043c6e) [scripts](https://gist.github.com/antiKk/279966c27fdfd9c7fe63b4ae410f89c4) have been made by community members to automatically rename folders with incorrect extensions.
++ A bug was fixed that would cause file-based emummc to throw an error (showing a hexdump) on boot.
+  + Major thanks to @hexkyz for tracking down and resolving this.
++ A number of minor issues were resolved, including:
+  + fusee now prints information to the screen when an error occurs, instead of getting stuck trying to initialize the display.
+  + A race condition in Horizon was worked around that could prevent boot under certain circumstances.
+  + A bug was fixed that would cause atmosphère modules to open ten copies of certain filesystems instead of one.
+    + This could cause object exhaustion under certain circumstances.
++ For those interested in atmosphère's future development plans, the project's [roadmap](https://github.com/Atmosphere-NX/Atmosphere/blob/ac9832c5ce7be5832f6d29f6564a9c03e7efd22f/docs/roadmap.md) was updated.
++ General system stability improvements to enhance the user's experience.
+## 0.13.0
++ `exosphère`, atmosphère's secure monitor re-implementation, was completely re-written.
+  + `exosphère` was the first component authored for the project in early 2018. It is written in C, and in a style very different from the rest of atmosphère's code.
+    + This has made the codebase difficult to maintain as time has gone on.
+  + `exosphère` was also written to conform to constraints and assumptions that simply no longer apply when cfw is not launched from the web browser, and when warmboothax is possible.
+  + Even beyond these issues, `exosphère` used all but 1KB of the 64KB of space available to it. This was a problem for a few reasons:
+    + Each new system update added requires additional space to support (to add new keys and reflect various changes); 10.0.0 support used up 3 of the 4KB we had left.
+    + atmosphère will want to have software support for mariko hardware, and this is not possible to fit in 1 KB.
+  + The `exosphère` rewrite (which was codenamed `exosphère2` during development) solves these problems.
+  + The new codebase is C++20 written in atmosphère's style.
+    + This solves the maintainability problem, and should make understanding how the secure monitor works *much* easier for those interested in using the code as a reference implementation.
+  + In addition, the new implementation currently uses ~59.5 of the 64KB available.
+    + Several potential code changes are planned that can save/grant access to an additional ~2-3 KB if needed.
+      + Unlike the first codebase, the new `exosphère` actually already has space allocated for future keys/etc. It is currently expected that the reserved space will never be required.
+    + The previous implementation chose not to implement a number of "unimportant" secure monitor functions due to space concerns. The new code has enough breathing room that it can implement them without worries. :)
+  + Finally, the groundwork for mariko support has been laid -- there are only a few minor changes needed for the new secure monitor implementation to work on both erista and mariko hardware.
+    + **Please note**: `exosphère` is only one of many components, and many more need changes to support running on mariko hardware.
+      + Software-side support for executing on mariko hardware is expected some time during Summer 2020, though it should also be noted that this is not a hard deadline.
+  + **Please note**: The new `exosphère` binary is not abi-compatible with the old one. Users who boot using hekate should wait for it to update before running 0.13.0 (or boot fusee-primary via hekate).
++ atmosphère's api for target firmware was changed. All minor/micro system versions are now recognized, instead of only major versions.
+  + This was required in order to support firmware version 5.1.0, which made breaking changes to certain IPC APIs that caused atmosphère 0.12.0 to abort.
+  + **Please note**: this is (unavoidably) a breaking change. System modules using atmosphere-libs will need to update to understand what firmware version they are running.
++ `emummc` was updated to include the new changes.
+  + `emummc` now uses an updated/improved/faster SDMMC driver.
+  + File-based emummc is now almost as fast as raw partition-based emummc.
++ For those interested in atmosphère's future development plans, the project's [roadmap](https://github.com/Atmosphere-NX/Atmosphere/blob/f68d33b70aed8954cc2c539e5934bcaf37ba51da/docs/roadmap.md) was updated.
++ General system stability improvements to enhance the user's experience.
 
 ## 0.12.0
 + Configuration for exosphere was moved to sd:/exosphere.ini.

docs/components/detail/exosphere_memory_layout.txt

@@ -0,0 +1,103 @@
+exosphere, storage requirements:
+
+Nonvolatile memory:
+0xE000
+
+Volatile memory: 0x2000
+
+Physical Address Space:
+-0x7C010000-0x7C012000 - boot code/volatile memory
+-0x7C012000-0x7C01E000 - program region
+-0x7C01E000-0x7C01F000 - global data/context
+-0x7C01F000-0x7C020000 - L2/L3 page table
+
+-0x7C020000-0x7C040000 - Mariko-only program region
+-0x7C040000-0x7C048000 - Mariko-only program stack
+-0x7C048000-0x7C050000 - Reserved Mariko TZRAM (SE context carveouts, etc)
+
+Virtual Address Space:
+
+L1: 0x40 bytes.
+
+L1 Entries:
+    -0 (0x000000000-0x040000000): Empty
+    -1 (0x040000000-0x080000000): Identity Mapping/Empty
+    -2 (0x080000000-0x0C0000000): DRAM Mapping/Empty
+    -3 (0x0C0000000-0x100000000): DRAM Mapping/Empty
+    -4 (0x100000000-0x140000000): Empty
+    -5 (0x140000000-0x180000000): Empty
+    -6 (0x180000000-0x1C0000000): Empty
+    -7 (0x1C0000000-0x200000000): Virtual Region
+
+L2 Page and L3 page are both0x7C01F000
+
+L2 Entries:
+    -0x040000000 (Identity IRAM Table)
+        - Entry Used: 0x000
+    -0x07C000000 (Identity TZRAM Table)
+        - Entry Used: 0x1E0
+    -0x1F0000000 (Virtual Region Table)
+        - Entry Used: 0x180
+
+L3 Entries:
+    - Identity TZRAM mapping (0x7C010000-0x7C020000)
+        - Entry Used: 0x010-0x01F
+    - Identity IRAM mapping  (0x40020000-0x40040000)
+        - Entry Used: 0x020-0x03F
+    - Virtual Device region (0x1F0040000-0x1F0080000)
+        - Entry Used: 0x040-0x07F
+    - Read Only TZRAM Alias (0x1F00A0000-0x1F00B0000)
+        - Entry Used: 0x0A0-0x0AF
+    - Program region        (0x1F00C0000-0x1F00CC000)
+        - Entry Used: 0x0C0-0x0CB
+    - Mariko Program region (0x1F00D0000-0x1F00F0000)
+        - Entry Used: 0x0D0-0x0EF
+    - Mariko Program stack  (0x1F00F4000-0x1F00FC000)
+        - Entry Used: 0x0F4-0x0FB
+    - Secure DRAM Storage   (0x1F0100000-0x1F0110000)
+        - Entry Used: 0x100-0x10F
+    - Debug DRAM Storage    (0x1F0110000-0x1F0114000)
+        - Entry Used: 0x110-0x113
+    - SC7 IRAM Work Space   (0x1F0120000-0x1F0130000)
+        - Entry Used: 0x120-0x12F
+    - SC7 IRAM Firmware     (0x1F0140000-0x1F0141000)
+        - Entry Used: 0x140-0x140
+    - Debug Code            (0x1F0150000-0x1F0154000)
+        - Entry Used: 0x150-0x153
+    - Reserved For Debug    (0x1F0160000-0x1F0170000)
+        - Entry Used: 0x160-0x16F
+    - Boot Code             (0x1F01C0000-0x1F01C2000)
+        - Entry Used: 0x1C0-0x1C1
+    - AMS IRAM Page         (0x1F01F2000-0x1F01F2000)
+        - Entry Used: 0x1F2-0x1F2
+    - AMS User Page         (0x1F01F4000-0x1F01F4000)
+        - Entry Used: 0x1F4-0x1F4
+    - SMC User Page         (0x1F01F6000-0x1F01F6000)
+        - Entry Used: 0x1F6-0x1F6
+    - Volatile (Data)       (0x1F01F8000-0x1F01F9000)
+        - Entry Used: 0x1F8-0x1F8
+    - Volatile (Stacks)     (0x1F01FA000-0x1F01FB000)
+        - Entry Used: 0x1FA-0x1FA
+    - Global Data           (0x1F01FC000-0x1F01FD000)
+
+
+NV Global Data needs:
+    Exosphere + Emummc Config (<=0x200)
+    Boot Config[0x400]
+    RSA Context(0x100)
+    Old Device Keys[0x20][0x10];
+    Old Master Keys[0x20][0x10];
+    Imported Rsa Keys[4][0x200];
+    CPU Ctx[4][0x100];
+
+Total: 0x1700
+
+Global Data Page (accessible via X18):
+    0x000-0x200: Exosphere Config
+    0x200-0x400: Emummc Config
+    0x400-0x800: Sealed AES Keys
+    0x800-0xC00: Boot Config
+    0xC00-0xFFF: CPU contexts. Can be replaced, but this fits exactly so minimizes program space waste.
+
+Volatile Global Data needs:
+    Random Cache 0x400 bytes

docs/components/modules/ams_mitm.md

@@ -33,3 +33,8 @@ in settings as `#.#.#|AMS #.#.#|?` with `? = S` when running under system eMMC o
 ### System Settings
 set_mitm intercepts the `GetSettingsItemValueSize` and `GetSettingsItemValue` commands for all requesters.
 It does so in order to enable user configuration of system settings, which are parsed from `/atmosphere/system_settings.ini` on boot. See [here](../../features/configurations.md) for more information on the system settings format.
+
+## dns_mitm
+dns_mitm enables intercepting requests to dns resolution services, to enable redirecting requests for specified hostnames.
+
+For documentation, see [here](../../features/dns_mitm.md).

docs/features/configurations.md

@@ -9,7 +9,7 @@ This file is located under the `/atmosphere/config/` folder on your SD card and
 Atmosphère provides its own default splashscreen which is displayed at boot time. However, this can be replaced at will.
 
 The boot splashscreen must be a BMP file, it must be 720x1280 (1280x720 rotated 90 degrees left/counterclockwise/anti-clockwise) resolution, and be in 32-bit ARGB format. You can use image editing software such as GIMP or Photoshop to export the image in this format.
- 
+
 Add the following lines to BCT.ini and change the value of `custom_splash` to the actual path and filename of your boot splashscreen:
 ```
 [stage2]
@@ -29,11 +29,11 @@ nogc = X
 0 = force-disable nogc, so Atmosphère will always enable the Game Card reader.
 ```
 
-### NCM opt-in
+### NCM opt-out
-Atmosphère provides a reimplementation of the [ncm](../components/modules/ncm.md) system module, but currently this is not enabled by default. If you wish to enable this reimplementation add the following line to the `stratosphere` section:
+Atmosphère provides a reimplementation of the [ncm](../components/modules/ncm.md) system module. If you wish to disable this reimplementation add the following line to the `stratosphere` section:
 ```
 [stratosphere]
-enable_ncm = 1
+disable_ncm = 1
 ```
 
 ### Logging

docs/features/dns_mitm.md

@@ -0,0 +1,53 @@
+# DNS.mitm
+As of 0.18.0, atmosphère provides a mechanism for redirecting DNS resolution requests.
+
+By default, atmosphère redirects resolution requests for official telemetry servers, redirecting them to a loopback address.
+
+## Hosts files
+
+DNS.mitm can be configured through the usage of a slightly-extended `hosts` file format, which is parsed only once on system startup.
+
+In particular, hosts files parsed by DNS.mitm have the following extensions to the usual format:
++ `*` is treated as a wildcard character, matching any collection of 0 or more characters wherever it occurs in a hostname.
++ `%` is treated as a stand-in for the value of `nsd!environment_identifier`. This is always `lp1`, on production devices.
+
+If multiple entries in a host file match a domain, the last-defined match is used.
+
+Please note that homebrew may trigger a hosts file re-parse by sending the extension IPC command 65000 ("AtmosphereReloadHostsFile") to a connected `sfdnsres` session.
+
+### Hosts file selection
+
+Atmosphère will try to read hosts from the following file paths, in order, stopping once it successfully performs a file read:
+
++ (emummc only) `/atmosphere/hosts/emummc_%04lx.txt`, formatted with the emummc's id number (see `emummc.ini`).
++ (emummc only) `/atmosphere/hosts/emummc.txt`.
++ (sysmmc only) `/atmosphere/hosts/sysmmc.txt`.
++ `/atmosphere/hosts/default.txt`
+
+If `/atmosphere/hosts/default.txt` does not exist, atmosphère will create it to contain the defaults.
+
+### Atmosphère defaults
+
+By default, atmosphère's default redirections are parsed **in addition to** the contents of the loaded hosts file.
+
+This is equivalent to thinking of the loaded hosts file as having the atmosphère defaults prepended to it.
+
+This setting is considered desirable, because it minimizes the telemetry risks if a user forgets to update a custom hosts file on a system update which changes the telemetry servers.
+
+This behavior can be opted-out from by setting `atmosphere!add_defaults_to_dns_hosts = u8!0x0` in `system_settings.ini`.
+
+The current default redirections are:
+
+```
+# Nintendo telemetry servers
+127.0.0.1 receive-%.dg.srv.nintendo.net receive-%.er.srv.nintendo.net
+```
+
+## Debugging
+
+On startup (or on hosts file re-parse), DNS.mitm will log both what hosts file it selected and the contents of all redirections it parses to `/atmosphere/logs/dns_mitm_startup.log`.
+
+In addition, if the user sets `atmosphere!enable_dns_mitm_debug_log = u8!0x1` in `system_settings.ini`, DNS.mitm will log all requests to GetHostByName/GetAddrInfo to `/atmosphere/logs/dns_mitm_debug.log`. All redirections will be noted when they occur.
+
+## Opting-out of DNS.mitm entirely
+If you wish to disable DNS.mitm entirely, `system_settings.ini` can be edited to set `atmosphere!enable_dns_mitm = u8!0x0`.

docs/roadmap.md

@@ -1,49 +1,60 @@
 # Planned Features
 atmosphère has a number of features that are either works-in-progress or planned. Please note that while time-estimates are given, they are loose, and things may be completed sooner or later than advertised.
 
-The following descriptions were last updated in late April of 2020.
+The following descriptions were last updated on January 14th, 2021
-
-## system updater api
-* **Description**: A planned extension api for stratosphere (tenatively `ams:su`), this will provide an interface for homebrew to safely install system upgrades or downgrades. This will allow for much more easily transitioning safely between different versions of the operating system.
-* **Development Status**: Under active development by SciresM
-* **Estimated Time**: May 2020
-
-## settings reimplementation
-* **Description**: A planned reimplementation of the settings system module, and with it a removal of the settings mitm. This will greatly simplify atmosphère's boot process, and will allow much more flexible control over the various system settings.
-* **Development Status**: Undergoing research/initial development by Adubbz.
-* **Estimated Time**: Mid 2020
-
-## mesosphere
-* **Description**: mesosphère is a reimplementation of the Horizon operating system's Kernel. It aims to provide an open-source reference for Nintendo's code.
-* **Development Status**: Under semi-active development by SciresM; temporarily on pause while the System Updater API is completed.
-* **Estimated Time**: Mid-to-Late 2020
-
-## exosphere re-write
-* **Description**: exosphère, atmosphère's reimplementation of Horizon's Secure Monitor, was the first component authored for the project in early 2018. It is written in C, and in a style very different from the rest of atmosphère's code. In addition, exosphère was written to conform to constraints that no longer apply in an environment where it is not launched from the web browser, and where using a custom firmware image to orchestrate wake-from-sleep is possible. exosphère currently uses all but 1 KB of the space available to it, putting it at risk of breaking as future firmware updates are supported. A re-write will solve these issues.
-* **Development Status**: Planned.
-* **Estimated Time**: 2020-2021.
 
 ## tma reimplementation
 * **Description** tma ("target manager agent") is a system module that manages communication between the Switch and a client PC. Atmosphere's implementation will allow homebrew on the switch to communicate with a connected PC to do various operations such as exchanging data or interacting with files. It will also serve as the communicator for Atmosphère's planned debugger. This will also include PC-side software for interacting with the Switch.
 * **Development Status**: Planned. Switch-side code is fully implemented but needs heavy refactoring/rebasing, as the code was originally authored in 2018.
-* **Estimated Time**: Late 2020-2021.
+* **Estimated Time**: 2021-2022.
 
 ## dmnt.gen2 reimplementation
 * **Description**: A reimplementation of the Switch's debug monitor, dmnt will provide an interface for debugging applications or system modules running on the Switch. This will include a gdbstub for debugging actively-running system components or applications.
 * **Development Status**: Planned
-* **Estimated Time**: 2021
+* **Estimated Time**: 2021-2022
 
 ## fs reimplementation
 * **Description**: Following mesosphère's completion, atmosphère will have reimplemented all components of the BootImagePackage firmware except for the filesystem services system module. Reimplementing fs will allow for fixing Nintendo bugs (such as corruption when using exFAT filesystems and encoding inconsistencies with UTF-8 and Shift-JIS).
 * **Development Status**: Planned.
 * **Estimated Time**: 2021-2022.
 
+## settings reimplementation
+* **Description**: A planned reimplementation of the settings system module, and with it a removal of the settings mitm. This will greatly simplify atmosphère's boot process, and will allow much more flexible control over the various system settings.
+* **Development Status**: Pending development by Adubbz.
+* **Estimated Time**: Unclear, pending developer availability.
+
 ## thermosphère
 * **Description**: A general-purpose hypervisor, thermosphère will enable the virtualization of the Switch's operating system; this is planned to enable debugging of the Switch's kernel.
-* **Development Status**: Under semi-active development by TuxSH.
+* **Development Status**: Pending development by TuxSH.
-* **Estimated Time**: 2020-2021.
+* **Estimated Time**: Unclear, pending developer availability.
 
 ## other planned features
 * **Description**: General system stability improvements to enhance the user's experience.
 * **Development Status**: Undergoing active development by all members of the atmosphère team.
 * **Estimated Time**: June 15th.
+
+# Completed features
+
+The following features were previously included under the planned features section and are now complete.
+
+Please note that this is not an exhaustive list of features present in atmosphère, and only serves to indicate what from the above has been completed.
+
+## system updater homebrew
+* **Description**: A user homebrew making use of the new system updater api, so that users can actually use the new api in practice.
+* **Completion Time**: July 2020
+
+## system updater api
+* **Description**: A planned extension api for stratosphere (tenatively `ams:su`), this will provide an interface for homebrew to safely install system upgrades or downgrades. This will allow for much more easily transitioning safely between different versions of the operating system.
+* **Completion Time**: June 2020
+
+## exosphere re-write
+* **Description**: exosphère, atmosphère's reimplementation of Horizon's Secure Monitor, was the first component authored for the project in early 2018. It is written in C, and in a style very different from the rest of atmosphère's code. In addition, exosphère was written to conform to constraints that no longer apply in an environment where it is not launched from the web browser, and where using a custom firmware image to orchestrate wake-from-sleep is possible. exosphère currently uses all but 1 KB of the space available to it, putting it at risk of breaking as future firmware updates are supported. A re-write will solve these issues.
+* **Completion Time**: June 2020
+
+## mesosphere
+* **Description**: mesosphère is a reimplementation of the Horizon operating system's Kernel. It aims to provide an open-source reference for Nintendo's code.
+* **Estimated Time**: September 2020
+
+## ams-on-mariko
+* **Description**: Atmosphere cannot run as-is on Mariko hardware. A large number of changes are needed in many components. Although secure monitor support is complete in exosphere, additional work is needed on the bootloader and stratosphere sides as well. Mariko support will also require further design thought; atmosphere's debugging design heavily relies on reboot-to-payload and (more generally) the ability to perform warmboot bootrom hax at will. This is not possible on Mariko, and will require a new design/software support for whatever solution is chosen.
+* **Completion Time**: January 2021

emummc/.gitrepo

@@ -6,7 +6,7 @@
 [subrepo]
 	remote = https://github.com/m4xw/emuMMC
 	branch = develop
-	commit = 292a8ad42c8e9f4c9a474b46a5a3190398581131
+	commit = 219c723c3001fbc33d47840ceceb83cf39a1d218
-	parent = 491ba8fdcfd39a503bedd21b282991fc19aec7d4
+	parent = 7821241356c2f6b159945babf657ffd921957918
 	method = rebase
 	cmdver = 0.4.1

emummc/Makefile

@@ -21,9 +21,10 @@ include $(DEVKITPRO)/libnx/switch_rules
 
 ARCH	:=	-march=armv8-a -mtune=cortex-a57 -mtp=soft -fPIE
 
-DEFINES := -DINNER_HEAP_SIZE=0x80000
+# Current max usage is 0x4600. (512 * 34 FatFS file objects + 1 fsync buffer).
+DEFINES := -DINNER_HEAP_SIZE=0x8000
 
-CFLAGS	:=	-Wall -O2 -ffunction-sections -Wno-unused-function \
+CFLAGS	:=	-Wall -O2 -ffunction-sections -fdata-sections -Wno-unused-function \
 			$(ARCH) $(DEFINES)
 
 CFLAGS	+=	$(INCLUDE) -D__SWITCH__

emummc/README.md

@@ -2,7 +2,7 @@
 *A SDMMC driver replacement for Nintendo's Filesystem Services, by **m4xw***  
 
 ### Supported Horizon Versions
-**1.0.0 - 10.0.0**
+**1.0.0 - 11.0.0**
 
 ## Features
 * Arbitrary SDMMC backend selection  

emummc/emummc.json

@@ -128,6 +128,8 @@
                 "svcUnmapDeviceAddressSpace": "0x5c",
                 "svcGetSystemInfo": "0x6f",
                 "svcSetProcessMemoryPermission": "0x73",
+                "svcMapProcessMemory": "0x74",
+                "svcUnmapProcessMemory": "0x75",
                 "svcCallSecureMonitor": "0x7f"
             }
         }

emummc/source/FS/FS_offsets.c

@@ -47,6 +47,14 @@
 #include "offsets/910_exfat.h"
 #include "offsets/1000.h"
 #include "offsets/1000_exfat.h"
+#include "offsets/1020.h"
+#include "offsets/1020_exfat.h"
+#include "offsets/1100.h"
+#include "offsets/1100_exfat.h"
+#include "offsets/1200.h"
+#include "offsets/1200_exfat.h"
+#include "offsets/1203.h"
+#include "offsets/1203_exfat.h"
 #include "../utils/fatal.h"
 
 #define GET_OFFSET_STRUCT_NAME(vers) g_offsets##vers
@@ -67,6 +75,7 @@ static const fs_offsets_t GET_OFFSET_STRUCT_NAME(vers) = { \
     .nand_mutex                      = FS_OFFSET##vers##_NAND_MUTEX, \
     .active_partition                = FS_OFFSET##vers##_ACTIVE_PARTITION, \
     .sdmmc_das_handle                = FS_OFFSET##vers##_SDMMC_DAS_HANDLE, \
+    .sdmmc_accessor_controller_open  = FS_OFFSET##vers##_SDMMC_WRAPPER_CONTROLLER_OPEN, \
     .sdmmc_accessor_controller_close = FS_OFFSET##vers##_SDMMC_WRAPPER_CONTROLLER_CLOSE, \
     .sd_das_init                     = FS_OFFSET##vers##_SD_DAS_INIT, \
     .nintendo_paths                  = FS_OFFSET##vers##_NINTENDO_PATHS, \
@@ -104,6 +113,14 @@ DEFINE_OFFSET_STRUCT(_910);
 DEFINE_OFFSET_STRUCT(_910_EXFAT);
 DEFINE_OFFSET_STRUCT(_1000);
 DEFINE_OFFSET_STRUCT(_1000_EXFAT);
+DEFINE_OFFSET_STRUCT(_1020);
+DEFINE_OFFSET_STRUCT(_1020_EXFAT);
+DEFINE_OFFSET_STRUCT(_1100);
+DEFINE_OFFSET_STRUCT(_1100_EXFAT);
+DEFINE_OFFSET_STRUCT(_1200);
+DEFINE_OFFSET_STRUCT(_1200_EXFAT);
+DEFINE_OFFSET_STRUCT(_1203);
+DEFINE_OFFSET_STRUCT(_1203_EXFAT);
 
 const fs_offsets_t *get_fs_offsets(enum FS_VER version) {
     switch (version) {
@@ -169,6 +186,22 @@ const fs_offsets_t *get_fs_offsets(enum FS_VER version) {
             return &(GET_OFFSET_STRUCT_NAME(_1000));
         case FS_VER_10_0_0_EXFAT:
             return &(GET_OFFSET_STRUCT_NAME(_1000_EXFAT));
+        case FS_VER_10_2_0:
+            return &(GET_OFFSET_STRUCT_NAME(_1020));
+        case FS_VER_10_2_0_EXFAT:
+            return &(GET_OFFSET_STRUCT_NAME(_1020_EXFAT));
+        case FS_VER_11_0_0:
+            return &(GET_OFFSET_STRUCT_NAME(_1100));
+        case FS_VER_11_0_0_EXFAT:
+            return &(GET_OFFSET_STRUCT_NAME(_1100_EXFAT));
+        case FS_VER_12_0_0:
+            return &(GET_OFFSET_STRUCT_NAME(_1200));
+        case FS_VER_12_0_0_EXFAT:
+            return &(GET_OFFSET_STRUCT_NAME(_1200_EXFAT));
+        case FS_VER_12_0_3:
+            return &(GET_OFFSET_STRUCT_NAME(_1203));
+        case FS_VER_12_0_3_EXFAT:
+            return &(GET_OFFSET_STRUCT_NAME(_1203_EXFAT));
         default:
             fatal_abort(Fatal_UnknownVersion);
     }

emummc/source/FS/FS_offsets.h

@@ -41,6 +41,7 @@ typedef struct {
     // Misc funcs
     uintptr_t lock_mutex;
     uintptr_t unlock_mutex;
+    uintptr_t sdmmc_accessor_controller_open;
     uintptr_t sdmmc_accessor_controller_close;
     // Misc data
     uintptr_t sd_mutex;

emummc/source/FS/FS_structs.h

@@ -35,7 +35,7 @@ typedef struct sdmmc_accessor_vt
     void *dtor;
     void *map_device_addr_space;
     void *unmap_device_addr_space;
-    void *controller_open;
+    uint64_t (*sdmmc_accessor_controller_open)(void *);
     uint64_t (*sdmmc_accessor_controller_close)(void *);
     uint64_t (*read_write)(void *, uint64_t, uint64_t, void *, uint64_t, uint64_t);
     // More not included because we don't use it.

emummc/source/FS/FS_versions.h

@@ -68,6 +68,18 @@ enum FS_VER
     FS_VER_10_0_0,
     FS_VER_10_0_0_EXFAT,
 
+    FS_VER_10_2_0,
+    FS_VER_10_2_0_EXFAT,
+
+    FS_VER_11_0_0,
+    FS_VER_11_0_0_EXFAT,
+
+    FS_VER_12_0_0,
+    FS_VER_12_0_0_EXFAT,
+
+    FS_VER_12_0_3,
+    FS_VER_12_0_3_EXFAT,
+
     FS_VER_MAX,
 };
 

emummc/source/FS/offsets/100.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_100_LOCK_MUTEX          0x2884
 #define FS_OFFSET_100_UNLOCK_MUTEX        0x28F0
 
+#define FS_OFFSET_100_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_100_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x6A8AC
 
 // Misc Data

emummc/source/FS/offsets/1000.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_1000_LOCK_MUTEX          0x28910
 #define FS_OFFSET_1000_UNLOCK_MUTEX        0x28960
 
+#define FS_OFFSET_1000_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_1000_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1422E0
 
 // Misc Data

emummc/source/FS/offsets/1000_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_1000_EXFAT_LOCK_MUTEX          0x28910
 #define FS_OFFSET_1000_EXFAT_UNLOCK_MUTEX        0x28960
 
+#define FS_OFFSET_1000_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_1000_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1422E0
 
 // Misc Data

emummc/source/FS/offsets/1020.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1020_H__
+#define __FS_1020_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1020_SDMMC_ACCESSOR_GC   0x14E0F0
+#define FS_OFFSET_1020_SDMMC_ACCESSOR_SD   0x14C200
+#define FS_OFFSET_1020_SDMMC_ACCESSOR_NAND 0x147080
+
+// Hooks
+#define FS_OFFSET_1020_SDMMC_WRAPPER_READ  0x1427E0
+#define FS_OFFSET_1020_SDMMC_WRAPPER_WRITE 0x1428C0
+#define FS_OFFSET_1020_RTLD                0x634
+#define FS_OFFSET_1020_RTLD_DESTINATION    0x9C
+
+#define FS_OFFSET_1020_CLKRST_SET_MIN_V_CLK_RATE 0x141A00
+
+// Misc funcs
+#define FS_OFFSET_1020_LOCK_MUTEX          0x28910
+#define FS_OFFSET_1020_UNLOCK_MUTEX        0x28960
+
+#define FS_OFFSET_1020_SDMMC_WRAPPER_CONTROLLER_OPEN  0
+#define FS_OFFSET_1020_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x142740
+
+// Misc Data
+#define FS_OFFSET_1020_SD_MUTEX            0xE273E8
+#define FS_OFFSET_1020_NAND_MUTEX          0xE22DA0
+#define FS_OFFSET_1020_ACTIVE_PARTITION    0xE22DE0
+#define FS_OFFSET_1020_SDMMC_DAS_HANDLE    0xE0AB90
+
+// NOPs
+#define FS_OFFSET_1020_SD_DAS_INIT         0x15214C
+
+// Nintendo Paths
+#define FS_OFFSET_1020_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006BBA4, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x00078520, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007ED0C, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x0009115C, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1020_H__

emummc/source/FS/offsets/1020_exfat.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1020_EXFAT_H__
+#define __FS_1020_EXFAT_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1020_EXFAT_SDMMC_ACCESSOR_GC   0x14E0F0
+#define FS_OFFSET_1020_EXFAT_SDMMC_ACCESSOR_SD   0x14C200
+#define FS_OFFSET_1020_EXFAT_SDMMC_ACCESSOR_NAND 0x147080
+
+// Hooks
+#define FS_OFFSET_1020_EXFAT_SDMMC_WRAPPER_READ  0x1427E0
+#define FS_OFFSET_1020_EXFAT_SDMMC_WRAPPER_WRITE 0x1428C0
+#define FS_OFFSET_1020_EXFAT_RTLD                0x634
+#define FS_OFFSET_1020_EXFAT_RTLD_DESTINATION    0x9C
+
+#define FS_OFFSET_1020_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x141A00
+
+// Misc funcs
+#define FS_OFFSET_1020_EXFAT_LOCK_MUTEX          0x28910
+#define FS_OFFSET_1020_EXFAT_UNLOCK_MUTEX        0x28960
+
+#define FS_OFFSET_1020_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
+#define FS_OFFSET_1020_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x142740
+
+// Misc Data
+#define FS_OFFSET_1020_EXFAT_SD_MUTEX            0xE353E8
+#define FS_OFFSET_1020_EXFAT_NAND_MUTEX          0xE30DA0
+#define FS_OFFSET_1020_EXFAT_ACTIVE_PARTITION    0xE30DE0
+#define FS_OFFSET_1020_EXFAT_SDMMC_DAS_HANDLE    0xE18B90
+
+// NOPs
+#define FS_OFFSET_1020_EXFAT_SD_DAS_INIT         0x15214C
+
+// Nintendo Paths
+#define FS_OFFSET_1020_EXFAT_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006BBA4, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x00078520, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007ED0C, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x0009115C, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1020_EXFAT_H__

emummc/source/FS/offsets/1100.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1100_H__
+#define __FS_1100_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1100_SDMMC_ACCESSOR_GC   0x156D90
+#define FS_OFFSET_1100_SDMMC_ACCESSOR_SD   0x154F40
+#define FS_OFFSET_1100_SDMMC_ACCESSOR_NAND 0x1500F0
+
+// Hooks
+#define FS_OFFSET_1100_SDMMC_WRAPPER_READ  0x14B990
+#define FS_OFFSET_1100_SDMMC_WRAPPER_WRITE 0x14BA70
+#define FS_OFFSET_1100_RTLD                0x688
+#define FS_OFFSET_1100_RTLD_DESTINATION    ((uintptr_t)(INT64_C(-0x3C)))
+
+#define FS_OFFSET_1100_CLKRST_SET_MIN_V_CLK_RATE 0x14AC40
+
+// Misc funcs
+#define FS_OFFSET_1100_LOCK_MUTEX          0x28FF0
+#define FS_OFFSET_1100_UNLOCK_MUTEX        0x29040
+
+#define FS_OFFSET_1100_SDMMC_WRAPPER_CONTROLLER_OPEN  0x14B840
+#define FS_OFFSET_1100_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x14B8F0
+
+// Misc Data
+#define FS_OFFSET_1100_SD_MUTEX            0xE323E8
+#define FS_OFFSET_1100_NAND_MUTEX          0xE2D338
+#define FS_OFFSET_1100_ACTIVE_PARTITION    0xE2D378
+#define FS_OFFSET_1100_SDMMC_DAS_HANDLE    0xE15D40
+
+// NOPs
+#define FS_OFFSET_1100_SD_DAS_INIT         0x273B4
+
+// Nintendo Paths
+#define FS_OFFSET_1100_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006D944, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007A3C0, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x00080708, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00092198, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1100_H__

emummc/source/FS/offsets/1100_exfat.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1100_EXFAT_H__
+#define __FS_1100_EXFAT_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1100_EXFAT_SDMMC_ACCESSOR_GC   0x156D90
+#define FS_OFFSET_1100_EXFAT_SDMMC_ACCESSOR_SD   0x154F40
+#define FS_OFFSET_1100_EXFAT_SDMMC_ACCESSOR_NAND 0x1500F0
+
+// Hooks
+#define FS_OFFSET_1100_EXFAT_SDMMC_WRAPPER_READ  0x14B990
+#define FS_OFFSET_1100_EXFAT_SDMMC_WRAPPER_WRITE 0x14BA70
+#define FS_OFFSET_1100_EXFAT_RTLD                0x688
+#define FS_OFFSET_1100_EXFAT_RTLD_DESTINATION    ((uintptr_t)(INT64_C(-0x3C)))
+
+#define FS_OFFSET_1100_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x14AC40
+
+// Misc funcs
+#define FS_OFFSET_1100_EXFAT_LOCK_MUTEX          0x28FF0
+#define FS_OFFSET_1100_EXFAT_UNLOCK_MUTEX        0x29040
+
+#define FS_OFFSET_1100_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0x14B840
+#define FS_OFFSET_1100_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x14B8F0
+
+// Misc Data
+#define FS_OFFSET_1100_EXFAT_SD_MUTEX            0xE403E8
+#define FS_OFFSET_1100_EXFAT_NAND_MUTEX          0xE3B338
+#define FS_OFFSET_1100_EXFAT_ACTIVE_PARTITION    0xE3B378
+#define FS_OFFSET_1100_EXFAT_SDMMC_DAS_HANDLE    0xE23D40
+
+// NOPs
+#define FS_OFFSET_1100_EXFAT_SD_DAS_INIT         0x273B4
+
+// Nintendo Paths
+#define FS_OFFSET_1100_EXFAT_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006D944, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007A3C0, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x00080708, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00092198, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1100_EXFAT_H__

emummc/source/FS/offsets/1200.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1200_H__
+#define __FS_1200_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1200_SDMMC_ACCESSOR_GC   0x154FD0
+#define FS_OFFSET_1200_SDMMC_ACCESSOR_SD   0x156DE0
+#define FS_OFFSET_1200_SDMMC_ACCESSOR_NAND 0x155500
+
+// Hooks
+#define FS_OFFSET_1200_SDMMC_WRAPPER_READ  0x150970
+#define FS_OFFSET_1200_SDMMC_WRAPPER_WRITE 0x150A30
+#define FS_OFFSET_1200_RTLD                0x688
+#define FS_OFFSET_1200_RTLD_DESTINATION    ((uintptr_t)(INT64_C(-0x3C)))
+
+#define FS_OFFSET_1200_CLKRST_SET_MIN_V_CLK_RATE 0x14FCC0
+
+// Misc funcs
+#define FS_OFFSET_1200_LOCK_MUTEX          0x29350
+#define FS_OFFSET_1200_UNLOCK_MUTEX        0x293A0
+
+#define FS_OFFSET_1200_SDMMC_WRAPPER_CONTROLLER_OPEN  0x150850
+#define FS_OFFSET_1200_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1508E0
+
+// Misc Data
+#define FS_OFFSET_1200_SD_MUTEX            0xE3D3E8
+#define FS_OFFSET_1200_NAND_MUTEX          0xE38768
+#define FS_OFFSET_1200_ACTIVE_PARTITION    0xE387A8
+#define FS_OFFSET_1200_SDMMC_DAS_HANDLE    0xE20DB0
+
+// NOPs
+#define FS_OFFSET_1200_SD_DAS_INIT         0x27244
+
+// Nintendo Paths
+#define FS_OFFSET_1200_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006E810, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007AEC0, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00081254, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00092850, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1200_H__

emummc/source/FS/offsets/1200_exfat.h

@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1200_EXFAT_H__
+#define __FS_1200_EXFAT_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1200_EXFAT_SDMMC_ACCESSOR_GC   0x154FD0
+#define FS_OFFSET_1200_EXFAT_SDMMC_ACCESSOR_SD   0x156DE0
+#define FS_OFFSET_1200_EXFAT_SDMMC_ACCESSOR_NAND 0x155500
+
+// Hooks
+#define FS_OFFSET_1200_EXFAT_SDMMC_WRAPPER_READ  0x150970
+#define FS_OFFSET_1200_EXFAT_SDMMC_WRAPPER_WRITE 0x150A30
+#define FS_OFFSET_1200_EXFAT_RTLD                0x688
+#define FS_OFFSET_1200_EXFAT_RTLD_DESTINATION    ((uintptr_t)(INT64_C(-0x3C)))
+
+#define FS_OFFSET_1200_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x14FCC0
+
+// Misc funcs
+#define FS_OFFSET_1200_EXFAT_LOCK_MUTEX          0x29350
+#define FS_OFFSET_1200_EXFAT_UNLOCK_MUTEX        0x293A0
+
+#define FS_OFFSET_1200_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0x150850
+#define FS_OFFSET_1200_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1508E0
+
+// Misc Data
+#define FS_OFFSET_1200_EXFAT_SD_MUTEX            0xE4B3E8
+#define FS_OFFSET_1200_EXFAT_NAND_MUTEX          0xE46768
+#define FS_OFFSET_1200_EXFAT_ACTIVE_PARTITION    0xE467A8
+#define FS_OFFSET_1200_EXFAT_SDMMC_DAS_HANDLE    0xE2EDB0
+
+// NOPs
+#define FS_OFFSET_1200_EXFAT_SD_DAS_INIT         0x27244
+
+// Nintendo Paths
+#define FS_OFFSET_1200_EXFAT_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006E810, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007AEC0, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00081254, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00092850, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1200_EXFAT_H__

emummc/source/FS/offsets/1203.h

@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ * Copyright (c) 2021 CTCaer
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1203_H__
+#define __FS_1203_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1203_SDMMC_ACCESSOR_GC   0x1550E0
+#define FS_OFFSET_1203_SDMMC_ACCESSOR_SD   0x156EF0
+#define FS_OFFSET_1203_SDMMC_ACCESSOR_NAND 0x155610
+
+// Hooks
+#define FS_OFFSET_1203_SDMMC_WRAPPER_READ  0x150A80
+#define FS_OFFSET_1203_SDMMC_WRAPPER_WRITE 0x150B40
+#define FS_OFFSET_1203_RTLD                0x688
+#define FS_OFFSET_1203_RTLD_DESTINATION    ((uintptr_t)(INT64_C(-0x3C)))
+
+#define FS_OFFSET_1203_CLKRST_SET_MIN_V_CLK_RATE 0x14FDD0
+
+// Misc funcs
+#define FS_OFFSET_1203_LOCK_MUTEX          0x29350
+#define FS_OFFSET_1203_UNLOCK_MUTEX        0x293A0
+
+#define FS_OFFSET_1203_SDMMC_WRAPPER_CONTROLLER_OPEN  0x150960
+#define FS_OFFSET_1203_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1509F0
+
+// Misc Data
+#define FS_OFFSET_1203_SD_MUTEX            0xE3D3E8
+#define FS_OFFSET_1203_NAND_MUTEX          0xE38768
+#define FS_OFFSET_1203_ACTIVE_PARTITION    0xE387A8
+#define FS_OFFSET_1203_SDMMC_DAS_HANDLE    0xE20DB0
+
+// NOPs
+#define FS_OFFSET_1203_SD_DAS_INIT         0x27244
+
+// Nintendo Paths
+#define FS_OFFSET_1203_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006E920, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007AFD0, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00081364, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00092960, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1203_H__

emummc/source/FS/offsets/1203_exfat.h

@@ -0,0 +1,60 @@
+/*
+ * Copyright (c) 2019 m4xw <m4x@m4xw.net>
+ * Copyright (c) 2019 Atmosphere-NX
+ * Copyright (c) 2021 CTCaer
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef __FS_1203_EXFAT_H__
+#define __FS_1203_EXFAT_H__
+
+// Accessor vtable getters
+#define FS_OFFSET_1203_EXFAT_SDMMC_ACCESSOR_GC   0x1550E0
+#define FS_OFFSET_1203_EXFAT_SDMMC_ACCESSOR_SD   0x156EF0
+#define FS_OFFSET_1203_EXFAT_SDMMC_ACCESSOR_NAND 0x155610
+
+// Hooks
+#define FS_OFFSET_1203_EXFAT_SDMMC_WRAPPER_READ  0x150A80
+#define FS_OFFSET_1203_EXFAT_SDMMC_WRAPPER_WRITE 0x150B40
+#define FS_OFFSET_1203_EXFAT_RTLD                0x688
+#define FS_OFFSET_1203_EXFAT_RTLD_DESTINATION    ((uintptr_t)(INT64_C(-0x3C)))
+
+#define FS_OFFSET_1203_EXFAT_CLKRST_SET_MIN_V_CLK_RATE 0x14FDD0
+
+// Misc funcs
+#define FS_OFFSET_1203_EXFAT_LOCK_MUTEX          0x29350
+#define FS_OFFSET_1203_EXFAT_UNLOCK_MUTEX        0x293A0
+
+#define FS_OFFSET_1203_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0x150960
+#define FS_OFFSET_1203_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1509F0
+
+// Misc Data
+#define FS_OFFSET_1203_EXFAT_SD_MUTEX            0xE4B3E8
+#define FS_OFFSET_1203_EXFAT_NAND_MUTEX          0xE46768
+#define FS_OFFSET_1203_EXFAT_ACTIVE_PARTITION    0xE467A8
+#define FS_OFFSET_1203_EXFAT_SDMMC_DAS_HANDLE    0xE2EDB0
+
+// NOPs
+#define FS_OFFSET_1203_EXFAT_SD_DAS_INIT         0x27244
+
+// Nintendo Paths
+#define FS_OFFSET_1203_EXFAT_NINTENDO_PATHS \
+{ \
+	{.opcode_reg = 3, .adrp_offset = 0x0006E920, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 3, .adrp_offset = 0x0007AFD0, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00081364, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 4, .adrp_offset = 0x00092960, .add_rel_offset = 0x00000004}, \
+	{.opcode_reg = 0, .adrp_offset = 0, .add_rel_offset = 0}, \
+}
+
+#endif // __FS_1203_EXFAT_H__

emummc/source/FS/offsets/200.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_200_LOCK_MUTEX          0x3264
 #define FS_OFFSET_200_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_200_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_200_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x733F4
 
 // Misc Data

emummc/source/FS/offsets/200_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_200_EXFAT_LOCK_MUTEX          0x3264
 #define FS_OFFSET_200_EXFAT_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_200_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_200_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x733F4
 
 // Misc Data

emummc/source/FS/offsets/210.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_210_LOCK_MUTEX          0x3264
 #define FS_OFFSET_210_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_210_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_210_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x737D4
 
 // Misc Data

emummc/source/FS/offsets/210_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_210_EXFAT_LOCK_MUTEX          0x3264
 #define FS_OFFSET_210_EXFAT_UNLOCK_MUTEX        0x32D0
 
+#define FS_OFFSET_210_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_210_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x737D4
 
 // Misc Data

emummc/source/FS/offsets/300.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_300_LOCK_MUTEX          0x35CC
 #define FS_OFFSET_300_UNLOCK_MUTEX        0x3638
 
+#define FS_OFFSET_300_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_300_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A270
 
 // Misc Data

emummc/source/FS/offsets/300_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_300_EXFAT_LOCK_MUTEX          0x35CC
 #define FS_OFFSET_300_EXFAT_UNLOCK_MUTEX        0x3638
 
+#define FS_OFFSET_300_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_300_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A270
 
 // Misc Data

emummc/source/FS/offsets/301.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_301_LOCK_MUTEX          0x3638
 #define FS_OFFSET_301_UNLOCK_MUTEX        0x36A4
 
+#define FS_OFFSET_301_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_301_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A32C
 
 // Misc Data

emummc/source/FS/offsets/301_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_301_EXFAT_LOCK_MUTEX          0x3638
 #define FS_OFFSET_301_EXFAT_UNLOCK_MUTEX        0x36A4
 
+#define FS_OFFSET_301_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_301_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x8A32C
 
 // Misc Data

emummc/source/FS/offsets/400.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_400_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_400_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_400_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_400_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DB48
 
 // Misc Data

emummc/source/FS/offsets/400_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_400_EXFAT_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_400_EXFAT_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_400_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_400_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DB48
 
 // Misc Data

emummc/source/FS/offsets/410.h

@@ -34,7 +34,8 @@
 #define FS_OFFSET_410_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_410_UNLOCK_MUTEX        0x3A0C
 
-#define FS_OFFSET_410_SDMMC_WRAPPER_CONTROLLER_CLOSE        0x9DBAC
+#define FS_OFFSET_410_SDMMC_WRAPPER_CONTROLLER_OPEN  0
+#define FS_OFFSET_410_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DBAC
 
 // Misc Data
 #define FS_OFFSET_410_SD_MUTEX            0xE80268

emummc/source/FS/offsets/410_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_410_EXFAT_LOCK_MUTEX          0x39A0
 #define FS_OFFSET_410_EXFAT_UNLOCK_MUTEX        0x3A0C
 
+#define FS_OFFSET_410_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_410_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x9DBAC
 
 // Misc Data

emummc/source/FS/offsets/500.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_500_LOCK_MUTEX          0x4080
 #define FS_OFFSET_500_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_500_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_500_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9380
 
 // Misc Data

emummc/source/FS/offsets/500_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_500_EXFAT_LOCK_MUTEX          0x4080
 #define FS_OFFSET_500_EXFAT_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_500_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_500_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9380
 
 // Misc Data

emummc/source/FS/offsets/510.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_510_LOCK_MUTEX          0x4080
 #define FS_OFFSET_510_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_510_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_510_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9750
 
 // Misc Data

emummc/source/FS/offsets/510_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_510_EXFAT_LOCK_MUTEX          0x4080
 #define FS_OFFSET_510_EXFAT_UNLOCK_MUTEX        0x40D0
 
+#define FS_OFFSET_510_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_510_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0xC9750
 
 // Misc Data

emummc/source/FS/offsets/600.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_600_LOCK_MUTEX          0x1412C0
 #define FS_OFFSET_600_UNLOCK_MUTEX        0x141310
 
+#define FS_OFFSET_600_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_600_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x148500
 
 // Misc Data

emummc/source/FS/offsets/600_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_600_EXFAT_LOCK_MUTEX          0x14C9C0
 #define FS_OFFSET_600_EXFAT_UNLOCK_MUTEX        0x14CA10
 
+#define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_600_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x153C00
 
 // Misc Data

emummc/source/FS/offsets/700.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_700_LOCK_MUTEX          0x148A90
 #define FS_OFFSET_700_UNLOCK_MUTEX        0x148AE0
 
+#define FS_OFFSET_700_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_700_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x14FD50
 
 // Misc Data

emummc/source/FS/offsets/700_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_700_EXFAT_LOCK_MUTEX          0x154040
 #define FS_OFFSET_700_EXFAT_UNLOCK_MUTEX        0x154090
 
+#define FS_OFFSET_700_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_700_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x15B300
 
 // Misc Data

emummc/source/FS/offsets/800.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_800_LOCK_MUTEX          0x14B6D0
 #define FS_OFFSET_800_UNLOCK_MUTEX        0x14B720
 
+#define FS_OFFSET_800_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_800_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1529E0
 
 // Misc Data

emummc/source/FS/offsets/800_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_800_EXFAT_LOCK_MUTEX          0x156C80
 #define FS_OFFSET_800_EXFAT_UNLOCK_MUTEX        0x156CD0
 
+#define FS_OFFSET_800_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_800_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x15DF90
 
 // Misc Data

emummc/source/FS/offsets/810.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_810_LOCK_MUTEX          0x14B6D0
 #define FS_OFFSET_810_UNLOCK_MUTEX        0x14B720
 
+#define FS_OFFSET_810_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_810_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x1529E0
 
 // Misc Data

emummc/source/FS/offsets/810_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_810_EXFAT_LOCK_MUTEX          0x156C80
 #define FS_OFFSET_810_EXFAT_UNLOCK_MUTEX        0x156CD0
 
+#define FS_OFFSET_810_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_810_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x15DF90
 
 // Misc Data

emummc/source/FS/offsets/900.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_900_LOCK_MUTEX          0x25280
 #define FS_OFFSET_900_UNLOCK_MUTEX        0x252D0
 
+#define FS_OFFSET_900_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_900_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x137740
 
 // Misc Data

emummc/source/FS/offsets/900_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_900_EXFAT_LOCK_MUTEX          0x25280
 #define FS_OFFSET_900_EXFAT_UNLOCK_MUTEX        0x252D0
 
+#define FS_OFFSET_900_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_900_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x137740
 
 // Misc Data

emummc/source/FS/offsets/910.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_910_LOCK_MUTEX          0x25280
 #define FS_OFFSET_910_UNLOCK_MUTEX        0x252D0
 
+#define FS_OFFSET_910_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_910_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x137750
 
 // Misc Data

emummc/source/FS/offsets/910_exfat.h

@@ -34,6 +34,7 @@
 #define FS_OFFSET_910_EXFAT_LOCK_MUTEX          0x25280
 #define FS_OFFSET_910_EXFAT_UNLOCK_MUTEX        0x252D0
 
+#define FS_OFFSET_910_EXFAT_SDMMC_WRAPPER_CONTROLLER_OPEN  0
 #define FS_OFFSET_910_EXFAT_SDMMC_WRAPPER_CONTROLLER_CLOSE 0x137750
 
 // Misc Data

emummc/source/emmc/mmc.h

@@ -31,7 +31,7 @@
 #define MMC_ALL_SEND_CID          2   /* bcr                     R2  */
 #define MMC_SET_RELATIVE_ADDR     3   /* ac   [31:16] RCA        R1  */
 #define MMC_SET_DSR               4   /* bc   [31:16] RCA            */
-#define MMC_SLEEP_AWAKE		  5   /* ac   [31:16] RCA 15:flg R1b */
+#define MMC_SLEEP_AWAKE           5   /* ac   [31:16] RCA 15:flg R1b */
 #define MMC_SWITCH                6   /* ac   [31:0] See below   R1b */
 #define MMC_SELECT_CARD           7   /* ac   [31:16] RCA        R1  */
 #define MMC_SEND_EXT_CSD          8   /* adtc                    R1  */
@@ -51,7 +51,7 @@
 #define MMC_READ_SINGLE_BLOCK    17   /* adtc [31:0] data addr   R1  */
 #define MMC_READ_MULTIPLE_BLOCK  18   /* adtc [31:0] data addr   R1  */
 #define MMC_SEND_TUNING_BLOCK    19   /* adtc                    R1  */
-#define MMC_SEND_TUNING_BLOCK_HS200	21	/* adtc R1  */
+#define MMC_SEND_TUNING_BLOCK_HS200 21	/* adtc R1  */
 
 /* class 3 */
 #define MMC_WRITE_DAT_UNTIL_STOP 20   /* adtc [31:0] data addr   R1  */
@@ -136,8 +136,8 @@ c : clear by read
 #define R1_WP_ERASE_SKIP	(1 << 15)	/* sx, c */
 #define R1_CARD_ECC_DISABLED	(1 << 14)	/* sx, a */
 #define R1_ERASE_RESET		(1 << 13)	/* sr, c */
-#define R1_STATUS(x)            (x & 0xFFFFE000)
+#define R1_STATUS(x)            ((x) & 0xFFFFE000)
-#define R1_CURRENT_STATE(x)	((x & 0x00001E00) >> 9)	/* sx, b (4 bits) */
+#define R1_CURRENT_STATE(x)	(((x) & 0x00001E00) >> 9)	/* sx, b (4 bits) */
 #define R1_READY_FOR_DATA	(1 << 8)	/* sx, a */
 #define R1_SWITCH_ERROR		(1 << 7)	/* sx, c */
 #define R1_EXCEPTION_EVENT	(1 << 6)	/* sr, a */

emummc/source/emmc/nx_sd.c

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2019 CTCaer
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "nx_sd.h"
+#include "sdmmc.h"
+#include "sdmmc_driver.h"
+#include "../soc/gpio.h"
+#include "../libs/fatfs/ff.h"
+
+extern sdmmc_t sd_sdmmc;
+extern sdmmc_storage_t sd_storage;
+
+static u32  sd_mode = SD_UHS_SDR104;
+
+u32 nx_sd_mode_get()
+{
+	return sd_mode;
+}
+
+int nx_sd_init_retry(bool power_cycle)
+{
+	u32 bus_width = SDMMC_BUS_WIDTH_4;
+	u32 type = SDHCI_TIMING_UHS_SDR104;
+
+	// Power cycle SD card.
+	if (power_cycle)
+	{
+		sd_mode--;
+		sdmmc_storage_end(&sd_storage);
+	}
+
+	// Get init parameters.
+	switch (sd_mode)
+	{
+	case SD_INIT_FAIL: // Reset to max.
+		return 0;
+	case SD_1BIT_HS25:
+		bus_width = SDMMC_BUS_WIDTH_1;
+		type = SDHCI_TIMING_SD_HS25;
+		break;
+	case SD_4BIT_HS25:
+		type = SDHCI_TIMING_SD_HS25;
+		break;
+	case SD_UHS_SDR82:
+		type = SDHCI_TIMING_UHS_SDR82;
+		break;
+	case SD_UHS_SDR104:
+		type = SDHCI_TIMING_UHS_SDR104;
+		break;
+	default:
+		sd_mode = SD_UHS_SDR104;
+	}
+
+	return sdmmc_storage_init_sd(&sd_storage, &sd_sdmmc, bus_width, type);
+}
+
+bool nx_sd_initialize(bool power_cycle)
+{
+	if (power_cycle)
+		sdmmc_storage_end(&sd_storage);
+
+	int res = !nx_sd_init_retry(false);
+
+	while (true)
+	{
+		if (!res)
+			return true;
+		else
+		{
+			if (sd_mode == SD_INIT_FAIL)
+				break;
+
+			res = !nx_sd_init_retry(true);
+		}
+	}
+
+	return false;
+}

emummc/source/emmc/nx_sd.h

@@ -1,5 +1,6 @@
 /*
- * Copyright (c) 2018-2020 Atmosphère-NX
+ * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2019 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -13,16 +14,23 @@
  * You should have received a copy of the GNU General Public License
  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  */
- 
-#ifndef EXOSPHERE_SC7_H
-#define EXOSPHERE_SC7_H
 
-#include <stdint.h>
+#ifndef NX_SD_H
+#define NX_SD_H
 
-/* Exosphere Deep Sleep Entry implementation. */
+#include "../utils/types.h"
 
-#define LP0_TZRAM_SAVE_SIZE 0xE000
+enum
+{
+	SD_INIT_FAIL  = 0,
+	SD_1BIT_HS25  = 1,
+	SD_4BIT_HS25  = 2,
+	SD_UHS_SDR82  = 3,
+	SD_UHS_SDR104 = 4
+};
 
-uint32_t cpu_suspend(uint64_t power_state, uint64_t entrypoint, uint64_t argument);
+u32  nx_sd_get_mode();
+int  nx_sd_init_retry(bool power_cycle);
+bool nx_sd_initialize(bool power_cycle);
 
 #endif

emummc/source/emmc/sd.h

@@ -1,8 +1,6 @@
 /*
- *  include/linux/mmc/sd.h
+ *  Copyright (c) 2005-2007 Pierre Ossman, All Rights Reserved.
- *
+ *  Copyright (c) 2018 CTCaer
- *  Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
- *  Copyright (C) 2018 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -10,8 +8,8 @@
  * your option) any later version.
  */
 
-#ifndef LINUX_MMC_SD_H
+#ifndef MMC_SD_H
-#define LINUX_MMC_SD_H
+#define MMC_SD_H
 
 /* SD commands                           type  argument     response */
 /* class 0 */
@@ -40,7 +38,9 @@
 #define SD_ROCR_S18A        SD_OCR_S18R  /* 1.8V switching accepted by card */
 #define SD_OCR_XPC          (1 << 28)    /* SDXC power control */
 #define SD_OCR_CCS          (1 << 30)    /* Card Capacity Status */
+#define SD_OCR_VDD_27_34    (0x7F << 15) /* VDD voltage 2.7 ~ 3.4 */
 #define SD_OCR_VDD_32_33    (1 << 20)	 /* VDD voltage 3.2 ~ 3.3 */
+#define SD_OCR_VDD_18       (1 << 7)	 /* VDD voltage 1.8 */
 
 /*
 * SD_SWITCH argument format:
@@ -104,6 +104,11 @@
 #define SD_SET_CURRENT_LIMIT_600	2
 #define SD_SET_CURRENT_LIMIT_800	3
 
+#define SD_MAX_CURRENT_200 (1 << SD_SET_CURRENT_LIMIT_200)
+#define SD_MAX_CURRENT_400 (1 << SD_SET_CURRENT_LIMIT_400)
+#define SD_MAX_CURRENT_600 (1 << SD_SET_CURRENT_LIMIT_600)
+#define SD_MAX_CURRENT_800 (1 << SD_SET_CURRENT_LIMIT_800)
+
 /*
 * SD_SWITCH mode
 */

emummc/source/emmc/sdmmc.h

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
- * Copyright (C) 2018 CTCaer
+ * Copyright (c) 2018-2020 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -54,16 +54,19 @@ typedef struct _mmc_csd
 
 typedef struct _mmc_ext_csd
 {
-	u8  rev;
 	u32 sectors;
 	int bkops;        /* background support bit */
 	int bkops_en;     /* manual bkops enable bit */
+	u8  rev;
 	u8  ext_struct;   /* 194 */
 	u8  card_type;    /* 196 */
 	u8  bkops_status; /* 246 */
-	u16 dev_version;
+	u8  pre_eol_info;
+	u8  dev_life_est_a;
+	u8  dev_life_est_b;
 	u8  boot_mult;
 	u8  rpmb_mult;
+	u16 dev_version;
 } mmc_ext_csd_t;
 
 typedef struct _sd_scr
@@ -81,6 +84,7 @@ typedef struct _sd_ssr
 	u8 uhs_grade;
 	u8 video_class;
 	u8 app_class;
+	u32 protected_size;
 } sd_ssr_t;
 
 /*! SDMMC storage context. */
@@ -95,12 +99,11 @@ typedef struct _sdmmc_storage_t
 	u8  raw_cid[0x10];
 	u8  raw_csd[0x10];
 	u8  raw_scr[8];
-	u8  raw_ssr[0x40];
 	mmc_cid_t     cid;
 	mmc_csd_t     csd;
 	mmc_ext_csd_t ext_csd;
 	sd_scr_t      scr;
-	sd_ssr_t      ssr;
+	int initialized;
 } sdmmc_storage_t;
 
 extern sdmmc_accessor_t *_current_accessor;
@@ -109,9 +112,9 @@ extern bool sdmmc_memcpy_buf;
 int sdmmc_storage_end(sdmmc_storage_t *storage);
 int sdmmc_storage_read(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
 int sdmmc_storage_write(sdmmc_storage_t *storage, u32 sector, u32 num_sectors, void *buf);
-int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type);
+int sdmmc_storage_init_mmc(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
 int sdmmc_storage_set_mmc_partition(sdmmc_storage_t *storage, u32 partition);
-int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 id, u32 bus_width, u32 type);
+int sdmmc_storage_init_sd(sdmmc_storage_t *storage, sdmmc_t *sdmmc, u32 bus_width, u32 type);
 int sdmmc_storage_init_gc(sdmmc_storage_t *storage, sdmmc_t *sdmmc);
 intptr_t sdmmc_calculate_dma_addr(sdmmc_accessor_t *_this, void *buf, unsigned int num_sectors);
 int sdmmc_calculate_dma_index(sdmmc_accessor_t *_this, void *buf, unsigned int num_sectors);

emummc/source/emmc/sdmmc_driver.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2020 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -49,24 +50,158 @@
 #define SDMMC_MASKINT_NOERROR -1
 #define SDMMC_MASKINT_ERROR   -2
 
-/*! SDMMC host control 2 */
+/*! SDMMC present state. */
-#define SDHCI_CTRL_UHS_MASK			0xFFF8
+#define SDHCI_CMD_INHIBIT      0x1
-#define SDHCI_CTRL_VDD_330			0xFFF7
+#define SDHCI_DATA_INHIBIT     0x2
-#define SDHCI_CTRL_VDD_180			8
+#define SDHCI_DOING_WRITE      0x100
-#define SDHCI_CTRL_EXEC_TUNING		0x40
+#define SDHCI_DOING_READ       0x200
-#define SDHCI_CTRL_TUNED_CLK		0x80
+#define SDHCI_SPACE_AVAILABLE  0x400
-#define SDHCI_HOST_VERSION_4_EN		0x1000
+#define SDHCI_DATA_AVAILABLE   0x800
-#define SDHCI_ADDRESSING_64BIT_EN	0x2000
+#define SDHCI_CARD_PRESENT     0x10000
-#define SDHCI_CTRL_PRESET_VAL_EN	0x8000
+#define SDHCI_CD_STABLE        0x20000
+#define SDHCI_CD_LVL           0x40000
+#define SDHCI_WRITE_PROTECT    0x80000
+#define SDHCI_DATA_LVL_MASK    0xF00000
+#define  SDHCI_DATA_0_LVL_MASK 0x100000
+#define SDHCI_CMD_LVL          0x1000000
+
+/*! SDMMC transfer mode. */
+#define SDHCI_TRNS_DMA        0x01
+#define SDHCI_TRNS_BLK_CNT_EN 0x02
+#define SDHCI_TRNS_AUTO_CMD12 0x04
+#define SDHCI_TRNS_AUTO_CMD23 0x08
+#define SDHCI_TRNS_AUTO_SEL   0x0C
+#define SDHCI_TRNS_WRITE      0x00
+#define SDHCI_TRNS_READ       0x10
+#define SDHCI_TRNS_MULTI      0x20
+
+/*! SDMMC command. */
+#define SDHCI_CMD_RESP_MASK       0x3
+#define SDHCI_CMD_RESP_NO_RESP    0x0
+#define SDHCI_CMD_RESP_LEN136     0x1
+#define SDHCI_CMD_RESP_LEN48      0x2
+#define SDHCI_CMD_RESP_LEN48_BUSY 0x3
+#define SDHCI_CMD_CRC       0x08
+#define SDHCI_CMD_INDEX     0x10
+#define SDHCI_CMD_DATA      0x20
+#define SDHCI_CMD_ABORTCMD  0xC0
+
+/*! SDMMC host control. */
+#define SDHCI_CTRL_LED        0x01
+#define SDHCI_CTRL_4BITBUS    0x02
+#define SDHCI_CTRL_HISPD      0x04
+#define SDHCI_CTRL_DMA_MASK   0x18
+#define  SDHCI_CTRL_SDMA      0x00
+#define  SDHCI_CTRL_ADMA1     0x08
+#define  SDHCI_CTRL_ADMA32    0x10
+#define  SDHCI_CTRL_ADMA64    0x18
+#define  SDHCI_CTRL_8BITBUS   0x20
+#define SDHCI_CTRL_CDTEST_INS 0x40
+#define SDHCI_CTRL_CDTEST_EN  0x80
+
+/*! SDMMC host control 2. */
+#define SDHCI_CTRL_UHS_MASK       0xFFF8
+#define SDHCI_CTRL_VDD_180        8
+#define SDHCI_CTRL_DRV_TYPE_B     0x00
+#define SDHCI_CTRL_DRV_TYPE_A     0x10
+#define SDHCI_CTRL_DRV_TYPE_C     0x20
+#define SDHCI_CTRL_DRV_TYPE_D     0x30
+#define SDHCI_CTRL_EXEC_TUNING    0x40
+#define SDHCI_CTRL_TUNED_CLK      0x80
+#define SDHCI_HOST_VERSION_4_EN   0x1000
+#define SDHCI_ADDRESSING_64BIT_EN 0x2000
+#define SDHCI_CTRL_PRESET_VAL_EN  0x8000
+
+/*! SDMMC power control. */
+#define SDHCI_POWER_ON   0x01
+#define SDHCI_POWER_180  0x0A
+#define SDHCI_POWER_300  0x0C
+#define SDHCI_POWER_330  0x0E
+#define SDHCI_POWER_MASK 0xF1
+
+// /*! SDMMC max current. */
+// #define SDHCI_MAX_CURRENT_330_MASK   0xFF
+// #define SDHCI_MAX_CURRENT_180_MASK   0xFF0000
+// #define SDHCI_MAX_CURRENT_MULTIPLIER 4
+
+/*! SDMMC clock control. */
+#define SDHCI_DIVIDER_SHIFT    8
+#define SDHCI_DIVIDER_HI_SHIFT 6
+#define SDHCI_DIV_MASK         0xFF00
+#define SDHCI_DIV_HI_MASK      0xC0
+#define SDHCI_PROG_CLOCK_MODE  0x20
+#define SDHCI_CLOCK_CARD_EN    0x4
+#define SDHCI_CLOCK_INT_STABLE 0x2
+#define SDHCI_CLOCK_INT_EN     0x1
+
+/*! SDMMC software reset. */
+#define SDHCI_RESET_ALL  0x01
+#define SDHCI_RESET_CMD  0x02
+#define SDHCI_RESET_DATA 0x04
+
+/*! SDMMC interrupt status and control. */
+#define SDHCI_INT_RESPONSE     0x1
+#define SDHCI_INT_DATA_END     0x2
+#define SDHCI_INT_BLK_GAP      0x4
+#define SDHCI_INT_DMA_END      0x8
+#define SDHCI_INT_SPACE_AVAIL  0x10
+#define SDHCI_INT_DATA_AVAIL   0x20
+#define SDHCI_INT_CARD_INSERT  0x40
+#define SDHCI_INT_CARD_REMOVE  0x80
+#define SDHCI_INT_CARD_INT     0x100
+#define SDHCI_INT_RETUNE       0x1000
+#define SDHCI_INT_CQE          0x4000
+#define SDHCI_INT_ERROR        0x8000
+
+/*! SDMMC error interrupt status and control. */
+#define SDHCI_ERR_INT_TIMEOUT      0x1
+#define SDHCI_ERR_INT_CRC          0x2
+#define SDHCI_ERR_INT_END_BIT      0x4
+#define SDHCI_ERR_INT_INDEX        0x8
+#define SDHCI_ERR_INT_DATA_TIMEOUT 0x10
+#define SDHCI_ERR_INT_DATA_CRC     0x20
+#define SDHCI_ERR_INT_DATA_END_BIT 0x40
+#define SDHCI_ERR_INT_BUS_POWER    0x80
+#define SDHCI_ERR_INT_AUTO_CMD_ERR 0x100
+#define SDHCI_ERR_INT_ADMA_ERROR   0x200
+
+#define SDHCI_ERR_INT_ALL_EXCEPT_ADMA_BUSPWR \
+	(SDHCI_ERR_INT_AUTO_CMD_ERR | SDHCI_ERR_INT_DATA_END_BIT | \
+	 SDHCI_ERR_INT_DATA_CRC | SDHCI_ERR_INT_DATA_TIMEOUT | \
+	 SDHCI_ERR_INT_INDEX | SDHCI_ERR_INT_END_BIT | \
+	 SDHCI_ERR_INT_CRC | SDHCI_ERR_INT_TIMEOUT)
 
 /*! SD bus speeds. */
-#define UHS_SDR12_BUS_SPEED		0
+#define UHS_SDR12_BUS_SPEED  0
-#define HIGH_SPEED_BUS_SPEED	1
+#define HIGH_SPEED_BUS_SPEED 1
-#define UHS_SDR25_BUS_SPEED		1
+#define UHS_SDR25_BUS_SPEED  1
-#define UHS_SDR50_BUS_SPEED		2
+#define UHS_SDR50_BUS_SPEED  2
-#define UHS_SDR104_BUS_SPEED	3
+#define UHS_SDR104_BUS_SPEED 3
-#define UHS_DDR50_BUS_SPEED		4
+#define UHS_DDR50_BUS_SPEED  4
-#define HS400_BUS_SPEED 		5
+#define HS400_BUS_SPEED      5
+
+/*! SDMMC timmings. */
+#define SDHCI_TIMING_MMC_ID     0
+#define SDHCI_TIMING_MMC_LS26   1
+#define SDHCI_TIMING_MMC_HS52   2
+#define SDHCI_TIMING_MMC_HS200  3
+#define SDHCI_TIMING_MMC_HS400  4
+#define SDHCI_TIMING_SD_ID      5
+#define SDHCI_TIMING_SD_DS12    6
+#define SDHCI_TIMING_SD_HS25    7
+#define SDHCI_TIMING_UHS_SDR12  8
+#define SDHCI_TIMING_UHS_SDR25  9
+#define SDHCI_TIMING_UHS_SDR50  10
+#define SDHCI_TIMING_UHS_SDR104 11
+#define SDHCI_TIMING_UHS_SDR82  12 // SDR104 with a 163.2MHz -> 81.6MHz clock.
+#define SDHCI_TIMING_UHS_DDR50  13
+#define SDHCI_TIMING_MMC_HS102  14
+
+#define SDHCI_CAN_64BIT 0x10000000
+
+/*! SDMMC Low power features. */
+#define SDMMC_POWER_SAVE_DISABLE 0
+#define SDMMC_POWER_SAVE_ENABLE  1
 
 /*! Helper for SWITCH command argument. */
 #define SDMMC_SWITCH(mode, index, value) (((mode) << 24) | ((index) << 16) | ((value) << 8))
@@ -78,8 +213,9 @@ typedef struct _sdmmc_t
 	u32 id;
 	u32 divisor;
 	u32 clock_stopped;
-	int no_sd;
+	int powersave_enabled;
-	int sd_clock_enabled;
+	int manual_cal;
+	int card_clock_enabled;
 	int venclkctl_set;
 	u32 venclkctl_tap;
 	u32 expected_rsp_type;
@@ -87,6 +223,7 @@ typedef struct _sdmmc_t
 	u64 dma_addr_next;
 	u32 rsp[4];
 	u32 rsp3;
+	int t210b01;
 } sdmmc_t;
 
 /*! SDMMC command. */
@@ -109,19 +246,21 @@ typedef struct _sdmmc_req_t
 	int is_auto_cmd12;
 } sdmmc_req_t;
 
-int sdmmc_get_voltage(sdmmc_t *sdmmc);
+int  sdmmc_get_io_power(sdmmc_t *sdmmc);
-u32 sdmmc_get_bus_width(sdmmc_t *sdmmc);
+u32  sdmmc_get_bus_width(sdmmc_t *sdmmc);
 void sdmmc_set_bus_width(sdmmc_t *sdmmc, u32 bus_width);
-void sdmmc_get_venclkctl(sdmmc_t *sdmmc);
+void sdmmc_save_tap_value(sdmmc_t *sdmmc);
-int sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type);
+int  sdmmc_setup_clock(sdmmc_t *sdmmc, u32 type);
-void sdmmc_sd_clock_ctrl(sdmmc_t *sdmmc, int no_sd);
+void sdmmc_card_clock_powersave(sdmmc_t *sdmmc, int powersave_enable);
-int sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type);
+int  sdmmc_get_rsp(sdmmc_t *sdmmc, u32 *rsp, u32 size, u32 type);
-int sdmmc_config_tuning(sdmmc_t *sdmmc, u32 type, u32 cmd);
+int  sdmmc_tuning_execute(sdmmc_t *sdmmc, u32 type, u32 cmd);
-int sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp);
+int  sdmmc_stop_transmission(sdmmc_t *sdmmc, u32 *rsp);
-int sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int no_sd);
+int  sdmmc_get_sd_power_enabled();
+bool sdmmc_get_sd_inserted();
+int  sdmmc_init(sdmmc_t *sdmmc, u32 id, u32 power, u32 bus_width, u32 type, int powersave_enable);
 void sdmmc_end(sdmmc_t *sdmmc);
 void sdmmc_init_cmd(sdmmc_cmd_t *cmdbuf, u16 cmd, u32 arg, u32 rsp_type, u32 check_busy);
-int sdmmc_execute_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out);
+int  sdmmc_execute_cmd(sdmmc_t *sdmmc, sdmmc_cmd_t *cmd, sdmmc_req_t *req, u32 *blkcnt_out);
-int sdmmc_enable_low_voltage(sdmmc_t *sdmmc);
+int  sdmmc_enable_low_voltage(sdmmc_t *sdmmc);
 
 #endif

emummc/source/emmc/sdmmc_t210.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2019 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -19,49 +20,14 @@
 
 #include "../utils/types.h"
 
-#define TEGRA_MMC_PWRCTL_SD_BUS_POWER 0x1
+#define TEGRA_MMC_VNDR_TUN_CTRL0_TAP_VAL_UPDATED_BY_HW 0x20000
-#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V1_8 0xA
+#define TEGRA_MMC_DLLCAL_CFG_EN_CALIBRATE 0x80000000
-#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_0 0xC
+#define TEGRA_MMC_DLLCAL_CFG_STATUS_DLL_ACTIVE 0x80000000
-#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_V3_3 0xE
+#define TEGRA_MMC_SDMEMCOMPPADCTRL_PAD_E_INPUT_PWRD 0x80000000
-#define TEGRA_MMC_PWRCTL_SD_BUS_VOLTAGE_MASK 0xF1
+#define TEGRA_MMC_SDMEMCOMPPADCTRL_COMP_VREF_SEL_MASK 0xFFFFFFF0
-
+#define TEGRA_MMC_AUTOCALCFG_AUTO_CAL_ENABLE 0x20000000
-#define TEGRA_MMC_HOSTCTL_1BIT 0x00
+#define TEGRA_MMC_AUTOCALCFG_AUTO_CAL_START 0x80000000
-#define TEGRA_MMC_HOSTCTL_4BIT 0x02
+#define TEGRA_MMC_AUTOCALSTS_AUTO_CAL_ACTIVE 0x80000000
-#define TEGRA_MMC_HOSTCTL_8BIT 0x20
-
-#define TEGRA_MMC_CLKCON_INTERNAL_CLOCK_ENABLE 0x1
-#define TEGRA_MMC_CLKCON_INTERNAL_CLOCK_STABLE 0x2
-#define TEGRA_MMC_CLKCON_SD_CLOCK_ENABLE 0x4
-#define TEGRA_MMC_CLKCON_CLKGEN_SELECT 0x20
-
-#define TEGRA_MMC_SWRST_SW_RESET_FOR_ALL 0x1
-#define TEGRA_MMC_SWRST_SW_RESET_FOR_CMD_LINE 0x2
-#define TEGRA_MMC_SWRST_SW_RESET_FOR_DAT_LINE 0x4
-
-#define TEGRA_MMC_TRNMOD_DMA_ENABLE 0x1
-#define TEGRA_MMC_TRNMOD_BLOCK_COUNT_ENABLE 0x2
-#define TEGRA_MMC_TRNMOD_AUTO_CMD12 0x4
-#define TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_WRITE 0x0
-#define TEGRA_MMC_TRNMOD_DATA_XFER_DIR_SEL_READ 0x10
-#define TEGRA_MMC_TRNMOD_MULTI_BLOCK_SELECT 0x20
-
-#define TEGRA_MMC_TRNMOD_CMD_CRC_CHECK 0x8
-#define TEGRA_MMC_TRNMOD_CMD_INDEX_CHECK 0x10
-#define TEGRA_MMC_TRNMOD_DATA_PRESENT_SELECT_DATA_TRANSFER 0x20
-
-#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_MASK 0x3
-#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_NO_RESPONSE 0x0
-#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_136 0x1
-#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48 0x2
-#define TEGRA_MMC_CMDREG_RESP_TYPE_SELECT_LENGTH_48_BUSY 0x3
-
-#define TEGRA_MMC_NORINTSTS_CMD_COMPLETE 0x1
-#define TEGRA_MMC_NORINTSTS_XFER_COMPLETE 0x2
-#define TEGRA_MMC_NORINTSTS_DMA_INTERRUPT 0x8
-#define TEGRA_MMC_NORINTSTS_ERR_INTERRUPT 0x8000
-#define TEGRA_MMC_NORINTSTS_CMD_TIMEOUT 0x10000
-
-#define TEGRA_MMC_NORINTSTSEN_BUFFER_READ_READY 0x20
 
 typedef struct _t210_sdmmc_t
 {
@@ -77,56 +43,67 @@ typedef struct _t210_sdmmc_t
 	vu32 rspreg3;
 	vu32 bdata;
 	vu32 prnsts;
-	vu8 hostctl;
+	vu8  hostctl;
-	vu8 pwrcon;
+	vu8  pwrcon;
-	vu8 blkgap;
+	vu8  blkgap;
-	vu8 wakcon;
+	vu8  wakcon;
 	vu16 clkcon;
-	vu8 timeoutcon;
+	vu8  timeoutcon;
-	vu8 swrst;
+	vu8  swrst;
 	vu16 norintsts;
 	vu16 errintsts;
-	vu16 norintstsen;
+	vu16 norintstsen; // Enable irq status.
-	vu16 errintstsen;
+	vu16 errintstsen; // Enable irq status.
-	vu16 norintsigen;
+	vu16 norintsigen; // Enable irq signal to LIC/GIC.
-	vu16 errintsigen;
+	vu16 errintsigen; // Enable irq signal to LIC/GIC.
 	vu16 acmd12errsts;
 	vu16 hostctl2;
 	vu32 capareg;
 	vu32 capareg_1;
 	vu32 maxcurr;
-	vu8 res3[4];
+	vu8  rsvd0[4]; // 4C-4F reserved for more max current.
 	vu16 setacmd12err;
 	vu16 setinterr;
-	vu8 admaerr;
+	vu8  admaerr;
-	vu8 res4[3];
+	vu8  rsvd1[3]; // 55-57 reserved.
 	vu32 admaaddr;
 	vu32 admaaddr_hi;
-	vu8 res5[156];
+	vu8  rsvd2[156]; // 60-FB reserved.
-	vu16 slotintstatus;
+	vu16 slotintsts;
 	vu16 hcver;
 	vu32 venclkctl;
-	vu32 venspictl;
+	vu32 vensysswctl;
-	vu32 venspiintsts;
+	vu32 venerrintsts;
-	vu32 venceatactl;
+	vu32 vencapover;
 	vu32 venbootctl;
 	vu32 venbootacktout;
 	vu32 venbootdattout;
 	vu32 vendebouncecnt;
 	vu32 venmiscctl;
-	vu32 res6[34];
+	vu32 maxcurrover;
+	vu32 maxcurrover_hi;
+	vu32 unk0[32]; // 0x12C
 	vu32 veniotrimctl;
-	vu32 vendllcal;
+	vu32 vendllcalcfg;
-	vu8 res7[8];
+	vu32 vendllctl0;
-	vu32 dllcfgstatus;
+	vu32 vendllctl1;
+	vu32 vendllcalcfgsts;
 	vu32 ventunctl0;
-	vu32 field_1C4;
+	vu32 ventunctl1;
-	vu8 field_1C8[24];
+	vu32 ventunsts0;
+	vu32 ventunsts1;
+	vu32 venclkgatehystcnt;
+	vu32 venpresetval0;
+	vu32 venpresetval1;
+	vu32 venpresetval2;
 	vu32 sdmemcmppadctl;
 	vu32 autocalcfg;
 	vu32 autocalintval;
 	vu32 autocalsts;
 	vu32 iospare;
+	vu32 mcciffifoctl;
+	vu32 timeoutwcoal;
+	vu32 unk1;
 } t210_sdmmc_t;
 
 #endif

emummc/source/emuMMC/emummc.c

@@ -18,14 +18,12 @@
 
 #include <stdlib.h>
 
-#include "../soc/gpio.h"
-#include "../utils/fatal.h"
-#include "../libs/fatfs/diskio.h"
 #include "emummc.h"
 #include "emummc_ctx.h"
+#include "../utils/fatal.h"
+#include "../libs/fatfs/diskio.h"
 
 static bool sdmmc_first_init = false;
-static bool storageMMCinitialized = false;
 static bool storageSDinitialized = false;
 
 // hekate sdmmmc vars
@@ -35,6 +33,7 @@ sdmmc_t sd_sdmmc;
 sdmmc_storage_t sd_storage;
 
 // init vars
+bool init_done = false;
 bool custom_driver = true;
 
 // FS funcs
@@ -51,8 +50,8 @@ volatile int *active_partition;
 volatile Handle *sdmmc_das_handle;
 
 // FatFS
+file_based_ctxt f_emu;
 static bool fat_mounted = false;
-static file_based_ctxt f_emu;
 
 static void _sdmmc_ensure_device_attached(void)
 {
@@ -68,8 +67,6 @@ static void _sdmmc_ensure_device_attached(void)
 
 static void _sdmmc_ensure_initialized(void)
 {
-    static bool init_done = false;
-
     // First Initial init
     if (!sdmmc_first_init)
     {
@@ -78,10 +75,11 @@ static void _sdmmc_ensure_initialized(void)
     }
     else
     {
-        // The boot sysmodule will eventually kill power to SD. Detect this, and reinitialize when it happens.
+        // The boot sysmodule will eventually kill power to SD.
+        // Detect this, and reinitialize when it happens.
         if (!init_done)
         {
-            if (gpio_read(GPIO_PORT_E, GPIO_PIN_4) == 0)
+            if (sdmmc_get_sd_power_enabled() == 0)
             {
                 sdmmc_finalize();
                 sdmmc_initialize();
@@ -118,8 +116,6 @@ static void _file_based_emmc_finalize(void)
 
 void sdmmc_finalize(void)
 {
-    _file_based_emmc_finalize();
-
     if (!sdmmc_storage_end(&sd_storage))
     {
         fatal_abort(Fatal_InitSD);
@@ -132,7 +128,6 @@ static void _file_based_emmc_initialize(void)
 {
     char path[sizeof(emuMMC_ctx.storagePath) + 0x20];
     memset(&path, 0, sizeof(path));
-    memset(&f_emu, 0, sizeof(file_based_ctxt));
 
     memcpy(path, (void *)emuMMC_ctx.storagePath, sizeof(emuMMC_ctx.storagePath));
     strcat(path, "/eMMC/");
@@ -141,18 +136,24 @@ static void _file_based_emmc_initialize(void)
     // Open BOOT0 physical partition.
     memcpy(path + path_len, "BOOT0", 6);
     if (f_open(&f_emu.fp_boot0, path, FA_READ | FA_WRITE) != FR_OK)
-        fatal_abort(Fatal_InitSD);
+        fatal_abort(Fatal_FatfsFileOpen);
+    if (!f_expand_cltbl(&f_emu.fp_boot0, 0x400, f_emu.clmt_boot0, f_size(&f_emu.fp_boot0)))
+        fatal_abort(Fatal_FatfsMemExhaustion);
 
     // Open BOOT1 physical partition.
     memcpy(path + path_len, "BOOT1", 6);
     if (f_open(&f_emu.fp_boot1, path, FA_READ | FA_WRITE) != FR_OK)
-        fatal_abort(Fatal_InitSD);
+        fatal_abort(Fatal_FatfsFileOpen);
+    if (!f_expand_cltbl(&f_emu.fp_boot1, 0x400, f_emu.clmt_boot1, f_size(&f_emu.fp_boot1)))
+        fatal_abort(Fatal_FatfsMemExhaustion);
 
     // Open handles for GPP physical partition files.
     _file_based_update_filename(path, path_len, 00);
 
     if (f_open(&f_emu.fp_gpp[0], path, FA_READ | FA_WRITE) != FR_OK)
-        fatal_abort(Fatal_InitSD);
+        fatal_abort(Fatal_FatfsFileOpen);
+    if (!f_expand_cltbl(&f_emu.fp_gpp[0], 0x400, &f_emu.clmt_gpp[0], f_size(&f_emu.fp_gpp[0])))
+        fatal_abort(Fatal_FatfsMemExhaustion);
 
     f_emu.part_size = f_size(&f_emu.fp_gpp[0]) >> 9;
 
@@ -171,38 +172,27 @@ static void _file_based_emmc_initialize(void)
 
             return;
         }
+
+        if (!f_expand_cltbl(&f_emu.fp_gpp[f_emu.parts], 0x400, &f_emu.clmt_gpp[f_emu.parts * 0x400], f_size(&f_emu.fp_gpp[f_emu.parts])))
+            fatal_abort(Fatal_FatfsMemExhaustion);
     }
 }
 
 bool sdmmc_initialize(void)
 {
-    if (!storageMMCinitialized)
-    {
-        if (sdmmc_storage_init_mmc(&storage, &sdmmc, SDMMC_4, SDMMC_BUS_WIDTH_8, 4))
-        {
-            if (sdmmc_storage_set_mmc_partition(&storage, FS_EMMC_PARTITION_GPP))
-                storageMMCinitialized = true;
-        }
-        else
-        {
-            fatal_abort(Fatal_InitMMC);
-        }
-    }
-
     if (!storageSDinitialized)
     {
-        int retries = 5;
+        int retries = 3;
         while (retries)
         {
-            if (sdmmc_storage_init_sd(&sd_storage, &sd_sdmmc, SDMMC_1, SDMMC_BUS_WIDTH_4, 11))
+            if (nx_sd_initialize(false))
             {
                 storageSDinitialized = true;
 
                 // File based emummc.
                 if ((emuMMC_ctx.EMMC_Type == emuMMC_SD_File) && !fat_mounted)
                 {
-                    f_emu.sd_fs = (FATFS *)malloc(sizeof(FATFS));
+                    if (f_mount(&f_emu.sd_fs, "", 1) != FR_OK)
-                    if (f_mount(f_emu.sd_fs, "", 1) != FR_OK)
                         fatal_abort(Fatal_InitSD);
                     else
                         fat_mounted = true;
@@ -214,7 +204,6 @@ bool sdmmc_initialize(void)
             }
 
             retries--;
-            msleep(100);
         }
 
         if (!storageSDinitialized)
@@ -223,7 +212,7 @@ bool sdmmc_initialize(void)
         }
     }
 
-    return storageMMCinitialized && storageSDinitialized;
+    return storageSDinitialized;
 }
 
 sdmmc_accessor_t *sdmmc_accessor_get(int mmc_id)
@@ -282,7 +271,7 @@ int sdmmc_nand_get_active_partition_index()
 
 static uint64_t emummc_read_write_inner(void *buf, unsigned int sector, unsigned int num_sectors, bool is_write)
 {
-    if ((emuMMC_ctx.EMMC_Type == emuMMC_SD))
+    if ((emuMMC_ctx.EMMC_Type == emuMMC_SD_Raw))
     {
         // raw partition sector offset: emuMMC_ctx.EMMC_StoragePartitionOffset.
         sector += emuMMC_ctx.EMMC_StoragePartitionOffset;
@@ -295,42 +284,95 @@ static uint64_t emummc_read_write_inner(void *buf, unsigned int sector, unsigned
     }
 
     // File based emummc.
-    FIL *fp_tmp = NULL;
+    FIL *fp = NULL;
     switch (*active_partition)
     {
     case FS_EMMC_PARTITION_GPP:
         if (f_emu.parts)
         {
-            fp_tmp = &f_emu.fp_gpp[sector / f_emu.part_size];
+            fp = &f_emu.fp_gpp[sector / f_emu.part_size];
             sector = sector % f_emu.part_size;
+
+            // Special handling for reads/writes which cross file-boundaries.
+            if (__builtin_expect(sector + num_sectors > f_emu.part_size, 0))
+            {
+                unsigned int remaining = num_sectors;
+                while (remaining > 0) {
+                    const unsigned int cur_sectors = MIN(remaining, f_emu.part_size - sector);
+
+                    if (f_lseek(fp, (u64)sector << 9) != FR_OK)
+                        return 0; // Out of bounds.
+
+                    if (is_write)
+                    {
+                        if (f_write_fast(fp, buf, (u64)cur_sectors << 9) != FR_OK)
+                            return 0;
+                    }
+                    else
+                    {
+                        if (f_read_fast(fp, buf, (u64)cur_sectors << 9) != FR_OK)
+                            return 0;
+                    }
+
+                    buf = (char *)buf + ((u64)cur_sectors << 9);
+                    remaining -= cur_sectors;
+                    sector = 0;
+                    ++fp;
+                }
+
+                return 1;
+            }
         }
         else
         {
-            fp_tmp = &f_emu.fp_gpp[0];
+            fp = &f_emu.fp_gpp[0];
         }
         break;
     case FS_EMMC_PARTITION_BOOT1:
-        fp_tmp = &f_emu.fp_boot1;
+        fp = &f_emu.fp_boot1;
         break;
     case FS_EMMC_PARTITION_BOOT0:
-        fp_tmp = &f_emu.fp_boot0;
+        fp = &f_emu.fp_boot0;
         break;
     }
 
-    if (f_lseek(fp_tmp, sector << 9) != FR_OK)
+    if (f_lseek(fp, (u64)sector << 9) != FR_OK)
-    {
+        return 0; // Out of bounds.
-        ; //TODO. Out of range. close stuff and fatal?
-    }
 
     uint64_t res = 0;
     if (!is_write)
-        res = !(f_read(fp_tmp, buf, num_sectors << 9, NULL));
+        res = !f_read_fast(fp, buf, (u64)num_sectors << 9);
     else
-        res = !(f_write(fp_tmp, buf, num_sectors << 9, NULL));
+        res = !f_write_fast(fp, buf, (u64)num_sectors << 9);
 
     return res;
 }
 
+// Controller open wrapper
+uint64_t sdmmc_wrapper_controller_open(int mmc_id)
+{
+    uint64_t result;
+    sdmmc_accessor_t *_this;
+    _this = sdmmc_accessor_get(mmc_id);
+
+    if (_this != NULL)
+    {
+        // Lock eMMC xfer while SD card is being initialized by FS.
+        if (mmc_id == FS_SDMMC_SD)
+            mutex_lock_handler(FS_SDMMC_EMMC); // Recursive Mutex, handler will lock SD as well if custom_driver
+
+        result = _this->vtab->sdmmc_accessor_controller_open(_this);
+
+        // Unlock eMMC.
+        if (mmc_id == FS_SDMMC_SD)
+            mutex_unlock_handler(FS_SDMMC_EMMC);
+
+        return result;
+    }
+
+    fatal_abort(Fatal_OpenAccessor);
+}
+
 // Controller close wrapper
 uint64_t sdmmc_wrapper_controller_close(int mmc_id)
 {
@@ -402,15 +444,18 @@ uint64_t sdmmc_wrapper_read(void *buf, uint64_t bufSize, int mmc_id, unsigned in
             if (first_sd_read)
             {
                 first_sd_read = false;
-                // Because some SD cards have issues with emuMMC's driver
+                if (emuMMC_ctx.EMMC_Type == emuMMC_SD_Raw)
-                // we currently swap to FS's driver after first SD read
+                {
-                // TODO: Fix remaining driver issues
+                    // Because some SD cards have issues with emuMMC's driver
-                custom_driver = false;
+                    // we currently swap to FS's driver after first SD read
-                // FS will handle sd mutex w/o custom driver from here on
+                    // for raw based emuMMC
-                unlock_mutex(sd_mutex);
+                    custom_driver = false;
+                    // FS will handle sd mutex w/o custom driver from here on
+                    unlock_mutex(sd_mutex);
+                }
             }
 
-            // Call hekates driver.
+            // Call hekate's driver.
             if (sdmmc_storage_read(&sd_storage, sector, num_sectors, buf))
             {
                 mutex_unlock_handler(mmc_id);

emummc/source/emuMMC/emummc.h

@@ -28,6 +28,7 @@ extern "C" {
 #include <stdio.h>
 #include <string.h>
 
+#include "../emmc/nx_sd.h"
 #include "../emmc/sdmmc.h"
 #include "../soc/i2c.h"
 #include "../soc/gpio.h"
@@ -51,19 +52,22 @@ void mutex_lock_handler(int mmc_id);
 void mutex_unlock_handler(int mmc_id);
 
 // Hooks
+uint64_t sdmmc_wrapper_controller_open(int mmc_id);
 uint64_t sdmmc_wrapper_controller_close(int mmc_id);
 uint64_t sdmmc_wrapper_read(void *buf, uint64_t bufSize, int mmc_id, unsigned int sector, unsigned int num_sectors);
 uint64_t sdmmc_wrapper_write(int mmc_id, unsigned int sector, unsigned int num_sectors, void *buf, uint64_t bufSize);
 
-// TODO: check if FatFS internal buffers are good (perf wise) to have a x16 alignment.
 typedef struct _file_based_ctxt
 {
+	FATFS sd_fs;
 	uint64_t parts;
 	uint64_t part_size;
-	FATFS *sd_fs;
 	FIL fp_boot0;
+	DWORD clmt_boot0[0x400];
 	FIL fp_boot1;
+	DWORD clmt_boot1[0x400];
 	FIL fp_gpp[32];
+	DWORD clmt_gpp[0x8000];
 } file_based_ctxt;
 
 #ifdef __cplusplus

emummc/source/emuMMC/emummc_ctx.h

@@ -30,7 +30,7 @@ enum emuMMC_Type
     emuMMC_EMMC = 0,
 
     // SD Device raw
-    emuMMC_SD,
+    emuMMC_SD_Raw,
     // SD Device File
     emuMMC_SD_File,
 
@@ -44,7 +44,7 @@ typedef struct _emuMMC_ctx_t
     enum FS_VER fs_ver;
     enum emuMMC_Type EMMC_Type;
     enum emuMMC_Type SD_Type;
-    
+
     /* Partition based */
     u64 EMMC_StoragePartitionOffset;
     u64 SD_StoragePartitionOffset;

emummc/source/libs/fatfs/ff.c

@@ -1,10 +1,25 @@
+/*
+ * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2019 CTCaer
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
 /*----------------------------------------------------------------------------/
-/  FatFs - Generic FAT Filesystem Module  R0.13c (p3)                         /
+/  FatFs - Generic FAT Filesystem Module  R0.13c (p4)                         /
 /-----------------------------------------------------------------------------/
 /
 / Copyright (C) 2018, ChaN, all right reserved.
-/ Copyright (c) 2018 naehrwert
-/ Copyright (C) 2018-2019 CTCaer
 /
 / FatFs module is an open source software. Redistribution and use of FatFs in
 / source and binary forms, with or without modification, are permitted provided
@@ -515,7 +530,7 @@ static WCHAR LfnBuf[FF_MAX_LFN + 1];		/* LFN working buffer */
 #define FREE_NAMBUF()	ff_memfree(lfn)
 #endif
 #define LEAVE_MKFS(res)	{ if (!work) ff_memfree(buf); return res; }
-#define MAX_MALLOC	0x8000	/* Must be >=FF_MAX_SS */
+#define MAX_MALLOC	0x4000	/* Must be >=FF_MAX_SS */
 
 #else
 #error Wrong setting of FF_USE_LFN
@@ -3879,6 +3894,109 @@ FRESULT f_read (
 
 
 
+#ifdef FF_FASTFS
+/*-----------------------------------------------------------------------*/
+/* Fast Read Aligned Sized File Without a Cache                         */
+/*-----------------------------------------------------------------------*/
+#if FF_USE_FASTSEEK
+FRESULT f_read_fast (
+	FIL* fp,			/* Pointer to the file object */
+	const void* buff,	/* Pointer to the data to be written */
+	UINT btr			/* Number of bytes to read */
+)
+{
+	FRESULT res;
+	FATFS *fs;
+	UINT csize_bytes;
+	DWORD clst;
+	DWORD wbytes;
+	UINT count;
+	FSIZE_t work_sector = 0;
+	FSIZE_t sector_base = 0;
+	BYTE *wbuff = (BYTE*)buff;
+
+	res = validate(&fp->obj, &fs);			/* Check validity of the file object */
+	if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
+		EFSPRINTF("FOV");
+		LEAVE_FF(fs, res);	/* Check validity */
+	}
+
+	if (!(fp->flag & FA_READ)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
+	FSIZE_t remain = fp->obj.objsize - fp->fptr;
+	if (btr > remain) btr = (UINT)remain;		/* Truncate btr by remaining bytes */
+
+	csize_bytes = fs->csize * SS(fs);
+	DWORD csect = (UINT)((fp->fptr / SS(fs)) & (fs->csize - 1));	/* Sector offset in the cluster */
+
+	/* If inside a cluster, read the sectors and align to cluster. */
+	if (csect) {
+		wbytes = MIN(btr, (fs->csize - csect) * SS(fs));
+		f_read(fp, wbuff, wbytes, (void *)0);
+		wbuff += wbytes;
+		btr -= wbytes;
+		if (!btr)
+			goto out;
+	}
+
+	if (!fp->fptr) {	/* On the top of the file? */
+		clst = fp->obj.sclust;	/* Follow from the origin */
+	} else {
+		if (fp->cltbl) clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
+		else { EFSPRINTF("CLTBL"); ABORT(fs, FR_CLTBL_NO_INIT); }
+	}
+
+	if (clst < 2) { EFSPRINTF("CCHK"); ABORT(fs, FR_INT_ERR); }
+	else if (clst == 0xFFFFFFFF) { EFSPRINTF("DSKC"); ABORT(fs, FR_DISK_ERR); }
+
+	fp->clust = clst;	/* Set working cluster */
+
+	wbytes = MIN(btr, csize_bytes);
+	sector_base = clst2sect(fs, fp->clust);
+	count = wbytes / SS(fs);
+	fp->fptr += wbytes;
+	btr -= wbytes;
+
+	if (!btr) {	/* Final cluster/sectors read. */
+		if (disk_read(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
+		goto out;
+	}
+
+	while (btr) {
+		clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
+
+		if (clst < 2) { EFSPRINTF("CCHK2"); ABORT(fs, FR_INT_ERR); }
+		else if (clst == 0xFFFFFFFF) { EFSPRINTF("DSKC"); ABORT(fs, FR_DISK_ERR); }
+
+		fp->clust = clst;
+
+		work_sector = clst2sect(fs, fp->clust);
+		wbytes = MIN(btr, csize_bytes);
+		if ((work_sector - sector_base) == count) count += wbytes / SS(fs);
+		else {
+			if (disk_read(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
+			wbuff += count * SS(fs);
+
+			sector_base = work_sector;
+			count = wbytes / SS(fs);
+		}
+
+		fp->fptr += wbytes;
+		btr -= wbytes;
+
+		if (!btr) {	/* Final cluster/sectors read. */
+			if (disk_read(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
+		}
+	}
+
+out:
+	LEAVE_FF(fs, FR_OK);
+}
+#endif
+#endif
+
+
+
+
 #if !FF_FS_READONLY
 /*-----------------------------------------------------------------------*/
 /* Write File                                                            */
@@ -4018,6 +4136,117 @@ FRESULT f_write (
 
 
 
+#ifdef FF_FASTFS
+/*-----------------------------------------------------------------------*/
+/* Fast Write Aligned Sized File Without a Cache                         */
+/*-----------------------------------------------------------------------*/
+#if FF_USE_FASTSEEK
+FRESULT f_write_fast (
+	FIL* fp,			/* Pointer to the file object */
+	const void* buff,	/* Pointer to the data to be written */
+	UINT btw			/* Number of bytes to write */
+)
+{
+	FRESULT res;
+	FATFS *fs;
+	UINT csize_bytes;
+	DWORD clst;
+	DWORD wbytes;
+	UINT count;
+	FSIZE_t work_sector = 0;
+	FSIZE_t sector_base = 0;
+	BYTE *wbuff = (BYTE*)buff;
+
+	res = validate(&fp->obj, &fs);			/* Check validity of the file object */
+	if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) {
+		EFSPRINTF("FOV");
+		LEAVE_FF(fs, res);	/* Check validity */
+	}
+
+	if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED);	/* Check access mode */
+	/* Check fptr wrap-around (file size cannot reach 4 GiB at FAT volume) */
+	if ((!FF_FS_EXFAT || fs->fs_type != FS_EXFAT) && (DWORD)(fp->fptr + btw) < (DWORD)fp->fptr) {
+		btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
+	}
+
+	csize_bytes = fs->csize * SS(fs);
+	DWORD csect = (UINT)((fp->fptr / SS(fs)) & (fs->csize - 1));	/* Sector offset in the cluster */
+
+	/* If inside a cluster, write the sectors and align to cluster. */
+	if (csect) {
+		wbytes = MIN(btw, (fs->csize - csect) * SS(fs));
+		f_write(fp, wbuff, wbytes, (void *)0);
+		/* Ensure flushing of it. FatFS is not notified for next write if raw. */
+		f_sync(fp);
+		wbuff += wbytes;
+		btw -= wbytes;
+		if (!btw)
+			goto out;
+	}
+
+	if (!fp->fptr) {	/* On the top of the file? */
+		clst = fp->obj.sclust;	/* Follow from the origin */
+	} else {
+		if (fp->cltbl) clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
+		else { EFSPRINTF("CLTBL"); ABORT(fs, FR_CLTBL_NO_INIT); }
+	}
+
+	if (clst < 2) { EFSPRINTF("CCHK"); ABORT(fs, FR_INT_ERR); }
+	else if (clst == 0xFFFFFFFF) { EFSPRINTF("DSKC"); ABORT(fs, FR_DISK_ERR); }
+
+	fp->clust = clst;	/* Set working cluster */
+
+	wbytes = MIN(btw, csize_bytes);
+	sector_base = clst2sect(fs, fp->clust);
+	count = wbytes / SS(fs);
+	fp->fptr += wbytes;
+	btw -= wbytes;
+
+	if (!btw) {	/* Final cluster/sectors write. */
+		if (disk_write(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
+		fp->flag &= (BYTE)~FA_DIRTY;
+		goto out;
+	}
+
+	while (btw) {
+		clst = clmt_clust(fp, fp->fptr);	/* Get cluster# from the CLMT */
+
+		if (clst < 2) { EFSPRINTF("CCHK2"); ABORT(fs, FR_INT_ERR); }
+		else if (clst == 0xFFFFFFFF) { EFSPRINTF("DSKC"); ABORT(fs, FR_DISK_ERR); }
+
+		fp->clust = clst;
+
+		work_sector = clst2sect(fs, fp->clust);
+		wbytes = MIN(btw, csize_bytes);
+		if ((work_sector - sector_base) == count) count += wbytes / SS(fs);
+		else {
+			if (disk_write(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
+			wbuff += count * SS(fs);
+
+			sector_base = work_sector;
+			count = wbytes / SS(fs);
+		}
+
+		fp->fptr += wbytes;
+		btw -= wbytes;
+
+		if (!btw) {	/* Final cluster/sectors write. */
+			if (disk_write(fs->pdrv, wbuff, sector_base, count) != RES_OK) ABORT(fs, FR_DISK_ERR);
+			fp->flag &= (BYTE)~FA_DIRTY;
+		}
+	}
+
+out:
+	fp->flag |= FA_MODIFIED;	/* Set file change flag */
+
+	LEAVE_FF(fs, FR_OK);
+}
+#endif
+#endif
+
+
+
+
 /*-----------------------------------------------------------------------*/
 /* Synchronize the File                                                  */
 /*-----------------------------------------------------------------------*/
@@ -4231,9 +4460,9 @@ FRESULT f_getcwd (
 	TCHAR *tp = buff;
 #if FF_VOLUMES >= 2
 	UINT vl;
-#endif
 #if FF_STR_VOLUME_ID
 	const char *vp;
+#endif
 #endif
 	FILINFO fno;
 	DEF_NAMBUF
@@ -4474,6 +4703,37 @@ FRESULT f_lseek (
 
 
 
+#ifdef FF_FASTFS
+#if FF_USE_FASTSEEK
+/*-----------------------------------------------------------------------*/
+/* Seek File Read/Write Pointer                                          */
+/*-----------------------------------------------------------------------*/
+
+DWORD *f_expand_cltbl (
+	FIL* fp,		/* Pointer to the file object */
+	UINT tblsz,		/* Size of table */
+	DWORD *tbl,		/* Table pointer */
+	FSIZE_t ofs		/* File pointer from top of file */
+)
+{
+	if (fp->flag & FA_WRITE) f_lseek(fp, ofs);	/* Expand file if write is enabled */
+	fp->cltbl = (DWORD *)tbl;
+	fp->cltbl[0] = tblsz;
+	if (f_lseek(fp, CREATE_LINKMAP)) {	/* Create cluster link table */
+		fp->cltbl = (void *)0;
+		EFSPRINTF("CLTBLSZ");
+		return (void *)0;
+	}
+	f_lseek(fp, 0);
+
+	return fp->cltbl;
+}
+#endif
+#endif
+
+
+
+
 #if FF_FS_MINIMIZE <= 1
 /*-----------------------------------------------------------------------*/
 /* Create a Directory Object                                             */
@@ -4714,7 +4974,7 @@ FRESULT f_getfree (
 	/* Get logical drive */
 	res = find_volume(&path, &fs, 0);
 	if (res == FR_OK) {
-		*fatfs = fs;				/* Return ptr to the fs object */
+		if (fatfs) *fatfs = fs;	/* Return ptr to the fs object */
 		/* If free_clst is valid, return it without full FAT scan */
 		if (fs->free_clst <= fs->n_fatent - 2) {
 			*nclst = fs->free_clst;

emummc/source/libs/fatfs/ff.h

@@ -246,7 +246,12 @@ typedef enum {
 	FR_LOCKED,				/* (16) The operation is rejected according to the file sharing policy */
 	FR_NOT_ENOUGH_CORE,		/* (17) LFN working buffer could not be allocated */
 	FR_TOO_MANY_OPEN_FILES,	/* (18) Number of open files > FF_FS_LOCK */
+#ifdef FF_FASTFS
+	FR_INVALID_PARAMETER,	/* (19) Given parameter is invalid */
+	FR_CLTBL_NO_INIT	    /* (20) The cluster table for fast seek/read/write was not created */
+#else
 	FR_INVALID_PARAMETER	/* (19) Given parameter is invalid */
+#endif
 } FRESULT;
 
 
@@ -258,6 +263,10 @@ FRESULT f_open (FIL* fp, const TCHAR* path, BYTE mode);				/* Open or create a f
 FRESULT f_close (FIL* fp);											/* Close an open file object */
 FRESULT f_read (FIL* fp, void* buff, UINT btr, UINT* br);			/* Read data from the file */
 FRESULT f_write (FIL* fp, const void* buff, UINT btw, UINT* bw);	/* Write data to the file */
+#ifdef FF_FASTFS
+FRESULT f_read_fast (FIL* fp, const void* buff, UINT btr);			/* Fast read data from the file */
+FRESULT f_write_fast (FIL* fp, const void* buff, UINT btw);         /* Fast write data to the file */
+#endif
 FRESULT f_lseek (FIL* fp, FSIZE_t ofs);								/* Move file pointer of the file object */
 FRESULT f_truncate (FIL* fp);										/* Truncate the file */
 FRESULT f_sync (FIL* fp);											/* Flush cached data of the writing file */
@@ -279,7 +288,10 @@ FRESULT f_getfree (const TCHAR* path, DWORD* nclst, FATFS** fatfs);	/* Get numbe
 FRESULT f_getlabel (const TCHAR* path, TCHAR* label, DWORD* vsn);	/* Get volume label */
 FRESULT f_setlabel (const TCHAR* label);							/* Set volume label */
 FRESULT f_forward (FIL* fp, UINT(*func)(const BYTE*,UINT), UINT btf, UINT* bf);	/* Forward data to the stream */
-FRESULT f_expand (FIL* fp, FSIZE_t szf, BYTE opt);					/* Allocate a contiguous block to the file */
+#ifdef FF_FASTFS
+DWORD  *f_expand_cltbl (FIL* fp, UINT tblsz, DWORD *tbl, FSIZE_t ofs);	/* Expand file and populate cluster table */
+#endif
+FRESULT f_expand (FIL* fp, FSIZE_t fsz, BYTE opt);					/* Allocate a contiguous block to the file */
 FRESULT f_mount (FATFS* fs, const TCHAR* path, BYTE opt);			/* Mount/Unmount a logical drive */
 FRESULT f_mkfs (const TCHAR* path, BYTE opt, DWORD au, void* work, UINT len);	/* Create a FAT volume */
 FRESULT f_fdisk (BYTE pdrv, const DWORD* szt, void* work);			/* Divide a physical drive into some partitions */

emummc/source/libs/fatfs/ffconf.h

@@ -15,7 +15,7 @@
 /  and optional writing functions as well. */
 
 
-#define FF_FS_MINIMIZE	0
+#define FF_FS_MINIMIZE	2
 /* This option defines minimization level to remove some basic API functions.
 /
 /   0: Basic functions are fully enabled.
@@ -41,8 +41,13 @@
 #define FF_USE_MKFS		0
 /* This option switches f_mkfs() function. (0:Disable or 1:Enable) */
 
+#define FF_FASTFS 1
 
+#ifdef FF_FASTFS
+#define FF_USE_FASTSEEK	1
+#else
 #define FF_USE_FASTSEEK	0
+#endif
 /* This option switches fast seek function. (0:Disable or 1:Enable) */
 
 
@@ -50,7 +55,7 @@
 /* This option switches f_expand function. (0:Disable or 1:Enable) */
 
 
-#define FF_USE_CHMOD	1
+#define FF_USE_CHMOD	0
 /* This option switches attribute manipulation functions, f_chmod() and f_utime().
 /  (0:Disable or 1:Enable) Also FF_FS_READONLY needs to be 0 to enable this option. */
 
@@ -239,7 +244,7 @@
 #define FF_FS_NORTC		1
 #define FF_NORTC_MON	1
 #define FF_NORTC_MDAY	1
-#define FF_NORTC_YEAR	2019
+#define FF_NORTC_YEAR	2020
 /* The option FF_FS_NORTC switches timestamp function. If the system does not have
 /  any RTC function or valid timestamp is not needed, set FF_FS_NORTC = 1 to disable
 /  the timestamp function. Every object modified by FatFs will have a fixed timestamp

emummc/source/libs/fatfs/ffunicode.c

@@ -34,7 +34,6 @@
 #define MERGE2(a, b) a ## b
 #define CVTBL(tbl, cp) MERGE2(tbl, cp)
 
-
 /*------------------------------------------------------------------------*/
 /* Code Conversion Tables                                                 */
 /*------------------------------------------------------------------------*/
@@ -623,5 +622,4 @@ DWORD ff_wtoupper (	/* Returns up-converted code point */
 	return uni;
 }
 
-
 #endif /* #if FF_USE_LFN */

emummc/source/main.c

@@ -33,19 +33,22 @@
 void __init();
 void __initheap(void);
 void setup_hooks(void);
-void setup_nintendo_paths(void);
 void __libc_init_array(void);
+void setup_nintendo_paths(void);
 void hook_function(uintptr_t source, uintptr_t target);
 
 void *__stack_top;
 uintptr_t text_base;
+size_t fs_code_size;
+u8 *fs_rw_mapping = NULL;
+Handle self_proc_handle = 0;
 char inner_heap[INNER_HEAP_SIZE];
 size_t inner_heap_size = INNER_HEAP_SIZE;
+
 extern char _start;
 extern char __argdata__;
 
 // Nintendo Path
-// TODO
 static char nintendo_path[0x80] = "Nintendo";
 
 // 1.0.0 requires special path handling because it has separate album and contents paths.
@@ -60,6 +63,7 @@ static const fs_offsets_t *fs_offsets;
 // Defined by linkerscript
 #define INJECTED_SIZE ((uintptr_t)&__argdata__ - (uintptr_t)&_start)
 #define INJECT_OFFSET(type, offset) (type)(text_base + INJECTED_SIZE + offset)
+#define FS_CODE_BASE INJECT_OFFSET(uintptr_t, 0)
 
 #define GENERATE_ADD(register, register_target, value) (0x91000000 | value << 10 | register << 5 | register_target)
 #define GENERATE_ADRP(register, page_addr) (0x90000000 | ((((page_addr) >> 12) & 0x3) << 29) | ((((page_addr) >> 12) & 0x1FFFFC) << 3) | ((register) & 0x1F))
@@ -88,7 +92,7 @@ volatile __attribute__((aligned(0x1000))) emuMMC_ctx_t emuMMC_ctx = {
     .fs_ver = FS_VER_MAX,
 
     // SD Default Metadata
-    .SD_Type = emuMMC_SD,
+    .SD_Type = emuMMC_SD_Raw,
     .SD_StoragePartitionOffset = 0,
 
     // EMMC Default Metadata
@@ -148,15 +152,117 @@ void __initheap(void)
     fake_heap_end = (char *)addr + size;
 }
 
+static void _receive_process_handle_thread(void *_session_handle) {
+    Result rc;
+
+    // Convert the argument to a handle copy we can use.
+    Handle session_handle = *(Handle*)_session_handle;
+
+    // Receive the request from the client thread.
+    memset(armGetTls(), 0, 0x10);
+    s32 idx = 0;
+    rc = svcReplyAndReceive(&idx, &session_handle, 1, INVALID_HANDLE, UINT64_MAX);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    // Set the process handle.
+    self_proc_handle = ((u32 *)armGetTls())[3];
+
+    // Close the session.
+    svcCloseHandle(session_handle);
+
+    // Terminate ourselves.
+    svcExitThread();
+
+    // This code will never execute.
+    while (true);
+}
+
+static void _init_process_handle(void) {
+    Result rc;
+    u8 temp_thread_stack[0x1000];
+
+    // Create a new session to transfer our process handle to ourself
+    Handle server_handle, client_handle;
+    rc = svcCreateSession(&server_handle, &client_handle, 0, 0);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    // Create a new thread to receive our handle.
+    Handle thread_handle;
+    rc = svcCreateThread(&thread_handle, _receive_process_handle_thread, &server_handle, temp_thread_stack + sizeof(temp_thread_stack), 0x20, 3);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    // Start the new thread.
+    rc = svcStartThread(thread_handle);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    // Send the message.
+    static const u32 SendProcessHandleMessage[4] = { 0x00000000, 0x80000000, 0x00000002, CUR_PROCESS_HANDLE };
+    memcpy(armGetTls(), SendProcessHandleMessage, sizeof(SendProcessHandleMessage));
+    svcSendSyncRequest(client_handle);
+
+    // Close the session handle.
+    svcCloseHandle(client_handle);
+
+    // Wait for the thread to be done.
+    rc = svcWaitSynchronizationSingle(thread_handle, UINT64_MAX);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    // Close the thread handle.
+    svcCloseHandle(thread_handle);
+}
+
+static void _map_fs_rw(void) {
+    Result rc;
+
+    do {
+        fs_rw_mapping = (u8 *)(smcGenerateRandomU64() & 0xFFFFFF000ull);
+        rc = svcMapProcessMemory(fs_rw_mapping, self_proc_handle, FS_CODE_BASE, fs_code_size);
+    } while (rc == 0xDC01 || rc == 0xD401);
+
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+}
+
+static void _unmap_fs_rw(void) {
+    Result rc = svcUnmapProcessMemory(fs_rw_mapping, self_proc_handle, FS_CODE_BASE, fs_code_size);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    fs_rw_mapping = NULL;
+}
+
+static void _write32(uintptr_t source, u32 value) {
+    *((u32 *)(fs_rw_mapping + (source - FS_CODE_BASE))) = value;
+}
+
 void hook_function(uintptr_t source, uintptr_t target)
 {
     u32 branch_opcode = GENERATE_BRANCH(source, target);
-    smcWriteAddress32((void *)source, branch_opcode);
+    _write32(source, branch_opcode);
 }
 
 void write_nop(uintptr_t source)
 {
-    smcWriteAddress32((void *)source, GENERATE_NOP());
+    _write32(source, GENERATE_NOP());
 }
 
 void write_adrp_add(int reg, uintptr_t pc, uintptr_t add_rel_offset, intptr_t destination)
@@ -167,8 +273,8 @@ void write_adrp_add(int reg, uintptr_t pc, uintptr_t add_rel_offset, intptr_t de
     uint32_t opcode_adrp = GENERATE_ADRP(reg, offset);
     uint32_t opcode_add = GENERATE_ADD(reg, reg, (destination & 0x00000FFF));
 
-    smcWriteAddress32((void *)pc, opcode_adrp);
+    _write32(pc, opcode_adrp);
-    smcWriteAddress32((void *)add_opcode_location, opcode_add);
+    _write32(add_opcode_location, opcode_add);
 }
 
 void setup_hooks(void)
@@ -179,6 +285,9 @@ void setup_hooks(void)
     INJECT_HOOK(fs_offsets->sdmmc_wrapper_read, sdmmc_wrapper_read);
     // sdmmc_wrapper_write hook
     INJECT_HOOK(fs_offsets->sdmmc_wrapper_write, sdmmc_wrapper_write);
+	// sdmmc_wrapper_controller_open hook
+    if (fs_offsets->sdmmc_accessor_controller_open)
+        INJECT_HOOK(fs_offsets->sdmmc_accessor_controller_open, sdmmc_wrapper_controller_open);
     // sdmmc_wrapper_controller_close hook
     INJECT_HOOK(fs_offsets->sdmmc_accessor_controller_close, sdmmc_wrapper_controller_close);
 
@@ -240,7 +349,7 @@ static void load_emummc_ctx(void)
         emuMMC_ctx.id = config.base_cfg.id;
         emuMMC_ctx.EMMC_Type = (enum emuMMC_Type)config.base_cfg.type;
         emuMMC_ctx.fs_ver = (enum FS_VER)config.base_cfg.fs_version;
-        if (emuMMC_ctx.EMMC_Type == emuMMC_SD)
+        if (emuMMC_ctx.EMMC_Type == emuMMC_SD_Raw)
         {
             emuMMC_ctx.EMMC_StoragePartitionOffset = config.partition_cfg.start_sector;
         }
@@ -306,14 +415,21 @@ void __init()
 
     text_base = meminfo.addr;
 
+    // Get code size
+    svcQueryMemory(&meminfo, &pageinfo, FS_CODE_BASE);
+    fs_code_size = meminfo.size;
+
     load_emummc_ctx();
 
     fs_offsets = get_fs_offsets(emuMMC_ctx.fs_ver);
 
+    _init_process_handle();
+    _map_fs_rw();
     setup_hooks();
     populate_function_pointers();
     write_nops();
     setup_nintendo_paths();
+    _unmap_fs_rw();
 
     clock_enable_i2c5();
     i2c_init();

emummc/source/nx/smc.c

@@ -6,6 +6,7 @@
 #include <stddef.h>
 #include <string.h>
 #include "smc.h"
+#include "../utils/fatal.h"
 
 void smcRebootToRcm(void)
 {
@@ -58,6 +59,47 @@ Result smcGetConfig(SplConfigItem config_item, u64 *out_config)
     return rc;
 }
 
+SplHardwareType splGetHardwareType(void)
+{
+    u64 value;
+    Result rc = smcGetConfig(SplConfigItem_HardwareType, &value);
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+    return (SplHardwareType)value;
+}
+
+SplSocType splGetSocType(void)
+{
+    static SplSocType soc_type;
+    static bool soc_type_set = false;
+
+    if (soc_type_set)
+        return soc_type;
+
+    switch (splGetHardwareType())
+    {
+        case SplHardwareType_Icosa:
+        case SplHardwareType_Copper:
+            soc_type = SplSocType_Erista;
+            break;
+        case SplHardwareType_Hoag:
+        case SplHardwareType_Iowa:
+        case SplHardwareType_Calcio:
+        case SplHardwareType_Five:
+            soc_type = SplSocType_Mariko;
+            break;
+        default:
+            fatal_abort(Fatal_InvalidEnum);
+    }
+
+    soc_type_set = true;
+
+    return soc_type;
+}
+
+
 Result smcCopyToIram(uintptr_t iram_addr, const void *src_addr, u32 size)
 {
     SecmonArgs args;
@@ -117,45 +159,6 @@ Result smcReadWriteRegister(u32 phys_addr, u32 value, u32 mask)
     return rc;
 }
 
-static Result _smcWriteAddress(void *dst_addr, u64 val, u32 size)
-{
-    SecmonArgs args;
-    args.X[0] = 0xF0000003;     /* smcAmsWriteAddress */
-    args.X[1] = (u64)dst_addr;  /* DRAM address */
-    args.X[2] = val;            /* value */
-    args.X[3] = size;           /* Amount to write */
-    Result rc = svcCallSecureMonitor(&args);
-    if (rc == 0)
-    {
-        if (args.X[0] != 0)
-        {
-            /* SPL result n = SMC result n */
-            rc = (26u | ((u32)args.X[0] << 9u));
-        }
-    }
-    return rc;
-}
-
-Result smcWriteAddress8(void *dst_addr, u8 val)
-{
-    return _smcWriteAddress(dst_addr, val, 1);
-}
-
-Result smcWriteAddress16(void *dst_addr, u16 val)
-{
-    return _smcWriteAddress(dst_addr, val, 2);
-}
-
-Result smcWriteAddress32(void *dst_addr, u32 val)
-{
-    return _smcWriteAddress(dst_addr, val, 4);
-}
-
-Result smcWriteAddress64(void *dst_addr, u64 val)
-{
-    return _smcWriteAddress(dst_addr, val, 8);
-}
-
 Result smcGetEmummcConfig(exo_emummc_mmc_t mmc_id, exo_emummc_config_t *out_cfg, void *out_paths)
 {
     SecmonArgs args;
@@ -177,4 +180,38 @@ Result smcGetEmummcConfig(exo_emummc_mmc_t mmc_id, exo_emummc_config_t *out_cfg,
     }
     return rc;
 
-}
+}
+
+Result smcGenerateRandomBytes(void *dst, u32 size)
+{
+    SecmonArgs args;
+    args.X[0] = 0xC3000006;     /* smcGenerateRandomBytes */
+    args.X[1] = size;
+    Result rc = svcCallSecureMonitor(&args);
+    if (rc == 0)
+    {
+        if (args.X[0] != 0)
+        {
+            /* SPL result n = SMC result n */
+            rc = (26u | ((u32)args.X[0] << 9u));
+        }
+        if (rc == 0)
+        {
+            memcpy(dst, &args.X[1], size);
+        }
+    }
+    return rc;
+}
+
+u64 smcGenerateRandomU64(void)
+{
+    u64 random;
+
+    Result rc = smcGenerateRandomBytes(&random, sizeof(random));
+    if (rc != 0)
+    {
+        fatal_abort(Fatal_BadResult);
+    }
+
+    return random;
+}

emummc/source/nx/smc.h

@@ -37,6 +37,20 @@ typedef enum {
     SplConfigItem_HasRcmBugPatch   = 65004,
 } SplConfigItem;
 
+typedef enum {
+    SplSocType_Erista = 0,
+    SplSocType_Mariko = 1,
+} SplSocType;
+
+typedef enum {
+    SplHardwareType_Icosa = 0,
+    SplHardwareType_Copper = 1,
+    SplHardwareType_Hoag = 2,
+    SplHardwareType_Iowa = 3,
+    SplHardwareType_Calcio = 4,
+    SplHardwareType_Five = 5,
+} SplHardwareType;
+
 typedef enum {
    EXO_EMUMMC_TYPE_NONE = 0,
    EXO_EMUMMC_TYPE_PARTITION = 1,
@@ -69,6 +83,9 @@ typedef struct {
 
 Result smcGetConfig(SplConfigItem config_item, u64 *out_config);
 
+SplHardwareType splGetHardwareType(void);
+SplSocType splGetSocType(void);
+
 void smcRebootToRcm(void);
 void smcRebootToIramPayload(void);
 void smcPerformShutdown(void);
@@ -78,13 +95,11 @@ Result smcCopyFromIram(void *dst_addr, uintptr_t iram_addr, u32 size);
 
 Result smcReadWriteRegister(u32 phys_addr, u32 value, u32 mask);
 
-Result smcWriteAddress8(void *dst_addr, u8 val);
-Result smcWriteAddress16(void *dst_addr, u16 val);
-Result smcWriteAddress32(void *dst_addr, u32 val);
-Result smcWriteAddress64(void *dst_addr, u64 val);
-
 Result smcGetEmummcConfig(exo_emummc_mmc_t mmc_id, exo_emummc_config_t *out_cfg, void *out_paths);
 
+Result smcGenerateRandomBytes(void *dst, u32 size);
+u64 smcGenerateRandomU64(void);
+
 #ifdef __cplusplus
 }
 #endif

emummc/source/nx/svc.h

@@ -106,6 +106,104 @@ Result svcSetProcessMemoryPermission(Handle proc, u64 addr, u64 size, u32 perm);
  */
 Result svcSetMemoryPermission(void* addr, u64 size, u32 perm);
 
+/**
+ * @brief Creates a thread.
+ * @return Result code.
+ * @note Syscall number 0x08.
+ */
+Result svcCreateThread(Handle* out, void* entry, void* arg, void* stack_top, int prio, int cpuid);
+
+/**
+ * @brief Starts a freshly created thread.
+ * @return Result code.
+ * @note Syscall number 0x09.
+ */
+Result svcStartThread(Handle handle);
+
+/**
+ * @brief Exits the current thread.
+ * @note Syscall number 0x0A.
+ */
+void __attribute__((noreturn)) svcExitThread(void);
+
+/**
+ * @brief Closes a handle, decrementing the reference count of the corresponding kernel object.
+ * This might result in the kernel freeing the object.
+ * @param handle Handle to close.
+ * @return Result code.
+ * @note Syscall number 0x16.
+ */
+Result svcCloseHandle(Handle handle);
+
+/**
+ * @brief Waits on one or more synchronization objects, optionally with a timeout.
+ * @return Result code.
+ * @note Syscall number 0x18.
+ * @note \p handleCount must not be greater than \ref MAX_WAIT_OBJECTS. This is a Horizon kernel limitation.
+ * @note This is the raw syscall, which can be cancelled by \ref svcCancelSynchronization or other means. \ref waitHandles or \ref waitMultiHandle should normally be used instead.
+ */
+Result svcWaitSynchronization(s32* index, const Handle* handles, s32 handleCount, u64 timeout);
+
+/**
+ * @brief Waits on a single synchronization object, optionally with a timeout.
+ * @return Result code.
+ * @note Wrapper for \ref svcWaitSynchronization.
+ * @note This is the raw syscall, which can be cancelled by \ref svcCancelSynchronization or other means. \ref waitSingleHandle should normally be used instead.
+ */
+static inline Result svcWaitSynchronizationSingle(Handle handle, u64 timeout) {
+    s32 tmp;
+    return svcWaitSynchronization(&tmp, &handle, 1, timeout);
+}
+
+/**
+ * @brief Creates an IPC session.
+ * @return Result code.
+ * @note Syscall number 0x40.
+ * @warning This is a privileged syscall. Use \ref envIsSyscallHinted to check if it is available.
+ */
+Result svcCreateSession(Handle *server_handle, Handle *client_handle, u32 unk0, u64 unk1);//unk* are normally 0?
+
+/**
+ * @brief Sends an IPC synchronization request to a session.
+ * @return Result code.
+ * @note Syscall number 0x21.
+ */
+Result svcSendSyncRequest(Handle session);
+
+/**
+ * @brief Performs IPC input/output.
+ * @return Result code.
+ * @note Syscall number 0x43.
+ * @warning This is a privileged syscall. Use \ref envIsSyscallHinted to check if it is available.
+ */
+Result svcReplyAndReceive(s32* index, const Handle* handles, s32 handleCount, Handle replyTarget, u64 timeout);
+
+/**
+ * @brief Maps the src address from the supplied process handle into the current process.
+ * @param[in] dst Address to which map the memory in the current process.
+ * @param[in] proc Process handle.
+ * @param[in] src Source mapping address.
+ * @param[in] size Size of the memory.
+ * @return Result code.
+ * @remark This allows mapping code and rodata with RW- permission.
+ * @note Syscall number 0x74.
+ * @warning This is a privileged syscall. Use \ref envIsSyscallHinted to check if it is available.
+ */
+Result svcMapProcessMemory(void* dst, Handle proc, u64 src, u64 size);
+
+/**
+ * @brief Undoes the effects of \ref svcMapProcessMemory.
+ * @param[in] dst Destination mapping address
+ * @param[in] proc Process handle.
+ * @param[in] src Address of the memory in the process.
+ * @param[in] size Size of the memory.
+ * @return Result code.
+ * @remark This allows mapping code and rodata with RW- permission.
+ * @note Syscall number 0x75.
+ * @warning This is a privileged syscall. Use \ref envIsSyscallHinted to check if it is available.
+ */
+Result svcUnmapProcessMemory(void* dst, Handle proc, u64 src, u64 size);
+
 /**
  * @brief Calls a secure monitor function (TrustZone, EL3).
  * @param regs Arguments to pass to the secure monitor.

emummc/source/nx/svc.s

@@ -56,6 +56,69 @@ SVC_BEGIN svcSetProcessMemoryPermission
 	RET
 SVC_END
 
+SVC_BEGIN svcCreateThread
+	STR X0, [SP, #-16]!
+	SVC 0x8
+	LDR X2, [SP], #16
+	STR W1, [X2]
+	RET
+SVC_END
+
+SVC_BEGIN svcStartThread
+	SVC 0x9
+	RET
+SVC_END
+
+SVC_BEGIN svcExitThread
+	SVC 0xA
+	RET
+SVC_END
+
+SVC_BEGIN svcCloseHandle
+	SVC 0x16
+	RET
+SVC_END
+
+SVC_BEGIN svcWaitSynchronization
+	STR X0, [SP, #-16]!
+	SVC 0x18
+	LDR X2, [SP], #16
+	STR W1, [X2]
+	RET
+SVC_END
+
+SVC_BEGIN svcCreateSession
+	STP X0, X1, [SP, #-16]!
+	SVC 0x40
+	LDP X3, X4, [SP], #16
+	STR W1, [X3]
+	STR W2, [X4]
+	RET
+SVC_END
+
+SVC_BEGIN svcSendSyncRequest
+	SVC 0x21
+	RET
+SVC_END
+
+SVC_BEGIN svcReplyAndReceive
+	STR X0, [SP, #-16]!
+	SVC 0x43
+	LDR X2, [SP], #16
+	STR W1, [X2]
+	RET
+SVC_END
+
+SVC_BEGIN svcMapProcessMemory
+	SVC 0x74
+	RET
+SVC_END
+
+SVC_BEGIN svcUnmapProcessMemory
+	SVC 0x75
+	RET
+SVC_END
+
 SVC_BEGIN svcCallSecureMonitor
 	STR X0, [SP, #-16]!
 	MOV X8, X0

emummc/source/power/max77620.h

@@ -1,7 +1,7 @@
 /*
  * Defining registers address and its bit definitions of MAX77620 and MAX20024
  *
- * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2016 NVIDIA CORPORATION. All rights reserved.
  * Copyright (c) 2019 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
@@ -19,9 +19,19 @@
 #define  MAX77620_CNFGGLBL1_LBDAC_EN          (1 << 7)
 #define  MAX77620_CNFGGLBL1_MPPLD             (1 << 6)
 #define  MAX77620_CNFGGLBL1_LBHYST            ((1 << 5) | (1 << 4))
-#define  MAX77620_CNFGGLBL1_LBHYST_N          (1 << 4)
+#define  MAX77620_CNFGGLBL1_LBHYST_100        (0 << 4)
-#define  MAX77620_CNFGGLBL1_LBDAC             0x0E
+#define  MAX77620_CNFGGLBL1_LBHYST_200        (1 << 4)
-#define  MAX77620_CNFGGLBL1_LBDAC_N           (1 << 1)
+#define  MAX77620_CNFGGLBL1_LBHYST_300        (2 << 4)
+#define  MAX77620_CNFGGLBL1_LBHYST_400        (3 << 4)
+#define  MAX77620_CNFGGLBL1_LBDAC_MASK        0x0E
+#define  MAX77620_CNFGGLBL1_LBDAC_2700        (0 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_2800        (1 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_2900        (2 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_3000        (3 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_3100        (4 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_3200        (5 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_3300        (6 << 1)
+#define  MAX77620_CNFGGLBL1_LBDAC_3400        (7 << 1)
 #define  MAX77620_CNFGGLBL1_LBRSTEN           (1 << 0)
 
 #define MAX77620_REG_CNFGGLBL2      0x01
@@ -130,7 +140,7 @@
 #define  MAX77620_POWER_MODE_DISABLE          0
 #define  MAX20024_LDO_CFG2_MPOK_MASK          (1 << 2)
 #define  MAX77620_LDO_CFG2_ADE_MASK           (1 << 1)
-#define  MAX77620_LDO_CFG2_ADE_DISABLE        0
+#define  MAX77620_LDO_CFG2_ADE_DISABLE        (0 << 1)
 #define  MAX77620_LDO_CFG2_ADE_ENABLE         (1 << 1)
 #define  MAX77620_LDO_CFG2_SS_MASK            (1 << 0)
 #define  MAX77620_LDO_CFG2_SS_FAST            (1 << 0)
@@ -153,6 +163,24 @@
 #define MAX77620_REG_PUE_GPIO       0x3E
 #define MAX77620_REG_PDE_GPIO       0x3F
 #define MAX77620_REG_AME_GPIO       0x40
+#define  MAX77620_CNFG_GPIO_DRV_MASK          (1 << 0)
+#define  MAX77620_CNFG_GPIO_DRV_PUSHPULL      (1 << 0)
+#define  MAX77620_CNFG_GPIO_DRV_OPENDRAIN     (0 << 0)
+#define  MAX77620_CNFG_GPIO_DIR_MASK          (1 << 1)
+#define  MAX77620_CNFG_GPIO_DIR_INPUT         (1 << 1)
+#define  MAX77620_CNFG_GPIO_DIR_OUTPUT        (0 << 1)
+#define  MAX77620_CNFG_GPIO_INPUT_VAL_MASK    (1 << 2)
+#define  MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK   (1 << 3)
+#define  MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH   (1 << 3)
+#define  MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW    (0 << 3)
+#define  MAX77620_CNFG_GPIO_INT_MASK          (0x3 << 4)
+#define  MAX77620_CNFG_GPIO_INT_FALLING       (1 << 4)
+#define  MAX77620_CNFG_GPIO_INT_RISING        (1 << 5)
+#define  MAX77620_CNFG_GPIO_DBNC_MASK         (0x3 << 6)
+#define  MAX77620_CNFG_GPIO_DBNC_None         (0x0 << 6)
+#define  MAX77620_CNFG_GPIO_DBNC_8ms          (0x1 << 6)
+#define  MAX77620_CNFG_GPIO_DBNC_16ms         (0x2 << 6)
+#define  MAX77620_CNFG_GPIO_DBNC_32ms         (0x3 << 6)
 
 #define MAX77620_REG_ONOFFCNFG1     0x41
 #define  MAX77620_ONOFFCNFG1_SFT_RST          (1 << 7)
@@ -259,25 +287,6 @@
 #define MAX77620_SD_CFG1_FSRADE_SD_DISABLE    0
 #define MAX77620_SD_CFG1_FSRADE_SD_ENABLE     (1 << 0)
 
-#define MAX77620_CNFG_GPIO_DRV_MASK           (1 << 0)
-#define MAX77620_CNFG_GPIO_DRV_PUSHPULL       (1 << 0)
-#define MAX77620_CNFG_GPIO_DRV_OPENDRAIN      0
-#define MAX77620_CNFG_GPIO_DIR_MASK           (1 << 1)
-#define MAX77620_CNFG_GPIO_DIR_INPUT          (1 << 1)
-#define MAX77620_CNFG_GPIO_DIR_OUTPUT         0
-#define MAX77620_CNFG_GPIO_INPUT_VAL_MASK     (1 << 2)
-#define MAX77620_CNFG_GPIO_OUTPUT_VAL_MASK    (1 << 3)
-#define MAX77620_CNFG_GPIO_OUTPUT_VAL_HIGH    (1 << 3)
-#define MAX77620_CNFG_GPIO_OUTPUT_VAL_LOW     0
-#define MAX77620_CNFG_GPIO_INT_MASK           (0x3 << 4)
-#define MAX77620_CNFG_GPIO_INT_FALLING        (1 << 4)
-#define MAX77620_CNFG_GPIO_INT_RISING         (1 << 5)
-#define MAX77620_CNFG_GPIO_DBNC_MASK          (0x3 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_None          (0x0 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_8ms           (0x1 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_16ms          (0x2 << 6)
-#define MAX77620_CNFG_GPIO_DBNC_32ms          (0x3 << 6)
-
 #define MAX77620_IRQ_LVL2_GPIO_EDGE0          (1 << 0)
 #define MAX77620_IRQ_LVL2_GPIO_EDGE1          (1 << 1)
 #define MAX77620_IRQ_LVL2_GPIO_EDGE2          (1 << 2)

emummc/source/power/max7762x.c

@@ -157,9 +157,3 @@ void max77620_config_default()
 	}
 	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_SD_CFG2, 4);
 }
-
-void max77620_low_battery_monitor_config()
-{
-	i2c_send_byte(I2C_5, MAX77620_I2C_ADDR, MAX77620_REG_CNFGGLBL1,
-		MAX77620_CNFGGLBL1_LBDAC_EN | MAX77620_CNFGGLBL1_LBHYST_N | MAX77620_CNFGGLBL1_LBDAC_N);
-}

emummc/source/power/max7762x.h

@@ -24,16 +24,16 @@
 * Switch Power domains (max77620):
 * Name  | Usage         | uV step | uV min | uV default | uV max  | Init
 *-------+---------------+---------+--------+------------+---------+------------------
-*  sd0  | core          | 12500   | 600000 |  625000    | 1400000 | 1.125V (pkg1.1)
+*  sd0  | SoC           | 12500   | 600000 |  625000    | 1400000 | 1.125V (pkg1.1)
 *  sd1  | SDRAM         | 12500   | 600000 | 1125000    | 1125000 | 1.1V   (pkg1.1)
 *  sd2  | ldo{0-1, 7-8} | 12500   | 600000 | 1325000    | 1350000 | 1.325V (pcv)
 *  sd3  | 1.8V general  | 12500   | 600000 | 1800000    | 1800000 |
 *  ldo0 | Display Panel | 25000   | 800000 | 1200000    | 1200000 | 1.2V   (pkg1.1)
 *  ldo1 | XUSB, PCIE    | 25000   | 800000 | 1050000    | 1050000 | 1.05V  (pcv)
 *  ldo2 | SDMMC1        | 50000   | 800000 | 1800000    | 3300000 |
-*  ldo3 | GC ASIC       | 50000   | 800000 | 3100000    | 3100000 | 3.1V  (pcv)
+*  ldo3 | GC ASIC       | 50000   | 800000 | 3100000    | 3100000 | 3.1V   (pcv)
 *  ldo4 | RTC           | 12500   | 800000 |  850000    |  850000 |
-*  ldo5 | GC ASIC       | 50000   | 800000 | 1800000    | 1800000 | 1.8V  (pcv)
+*  ldo5 | GC ASIC       | 50000   | 800000 | 1800000    | 1800000 | 1.8V   (pcv)
 *  ldo6 | Touch, ALS    | 50000   | 800000 | 2900000    | 2900000 | 2.9V
 *  ldo7 | XUSB          | 50000   | 800000 | 1050000    | 1050000 |
 *  ldo8 | XUSB, DC      | 50000   | 800000 | 1050000    | 1050000 |
@@ -71,6 +71,8 @@
 /* MAX77621_VOUT */
 #define MAX77621_VOUT_ENABLE  (1 << 7)
 #define MAX77621_VOUT_MASK    0x7F
+#define  MAX77621_VOUT_0_95V  0x37
+#define  MAX77621_VOUT_1_09V  0x4F
 
 /* MAX77621_VOUT_DVC_DVS */
 #define MAX77621_DVS_VOUT_MASK 0x7F
@@ -111,6 +113,5 @@ int max77620_regulator_set_voltage(u32 id, u32 mv);
 int max77620_regulator_enable(u32 id, int enable);
 int max77620_regulator_set_volt_and_flags(u32 id, u32 mv, u8 flags);
 void max77620_config_default();
-void max77620_low_battery_monitor_config();
 
 #endif

emummc/source/soc/clock.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2020 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -23,6 +24,10 @@ static const sclock_t _clock_i2c5 = {
 	CLK_RST_CONTROLLER_RST_DEVICES_H, CLK_RST_CONTROLLER_CLK_OUT_ENB_H, CLK_RST_CONTROLLER_CLK_SOURCE_I2C5, 0xF, 0, 4 //81.6MHz -> 400KHz
 };
 
+static sclock_t _clock_sdmmc_legacy_tm = {
+	CLK_RST_CONTROLLER_RST_DEVICES_Y, CLK_RST_CONTROLLER_CLK_OUT_ENB_Y, CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM, 1, 4, 66
+};
+
 void clock_enable(const sclock_t *clk)
 {
 	// Put clock into reset.
@@ -34,6 +39,8 @@ void clock_enable(const sclock_t *clk)
 		CLOCK(clk->source) = clk->clk_div | (clk->clk_src << 29);
 	// Enable.
 	CLOCK(clk->enable) = (CLOCK(clk->enable) & ~(1 << clk->index)) | (1 << clk->index);
+	usleep(2);
+
 	// Take clock off reset.
 	CLOCK(clk->reset) &= ~(1 << clk->index);
 }
@@ -56,6 +63,33 @@ void clock_disable_i2c5()
 	clock_disable(&_clock_i2c5);
 }
 
+static void _clock_enable_pllc4()
+{
+	if ((CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) & (PLLCX_BASE_ENABLE | PLLCX_BASE_LOCK | 0xFFFFFF))
+		== (PLLCX_BASE_ENABLE | PLLCX_BASE_LOCK | (104 << 8) | 4))
+		return;
+
+	// Enable Phase and Frequency lock detection.
+	//CLOCK(CLK_RST_CONTROLLER_PLLC4_MISC) = PLLC4_MISC_EN_LCKDET;
+
+	// Disable PLL and IDDQ in case they are on.
+	CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLCX_BASE_ENABLE;
+	CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) &= ~PLLC4_BASE_IDDQ;
+	(void)CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE);
+	usleep(10);
+
+	// Set PLLC4 dividers.
+	CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) = (104 << 8) | 4; // DIVM: 4, DIVP: 1.
+
+	// Enable PLLC4 and wait for Phase and Frequency lock.
+	CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) |= PLLCX_BASE_ENABLE;
+	(void)CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE);
+	while (!(CLOCK(CLK_RST_CONTROLLER_PLLC4_BASE) & PLLCX_BASE_LOCK))
+		;
+
+	msleep(1); // Wait a bit for PLL to stabilize.
+}
+
 #define L_SWR_SDMMC1_RST (1 << 14)
 #define L_SWR_SDMMC2_RST (1 << 9)
 #define L_SWR_SDMMC4_RST (1 << 15)
@@ -194,57 +228,103 @@ static void _clock_sdmmc_clear_enable(u32 id)
 	}
 }
 
-static u32 _clock_sdmmc_table[8] = { 0 };
+static void _clock_sdmmc_config_legacy_tm()
+{
+	sclock_t *clk = &_clock_sdmmc_legacy_tm;
+	if (!(CLOCK(clk->enable) & (1 << clk->index)))
+		clock_enable(clk);
+}
 
-#define PLLP_OUT0      0x0
+typedef struct _clock_sdmmc_t
+{
+	u32 clock;
+	u32 real_clock;
+} clock_sdmmc_t;
 
-static int _clock_sdmmc_config_clock_source_inner(u32 *pout, u32 id, u32 val)
+static clock_sdmmc_t _clock_sdmmc_table[4] = { 0 };
+
+#define SDMMC_CLOCK_SRC_PLLP_OUT0      0x0
+#define SDMMC_CLOCK_SRC_PLLC4_OUT2     0x3
+#define SDMMC4_CLOCK_SRC_PLLC4_OUT2_LJ 0x1
+
+static int _clock_sdmmc_config_clock_host(u32 *pclock, u32 id, u32 val)
 {
 	u32 divisor = 0;
-	u32 source = PLLP_OUT0;
+	u32 source = SDMMC_CLOCK_SRC_PLLP_OUT0;
 
+	if (id > SDMMC_4)
+		return 0;
+
+	// Get IO clock divisor.
 	switch (val)
 	{
 	case 25000:
-		*pout = 24728;
+		*pclock = 24728;
-		divisor = 31;
+		divisor = 31; // 16.5 div.
 		break;
 	case 26000:
-		*pout = 25500;
+		*pclock = 25500;
-		divisor = 30;
+		divisor = 30; // 16 div.
 		break;
 	case 40800:
-		*pout = 40800;
+		*pclock = 40800;
-		divisor = 18;
+		divisor = 18; // 10 div.
 		break;
 	case 50000:
-		*pout = 48000;
+		*pclock = 48000;
-		divisor = 15;
+		divisor = 15; // 8.5 div.
 		break;
 	case 52000:
-		*pout = 51000;
+		*pclock = 51000;
-		divisor = 14;
+		divisor = 14; // 8 div.
 		break;
 	case 100000:
-		*pout = 90667;
+		source = SDMMC_CLOCK_SRC_PLLC4_OUT2;
-		divisor = 7;
+		*pclock = 99840;
+		divisor = 2;  // 2 div.
+		break;
+	case 164000:
+		*pclock = 163200;
+		divisor = 3;  // 2.5 div.
 		break;
 	case 200000:
-		*pout = 163200;
+		switch (id)
-		divisor = 3;
+		{
-		break;
+		case SDMMC_1:
-	case 208000:
+			source = SDMMC_CLOCK_SRC_PLLC4_OUT2;
-		*pout = 204000;
+			break;
-		divisor = 2;
+		case SDMMC_2:
+			source = SDMMC4_CLOCK_SRC_PLLC4_OUT2_LJ;
+			break;
+		case SDMMC_3:
+			source = SDMMC_CLOCK_SRC_PLLC4_OUT2;
+			break;
+		case SDMMC_4:
+			source = SDMMC4_CLOCK_SRC_PLLC4_OUT2_LJ;
+			break;
+		}
+		*pclock = 199680;
+		divisor = 0;  // 1 div.
 		break;
 	default:
-		*pout = 24728;
+		*pclock = 24728;
-		divisor = 31;
+		divisor = 31; // 16.5 div.
 	}
 
-	_clock_sdmmc_table[2 * id] = val;
+	_clock_sdmmc_table[id].clock = val;
-	_clock_sdmmc_table[2 * id + 1] = *pout;
+	_clock_sdmmc_table[id].real_clock = *pclock;
 
+	// PLLC4 and LEGACY_TM clocks are already initialized,
+	// because we init at the first eMMC read.
+	// // Enable PLLC4 if in use by any SDMMC.
+	// if (source)
+	// 	_clock_enable_pllc4();
+
+	// // Set SDMMC legacy timeout clock.
+	// _clock_sdmmc_config_legacy_tm();
+
+
+	// Set SDMMC clock.
 	switch (id)
 	{
 	case SDMMC_1:
@@ -264,69 +344,75 @@ static int _clock_sdmmc_config_clock_source_inner(u32 *pout, u32 id, u32 val)
 	return 1;
 }
 
-void clock_sdmmc_config_clock_source(u32 *pout, u32 id, u32 val)
+void clock_sdmmc_config_clock_source(u32 *pclock, u32 id, u32 val)
 {
-	if (_clock_sdmmc_table[2 * id] == val)
+	if (_clock_sdmmc_table[id].clock == val)
 	{
-		*pout = _clock_sdmmc_table[2 * id + 1];
+		*pclock = _clock_sdmmc_table[id].real_clock;
 	}
 	else
 	{
 		int is_enabled = _clock_sdmmc_is_enabled(id);
 		if (is_enabled)
 			_clock_sdmmc_clear_enable(id);
-		_clock_sdmmc_config_clock_source_inner(pout, id, val);
+		_clock_sdmmc_config_clock_host(pclock, id, val);
 		if (is_enabled)
 			_clock_sdmmc_set_enable(id);
 		_clock_sdmmc_is_reset(id);
 	}
 }
 
-void clock_sdmmc_get_params(u32 *pout, u16 *pdivisor, u32 type)
+void clock_sdmmc_get_card_clock_div(u32 *pclock, u16 *pdivisor, u32 type)
 {
+	// Get Card clock divisor.
 	switch (type)
 	{
-	case 0:
+	case SDHCI_TIMING_MMC_ID: // Actual IO Freq: 380.59 KHz.
-		*pout = 26000;
+		*pclock = 26000;
 		*pdivisor = 66;
 		break;
-	case 1:
+	case SDHCI_TIMING_MMC_LS26:
-		*pout = 26000;
+		*pclock = 26000;
 		*pdivisor = 1;
 		break;
-	case 2:
+	case SDHCI_TIMING_MMC_HS52:
-		*pout = 52000;
+		*pclock = 52000;
 		*pdivisor = 1;
 		break;
-	case 3:
+	case SDHCI_TIMING_MMC_HS200:
-	case 4:
+	case SDHCI_TIMING_MMC_HS400:
-	case 11:
+	case SDHCI_TIMING_UHS_SDR104:
-		*pout = 200000;
+		*pclock = 200000;
 		*pdivisor = 1;
 		break;
-	case 5:
+	case SDHCI_TIMING_SD_ID: // Actual IO Freq: 380.43 KHz.
-		*pout = 25000;
+		*pclock = 25000;
 		*pdivisor = 64;
 		break;
-	case 6:
+	case SDHCI_TIMING_SD_DS12:
-	case 8:
+	case SDHCI_TIMING_UHS_SDR12:
-		*pout = 25000;
+		*pclock = 25000;
 		*pdivisor = 1;
 		break;
-	case 7:
+	case SDHCI_TIMING_SD_HS25:
-		*pout = 50000;
+	case SDHCI_TIMING_UHS_SDR25:
+		*pclock = 50000;
 		*pdivisor = 1;
 		break;
-	case 10:
+	case SDHCI_TIMING_UHS_SDR50:
-		*pout = 100000;
+		*pclock = 100000;
 		*pdivisor = 1;
 		break;
-	case 13:
+	case SDHCI_TIMING_UHS_SDR82:
-		*pout = 40800;
+		*pclock = 164000;
 		*pdivisor = 1;
 		break;
-	case 14:
+	case SDHCI_TIMING_UHS_DDR50:
-		*pout = 200000;
+		*pclock = 40800;
+		*pdivisor = 1;
+		break;
+	case SDHCI_TIMING_MMC_HS102: // Actual IO Freq: 99.84 MHz.
+		*pclock = 200000;
 		*pdivisor = 2;
 		break;
 	}
@@ -339,15 +425,15 @@ int clock_sdmmc_is_not_reset_and_enabled(u32 id)
 
 void clock_sdmmc_enable(u32 id, u32 val)
 {
-	u32 div = 0;
+	u32 clock = 0;
 
 	if (_clock_sdmmc_is_enabled(id))
 		_clock_sdmmc_clear_enable(id);
 	_clock_sdmmc_set_reset(id);
-	_clock_sdmmc_config_clock_source_inner(&div, id, val);
+	_clock_sdmmc_config_clock_host(&clock, id, val);
 	_clock_sdmmc_set_enable(id);
 	_clock_sdmmc_is_reset(id);
-	usleep((100000 + div - 1) / div);
+	usleep((100000 + clock - 1) / clock);
 	_clock_sdmmc_clear_reset(id);
 	_clock_sdmmc_is_reset(id);
 }

emummc/source/soc/clock.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2020 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -35,12 +36,16 @@
 #define CLK_RST_CONTROLLER_MISC_CLK_ENB 0x48
 #define CLK_RST_CONTROLLER_OSC_CTRL 0x50
 #define CLK_RST_CONTROLLER_PLLC_BASE 0x80
+#define CLK_RST_CONTROLLER_PLLC_OUT 0x84
 #define CLK_RST_CONTROLLER_PLLC_MISC 0x88
+#define CLK_RST_CONTROLLER_PLLC_MISC_1 0x8C
 #define CLK_RST_CONTROLLER_PLLM_BASE 0x90
 #define CLK_RST_CONTROLLER_PLLM_MISC1 0x98
 #define CLK_RST_CONTROLLER_PLLM_MISC2 0x9C
 #define CLK_RST_CONTROLLER_PLLP_BASE 0xA0
 #define CLK_RST_CONTROLLER_PLLD_BASE 0xD0
+#define CLK_RST_CONTROLLER_PLLD_MISC1 0xD8
+#define CLK_RST_CONTROLLER_PLLD_MISC 0xDC
 #define CLK_RST_CONTROLLER_PLLX_BASE 0xE0
 #define CLK_RST_CONTROLLER_PLLX_MISC 0xE4
 #define CLK_RST_CONTROLLER_PLLE_BASE 0xE8
@@ -50,6 +55,7 @@
 #define CLK_RST_CONTROLLER_CLK_SOURCE_PWM 0x110
 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C1 0x124
 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C5 0x128
+#define CLK_RST_CONTROLLER_CLK_SOURCE_DISP1 0x138
 #define CLK_RST_CONTROLLER_CLK_SOURCE_VI 0x148
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC1 0x150
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC2 0x154
@@ -57,11 +63,13 @@
 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTA 0x178
 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTB 0x17C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_HOST1X 0x180
+#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C2 0x198
+#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC 0x19C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_UARTC 0x1A0
 #define CLK_RST_CONTROLLER_CLK_SOURCE_I2C3 0x1B8
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC3 0x1BC
+#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTD 0x1C0
 #define CLK_RST_CONTROLLER_CLK_SOURCE_CSITE 0x1D4
-#define CLK_RST_CONTROLLER_CLK_SOURCE_EMC 0x19C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_TSEC 0x1F4
 #define CLK_RST_CONTROLLER_CLK_OUT_ENB_X 0x280
 #define CLK_RST_CONTROLLER_CLK_ENB_X_SET 0x284
@@ -95,9 +103,13 @@
 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRC 0x3A0
 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRD 0x3A4
 #define CLK_RST_CONTROLLER_CLK_SOURCE_MSELECT 0x3B4
+#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C4 0x3C4
+#define CLK_RST_CONTROLLER_CLK_SOURCE_SYS 0x400
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SOR1 0x410
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SE 0x42C
+#define CLK_RST_CONTROLLER_RST_DEV_V_CLR 0x434
 #define CLK_RST_CONTROLLER_CLK_ENB_V_SET 0x440
+#define CLK_RST_CONTROLLER_CLK_ENB_V_CLR 0x444
 #define CLK_RST_CONTROLLER_CLK_ENB_W_SET 0x448
 #define CLK_RST_CONTROLLER_CLK_ENB_W_CLR 0x44C
 #define CLK_RST_CONTROLLER_RST_CPUG_CMPLX_SET 0x450
@@ -108,16 +120,32 @@
 #define CLK_RST_CONTROLLER_PLLX_MISC_3 0x518
 #define CLK_RST_CONTROLLER_LVL2_CLK_GATE_OVRE 0x554
 #define CLK_RST_CONTROLLER_SPARE_REG0 0x55C
+#define CLK_RST_CONTROLLER_PLLC4_BASE 0x5A4
+#define CLK_RST_CONTROLLER_PLLC4_MISC 0x5A8
+#define CLK_RST_CONTROLLER_PLLC_MISC_2 0x5D0
+#define CLK_RST_CONTROLLER_PLLC4_OUT 0x5E4
 #define CLK_RST_CONTROLLER_PLLMB_BASE 0x5E8
 #define CLK_RST_CONTROLLER_CLK_SOURCE_DSIA_LP 0x620
+#define CLK_RST_CONTROLLER_CLK_SOURCE_I2C6 0x65C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_EMC_DLL 0x664
-#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIP_CAL 0x66C
+#define CLK_RST_CONTROLLER_CLK_SOURCE_UART_FST_MIPI_CAL 0x66C
 #define CLK_RST_CONTROLLER_CLK_SOURCE_SDMMC_LEGACY_TM 0x694
 #define CLK_RST_CONTROLLER_CLK_SOURCE_NVENC 0x6A0
 #define CLK_RST_CONTROLLER_SE_SUPER_CLK_DIVIDER 0x704
+#define CLK_RST_CONTROLLER_CLK_SOURCE_UARTAPE 0x710
 
 #define CLK_NO_SOURCE 0x0
 
+/*! PLL control and status bits */
+#define PLLCX_BASE_ENABLE    (1 << 30)
+#define PLLCX_BASE_REF_DIS   (1 << 29)
+#define PLLCX_BASE_LOCK      (1 << 27)
+
+#define PLLC4_MISC_EN_LCKDET (1 << 30)
+#define PLLC4_BASE_IDDQ      (1 << 18)
+#define PLLC4_OUT3_CLKEN     (1 << 1)
+#define PLLC4_OUT3_RSTN_CLR  (1 << 0)
+
 /*! Generic clock descriptor. */
 typedef struct _sclock_t
 {
@@ -136,8 +164,8 @@ void clock_disable(const sclock_t *clk);
 /*! Clock control for specific hardware portions. */
 void clock_enable_i2c5();
 void clock_disable_i2c5();
-void clock_sdmmc_config_clock_source(u32 *pout, u32 id, u32 val);
+void clock_sdmmc_config_clock_source(u32 *pclock, u32 id, u32 val);
-void clock_sdmmc_get_params(u32 *pout, u16 *pdivisor, u32 type);
+void clock_sdmmc_get_card_clock_div(u32 *pclock, u16 *pdivisor, u32 type);
 int  clock_sdmmc_is_not_reset_and_enabled(u32 id);
 void clock_sdmmc_enable(u32 id, u32 val);
 void clock_sdmmc_disable(u32 id);

emummc/source/soc/gpio.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2019 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -17,78 +18,151 @@
 #include "../soc/gpio.h"
 #include "../soc/t210.h"
 
-static const u16 _gpio_cnf[31] = {
+#define GPIO_BANK_IDX(port)       ((port) >> 2)
-	0x000, 0x004, 0x008, 0x00C,
-	0x100, 0x104, 0x108, 0x10C,
-	0x200, 0x204, 0x208, 0x20C,
-	0x300, 0x304, 0x308, 0x30C,
-	0x400, 0x404, 0x408, 0x40C,
-	0x500, 0x504, 0x508, 0x50C,
-	0x600, 0x604, 0x608, 0x60C,
-	0x700, 0x704, 0x708
-};
 
-static const u16 _gpio_oe[31] = {
+#define GPIO_CNF_OFFSET(port)     (0x00 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x010, 0x014, 0x018, 0x01C,
+#define GPIO_OE_OFFSET(port)      (0x10 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x110, 0x114, 0x118, 0x11C,
+#define GPIO_OUT_OFFSET(port)     (0x20 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x210, 0x214, 0x218, 0x21C,
+#define GPIO_IN_OFFSET(port)      (0x30 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x310, 0x314, 0x318, 0x31C,
+#define GPIO_INT_STA_OFFSET(port) (0x40 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x410, 0x414, 0x418, 0x41C,
+#define GPIO_INT_ENB_OFFSET(port) (0x50 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x510, 0x514, 0x518, 0x51C,
+#define GPIO_INT_LVL_OFFSET(port) (0x60 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x610, 0x614, 0x618, 0x61C,
+#define GPIO_INT_CLR_OFFSET(port) (0x70 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x710, 0x714, 0x718
-};
 
-static const u16 _gpio_out[31] = {
+#define GPIO_CNF_MASKED_OFFSET(port)     (0x80 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x020, 0x024, 0x028, 0x02C,
+#define GPIO_OE_MASKED_OFFSET(port)      (0x90 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x120, 0x124, 0x128, 0x12C,
+#define GPIO_OUT_MASKED_OFFSET(port)     (0xA0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x220, 0x224, 0x228, 0x22C,
+#define GPIO_INT_STA_MASKED_OFFSET(port) (0xC0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x320, 0x324, 0x328, 0x32C,
+#define GPIO_INT_ENB_MASKED_OFFSET(port) (0xD0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x420, 0x424, 0x428, 0x42C,
+#define GPIO_INT_LVL_MASKED_OFFSET(port) (0xE0 + (((port) >> 2) << 8) + (((port) % 4) << 2))
-	0x520, 0x524, 0x528, 0x52C,
-	0x620, 0x624, 0x628, 0x62C,
-	0x720, 0x724, 0x728
-};
 
-static const u16 _gpio_in[31] = {
+#define GPIO_IRQ_BANK1 32
-	0x030, 0x034, 0x038, 0x03C,
+#define GPIO_IRQ_BANK2 33
-	0x130, 0x134, 0x138, 0x13C,
+#define GPIO_IRQ_BANK3 34
-	0x230, 0x234, 0x238, 0x23C,
+#define GPIO_IRQ_BANK4 35
-	0x330, 0x334, 0x338, 0x33C,
+#define GPIO_IRQ_BANK5 55
-	0x430, 0x434, 0x438, 0x43C,
+#define GPIO_IRQ_BANK6 87
-	0x530, 0x534, 0x538, 0x53C,
+#define GPIO_IRQ_BANK7 89
-	0x630, 0x634, 0x638, 0x63C,
+#define GPIO_IRQ_BANK8 125
-	0x730, 0x734, 0x738
+
+static u8 gpio_bank_irq_ids[8] = {
+	GPIO_IRQ_BANK1, GPIO_IRQ_BANK2, GPIO_IRQ_BANK3, GPIO_IRQ_BANK4,
+	GPIO_IRQ_BANK5, GPIO_IRQ_BANK6, GPIO_IRQ_BANK7, GPIO_IRQ_BANK8
 };
 
 void gpio_config(u32 port, u32 pins, int mode)
 {
+	u32 offset = GPIO_CNF_OFFSET(port);
+
 	if (mode)
-		GPIO(_gpio_cnf[port]) |= pins;
+		GPIO(offset) |= pins;
 	else
-		GPIO(_gpio_cnf[port]) &= ~pins;
+		GPIO(offset) &= ~pins;
-	(void)GPIO(_gpio_cnf[port]);
+
+	(void)GPIO(offset); // Commit the write.
 }
 
 void gpio_output_enable(u32 port, u32 pins, int enable)
 {
+	u32 port_offset = GPIO_OE_OFFSET(port);
+
 	if (enable)
-		GPIO(_gpio_oe[port]) |= pins;
+		GPIO(port_offset) |= pins;
 	else
-		GPIO(_gpio_oe[port]) &= ~pins;
+		GPIO(port_offset) &= ~pins;
-	(void)GPIO(_gpio_oe[port]);
+
+	(void)GPIO(port_offset); // Commit the write.
 }
 
 void gpio_write(u32 port, u32 pins, int high)
 {
+	u32 port_offset = GPIO_OUT_OFFSET(port);
+
 	if (high)
-		GPIO(_gpio_out[port]) |= pins;
+		GPIO(port_offset) |= pins;
 	else
-		GPIO(_gpio_out[port]) &= ~pins;
+		GPIO(port_offset) &= ~pins;
-	(void)GPIO(_gpio_out[port]);
+
+	(void)GPIO(port_offset); // Commit the write.
 }
 
 int gpio_read(u32 port, u32 pins)
 {
-	return (GPIO(_gpio_in[port]) & pins) ? 1 : 0;
+	u32 port_offset = GPIO_IN_OFFSET(port);
+
+	return (GPIO(port_offset) & pins) ? 1 : 0;
+}
+
+static void _gpio_interrupt_clear(u32 port, u32 pins)
+{
+	u32 port_offset = GPIO_INT_CLR_OFFSET(port);
+
+	GPIO(port_offset) |= pins;
+
+	(void)GPIO(port_offset); // Commit the write.
+}
+
+int gpio_interrupt_status(u32 port, u32 pins)
+{
+	u32 port_offset = GPIO_INT_STA_OFFSET(port);
+	u32 enabled = GPIO(GPIO_INT_ENB_OFFSET(port)) & pins;
+
+	int status = ((GPIO(port_offset) & pins) && enabled) ? 1 : 0;
+
+	// Clear the interrupt status.
+	if (status)
+		_gpio_interrupt_clear(port, pins);
+
+	return status;
+}
+
+void gpio_interrupt_enable(u32 port, u32 pins, int enable)
+{
+	u32 port_offset = GPIO_INT_ENB_OFFSET(port);
+
+	// Clear any possible stray interrupt.
+	_gpio_interrupt_clear(port, pins);
+
+	if (enable)
+		GPIO(port_offset) |= pins;
+	else
+		GPIO(port_offset) &= ~pins;
+
+	(void)GPIO(port_offset); // Commit the write.
+}
+
+void gpio_interrupt_level(u32 port, u32 pins, int high, int edge, int delta)
+{
+	u32 port_offset = GPIO_INT_LVL_OFFSET(port);
+
+	u32 val = GPIO(port_offset);
+
+	if (high)
+		val |= pins;
+	else
+		val &= ~pins;
+
+	if (edge)
+		val |= pins << 8;
+	else
+		val &= ~(pins << 8);
+
+	if (delta)
+		val |= pins << 16;
+	else
+		val &= ~(pins << 16);
+
+	GPIO(port_offset) = val;
+
+	(void)GPIO(port_offset); // Commit the write.
+
+	// Clear any possible stray interrupt.
+	_gpio_interrupt_clear(port, pins);
+}
+
+u32 gpio_get_bank_irq_id(u32 port)
+{
+	u32 bank_idx = GPIO_BANK_IDX(port);
+
+	return gpio_bank_irq_ids[bank_idx];
 }

emummc/source/soc/gpio.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2019 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -21,10 +22,23 @@
 
 #define GPIO_MODE_SPIO 0
 #define GPIO_MODE_GPIO 1
+
 #define GPIO_OUTPUT_DISABLE 0
 #define GPIO_OUTPUT_ENABLE 1
+
+#define GPIO_IRQ_DISABLE 0
+#define GPIO_IRQ_ENABLE 1
+
 #define GPIO_LOW 0
 #define GPIO_HIGH 1
+#define GPIO_FALLING 0
+#define GPIO_RISING 1
+
+#define GPIO_LEVEL 0
+#define GPIO_EDGE 1
+
+#define GPIO_CONFIGURED_EDGE 0
+#define GPIO_ANY_EDGE_CHANGE 1
 
 /*! GPIO pins (0-7 for each port). */
 #define GPIO_PIN_0 (1 << 0)
@@ -72,6 +86,10 @@
 void gpio_config(u32 port, u32 pins, int mode);
 void gpio_output_enable(u32 port, u32 pins, int enable);
 void gpio_write(u32 port, u32 pins, int high);
-int gpio_read(u32 port, u32 pins);
+int  gpio_read(u32 port, u32 pins);
+int  gpio_interrupt_status(u32 port, u32 pins);
+void gpio_interrupt_enable(u32 port, u32 pins, int enable);
+void gpio_interrupt_level(u32 port, u32 pins, int high, int edge, int delta);
+u32  gpio_get_bank_irq_id(u32 port);
 
 #endif

emummc/source/soc/i2c.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2018-2020 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -20,25 +21,88 @@
 #include "../utils/util.h"
 #include "t210.h"
 
-// TODO: not hardcode I2C_5
+#define I2C_PACKET_PROT_I2C  (1 << 4)
-static u64 i2c_addrs[] = {
+#define I2C_HEADER_CONT_XFER (1 << 15)
-	0x7000C000, 0x7000C400, 0x7000C500,
+#define I2C_HEADER_REP_START (1 << 16)
-	0x7000C700, 0x7000D000, 0x7000D100
+#define I2C_HEADER_IE_ENABLE (1 << 17)
+#define I2C_HEADER_READ      (1 << 19)
+
+#define I2C_CNFG              (0x00 / 4)
+#define  CMD1_WRITE           (0 << 6)
+#define  CMD1_READ            (1 << 6)
+#define  NORMAL_MODE_GO       (1 << 9)
+#define  PACKET_MODE_GO       (1 << 10)
+#define  NEW_MASTER_FSM       (1 << 11)
+#define  DEBOUNCE_CNT_4T      (2 << 12)
+
+#define I2C_CMD_ADDR0         (0x04 / 4)
+#define  ADDR0_WRITE          0
+#define  ADDR0_READ           1
+
+#define I2C_CMD_DATA1         (0x0C / 4)
+#define I2C_CMD_DATA2         (0x10 / 4)
+
+#define I2C_STATUS            (0x1C / 4)
+#define  I2C_STATUS_NOACK     (0xF << 0)
+#define  I2C_STATUS_BUSY      (1 << 8)
+
+#define I2C_TX_FIFO           (0x50 / 4)
+#define I2C_RX_FIFO           (0x54 / 4)
+
+#define I2C_FIFO_CONTROL      (0x5C / 4)
+#define  RX_FIFO_FLUSH        (1 << 0)
+#define  TX_FIFO_FLUSH        (1 << 1)
+
+#define I2C_FIFO_STATUS       (0x60 / 4)
+#define  RX_FIFO_FULL_CNT     (0xF << 0)
+#define  TX_FIFO_EMPTY_CNT    (0xF << 4)
+
+#define I2C_INT_EN            (0x64 / 4)
+#define I2C_INT_STATUS        (0x68 / 4)
+#define I2C_INT_SOURCE        (0x70 / 4)
+#define  RX_FIFO_DATA_REQ     (1 << 0)
+#define  TX_FIFO_DATA_REQ     (1 << 1)
+#define  ARB_LOST             (1 << 2)
+#define  NO_ACK               (1 << 3)
+#define  RX_FIFO_UNDER        (1 << 4)
+#define  TX_FIFO_OVER         (1 << 5)
+#define  ALL_PACKETS_COMPLETE (1 << 6)
+#define  PACKET_COMPLETE      (1 << 7)
+#define  BUS_CLEAR_DONE       (1 << 11)
+
+#define I2C_CLK_DIVISOR       (0x6C / 4)
+
+#define I2C_BUS_CLEAR_CONFIG  (0x84 / 4)
+#define  BC_ENABLE            (1 << 0)
+#define  BC_TERMINATE         (1 << 1)
+
+#define I2C_BUS_CLEAR_STATUS  (0x88 / 4)
+
+#define I2C_CONFIG_LOAD       (0x8C / 4)
+#define  MSTR_CONFIG_LOAD     (1 << 0)
+#define  TIMEOUT_CONFIG_LOAD  (1 << 2)
+
+static const u64 i2c_addrs[] = {
+	0x7000C000, // I2C_1.
+	0x7000C400, // I2C_2.
+	0x7000C500, // I2C_3.
+	0x7000C700, // I2C_4.
+	0x7000D000, // I2C_5.
+	0x7000D100  // I2C_6.
 };
 
-static void _i2c_wait(vu32 *base)
+static void _i2c_load_cfg_wait(vu32 *base)
 {
-	base[I2C_CONFIG_LOAD] = 0x25;
+	base[I2C_CONFIG_LOAD] = (1 << 5) | TIMEOUT_CONFIG_LOAD | MSTR_CONFIG_LOAD;
-
 	for (u32 i = 0; i < 20; i++)
 	{
 		usleep(1);
-		if (!(base[I2C_CONFIG_LOAD] & 1))
+		if (!(base[I2C_CONFIG_LOAD] & MSTR_CONFIG_LOAD))
 			break;
 	}
 }
 
-static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
+static int _i2c_send_single(u32 i2c_idx, u32 dev_addr, u8 *buf, u32 size)
 {
 	if (size > 4)
 		return 0;
@@ -47,37 +111,58 @@ static int _i2c_send_pkt(u32 idx, u32 x, u8 *buf, u32 size)
 	memcpy(&tmp, buf, size);
 
 	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[I2C_5], 0x1000);
-	base[I2C_CMD_ADDR0] = x << 1; //Set x (send mode).
+
+	// Set device address and send mode.
+	base[I2C_CMD_ADDR0] = dev_addr << 1 | ADDR0_WRITE;
 	base[I2C_CMD_DATA1] = tmp;    //Set value.
-	base[I2C_CNFG] = (2 * size - 2) | 0x2800; //Set size and send mode.
+	// Set size and send mode.
-	_i2c_wait(base);  //Kick transaction.
+	base[I2C_CNFG] = ((size - 1) << 1) | DEBOUNCE_CNT_4T | NEW_MASTER_FSM | CMD1_WRITE;
 
-	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
+	// Load configuration.
-	while (base[I2C_STATUS] & 0x100)
+	_i2c_load_cfg_wait(base);
-		;
 
-	if (base[I2C_STATUS] << 28)
+	// Initiate transaction on normal mode.
+	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFF9FF) | NORMAL_MODE_GO;
+
+	u64 timeout = get_tmr_ms() + 100;
+	while (base[I2C_STATUS] & I2C_STATUS_BUSY)
+	{
+		if (get_tmr_ms() > timeout)
+			return 0;
+	}
+
+	if (base[I2C_STATUS] & I2C_STATUS_NOACK)
 		return 0;
 
 	return 1;
 }
 
-static int _i2c_recv_pkt(u32 idx, u8 *buf, u32 size, u32 x)
+static int _i2c_recv_single(u32 i2c_idx, u8 *buf, u32 size, u32 dev_addr)
 {
-	if (size > 8)
+	if (size > 4)
 		return 0;
 
 	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[I2C_5], 0x1000);
+	// Set device address and recv mode.
+	base[I2C_CMD_ADDR0] = (dev_addr << 1) | ADDR0_READ;
 
-	base[I2C_CMD_ADDR0] = (x << 1) | 1; // Set x (recv mode).
+	// Set size and recv mode.
-	base[I2C_CNFG] = (size - 1) << 1 | 0x2840; // Set size and recv mode.
+	base[I2C_CNFG] = ((size - 1) << 1) | DEBOUNCE_CNT_4T | NEW_MASTER_FSM | CMD1_READ;
-	_i2c_wait(base);        // Kick transaction.
 
-	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFFDFF) | 0x200;
+	// Load configuration.
-	while (base[I2C_STATUS] & 0x100)
+	_i2c_load_cfg_wait(base);
-		;
 
-	if (base[I2C_STATUS] << 28)
+	// Initiate transaction on normal mode.
+	base[I2C_CNFG] = (base[I2C_CNFG] & 0xFFFFF9FF) | NORMAL_MODE_GO;
+
+	u64 timeout = get_tmr_ms() + 100;
+	while (base[I2C_STATUS] & I2C_STATUS_BUSY)
+	{
+		if (get_tmr_ms() > timeout)
+			return 0;
+	}
+
+	if (base[I2C_STATUS] & I2C_STATUS_NOACK)
 		return 0;
 
 	u32 tmp = base[I2C_CMD_DATA1]; // Get LS value.
@@ -97,50 +182,52 @@ void i2c_init()
 {
 	vu32 *base = (vu32 *)QueryIoMapping(i2c_addrs[I2C_5], 0x1000);
     
-	base[I2C_CLK_DIVISOR_REGISTER] = 0x50001;
+	base[I2C_CLK_DIVISOR] = (5 << 16) | 1; // SF mode Div: 6, HS mode div: 2.
-	base[I2C_BUS_CLEAR_CONFIG] = 0x90003;
+	base[I2C_BUS_CLEAR_CONFIG] = (9 << 16) | BC_TERMINATE | BC_ENABLE;
-	_i2c_wait(base);
+
+	// Load configuration.
+	_i2c_load_cfg_wait(base);
 
 	for (u32 i = 0; i < 10; i++)
 	{
-		if (base[INTERRUPT_STATUS_REGISTER] & 0x800)
+		if (base[I2C_INT_STATUS] & BUS_CLEAR_DONE)
 			break;
 	}
 
 	(vu32)base[I2C_BUS_CLEAR_STATUS];
-	base[INTERRUPT_STATUS_REGISTER] = base[INTERRUPT_STATUS_REGISTER];
+	base[I2C_INT_STATUS] = base[I2C_INT_STATUS];
 }
 
-int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size)
+int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size)
 {
 	u8 tmp[4];
 
 	if (size > 3)
 		return 0;
 
-	tmp[0] = y;
+	tmp[0] = reg;
 	memcpy(tmp + 1, buf, size);
 
-	return _i2c_send_pkt(idx, x, tmp, size + 1);
+	return _i2c_send_single(i2c_idx, dev_addr, tmp, size + 1);
 }
 
-int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y)
+int i2c_recv_buf_small(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg)
 {
-	int res = _i2c_send_pkt(idx, x, (u8 *)&y, 1);
+	int res = _i2c_send_single(i2c_idx, dev_addr, (u8 *)&reg, 1);
 	if (res)
-		res = _i2c_recv_pkt(idx, buf, size, x);
+		res = _i2c_recv_single(i2c_idx, buf, size, dev_addr);
 	return res;
 }
 
-int i2c_send_byte(u32 idx, u32 x, u32 y, u8 b)
+int i2c_send_byte(u32 i2c_idx, u32 dev_addr, u32 reg, u8 val)
 {
-	return i2c_send_buf_small(idx, x, y, &b, 1);
+	return i2c_send_buf_small(i2c_idx, dev_addr, reg, &val, 1);
 }
 
-u8 i2c_recv_byte(u32 idx, u32 x, u32 y)
+u8 i2c_recv_byte(u32 i2c_idx, u32 dev_addr, u32 reg)
 {
 	u8 tmp = 0;
-	i2c_recv_buf_small(&tmp, 1, idx, x, y);
+	i2c_recv_buf_small(&tmp, 1, i2c_idx, dev_addr, reg);
 	return tmp;
 }
 

emummc/source/soc/i2c.h

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2018 naehrwert
+ * Copyright (c) 2020 CTCaer
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -26,21 +27,10 @@
 #define I2C_5 4
 #define I2C_6 5
 
-#define I2C_CNFG        0x00
-#define I2C_CMD_ADDR0   0x01
-#define I2C_CMD_DATA1   0x03
-#define I2C_CMD_DATA2   0x04
-#define I2C_STATUS 0x07
-#define INTERRUPT_STATUS_REGISTER 0x1A
-#define I2C_CLK_DIVISOR_REGISTER 0x1B
-#define I2C_BUS_CLEAR_CONFIG 0x21
-#define I2C_BUS_CLEAR_STATUS 0x22
-#define I2C_CONFIG_LOAD 0x23
-
 void i2c_init();
-int i2c_send_buf_small(u32 idx, u32 x, u32 y, u8 *buf, u32 size);
+int i2c_send_buf_small(u32 i2c_idx, u32 dev_addr, u32 reg, u8 *buf, u32 size);
-int i2c_recv_buf_small(u8 *buf, u32 size, u32 idx, u32 x, u32 y);
+int i2c_recv_buf_small(u8 *buf, u32 size, u32 i2c_idx, u32 dev_addr, u32 reg);
-int i2c_send_byte(u32 idx, u32 x, u32 y, u8 b);
+int i2c_send_byte(u32 i2c_idx, u32 dev_addr, u32 reg, u8 val);
-u8 i2c_recv_byte(u32 idx, u32 x, u32 y);
+u8  i2c_recv_byte(u32 i2c_idx, u32 dev_addr, u32 reg);
 
 #endif

emummc/source/soc/pinmux.h

@@ -51,6 +51,18 @@
 #define PINMUX_AUX_GPIO_PE6    0x248
 #define PINMUX_AUX_GPIO_PH6    0x250
 #define PINMUX_AUX_GPIO_PZ1    0x280
+/* Only in T210B01 */
+#define PINMUX_AUX_SDMMC2_DAT0     0x294
+#define PINMUX_AUX_SDMMC2_DAT1     0x298
+#define PINMUX_AUX_SDMMC2_DAT2     0x29C
+#define PINMUX_AUX_SDMMC2_DAT3     0x2A0
+#define PINMUX_AUX_SDMMC2_DAT4     0x2A4
+#define PINMUX_AUX_SDMMC2_DAT5     0x2A8
+#define PINMUX_AUX_SDMMC2_DAT6     0x2AC
+#define PINMUX_AUX_SDMMC2_DAT7     0x2B0
+#define PINMUX_AUX_SDMMC2_CLK      0x2B4
+#define PINMUX_AUX_SDMMC2_CMD      0x2BC
+
 /*! 0:UART-A, 1:UART-B, 3:UART-C, 3:UART-D */
 #define PINMUX_AUX_UARTX_TX(x)  (0xE4 + 0x10 * (x))
 #define PINMUX_AUX_UARTX_RX(x)  (0xE8 + 0x10 * (x))
@@ -78,7 +90,8 @@
 #define PINMUX_OPEN_DRAIN   (1 << 11)
 #define PINMUX_SCHMT        (1 << 12)
 
-#define PINMUX_DRIVE_1X     (0 << 13) 
+#define PINMUX_DRIVE_MASK   (3 << 13)
+#define PINMUX_DRIVE_1X     (0 << 13)
 #define PINMUX_DRIVE_2X     (1 << 13)
 #define PINMUX_DRIVE_3X     (2 << 13)
 #define PINMUX_DRIVE_4X     (3 << 13)