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thermosphere: handle stage2 data aborts, trap gicd accesses

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TuxSH
2019-08-14 00:33:19 +02:00
parent 1775d59977
commit f9ec21e99e
6 changed files with 116 additions and 3 deletions
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3
thermosphere/src/platform/qemu/memory_map.c
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@@ -72,7 +72,8 @@ uintptr_t configureStage2MemoryMap(u32 *addrSpaceSize)
identityMapL3(g_vttbl_l3_0, 0x08000000ull, BITL(21), unchanged);
// GICv2 CPU -> vCPU interface
// GICD -> trapped, GICv2 CPU -> vCPU interface
mmu_unmap_range(3, g_vttbl_l3_0, 0x08000000, 0x10000ull);
mmu_map_page_range(g_vttbl_l3_0, 0x08010000ull, 0x08040000ull, 0x10000ull, devattrs);
}

3
thermosphere/src/platform/tegra/memory_map.c
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@@ -71,7 +71,8 @@ uintptr_t configureStage2MemoryMap(u32 *addrSpaceSize)
identityMapL3(g_vttbl_l3_0, 0x00000000ull, BITL(21), unchanged);
// GICv2 CPU -> vCPU interface
// GICD -> trapped, GICv2 CPU -> vCPU interface
mmu_unmap_page(g_vttbl_l3_0, 0x50401000ull);
mmu_map_page_range(g_vttbl_l3_0, 0x50042000ull, 0x50046000ull, 0x2000ull, devattrs);
}