Implement and use set_memory_registers_enable_mmu
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@@ -32,11 +32,10 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#define MMU_MT_DEVICE_NGNRNE 0ull
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/* Memory attributes, see set_memory_registers_enable_mmu */
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#define MMU_MT_NORMAL 0ull
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#define MMU_MT_DEVICE_NGNRE 1ull
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#define MMU_MT_DEVICE_GRE 2ull
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#define MMU_MT_NORMAL_NC 3ull
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#define MMU_MT_NORMAL 4ull
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#define MMU_MT_DEVICE_NGNRNE 2ull /* not used, also the same as Attr4-7 */
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/*
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* Hardware page table definitions.
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@@ -112,6 +111,7 @@
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#define TCR_TG0_4K (0 << 14)
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#define TCR_TG0_64K (1 << 14)
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#define TCR_TG0_16K (2 << 14)
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#define TCR_PS(x) ((x) << 16)
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#define TCR_EPD1_DISABLE BIT(23)
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#define TCR_EL1_RSVD BIT(31)
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