thermosphere: introduce "ENSURE"
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@@ -237,9 +237,7 @@ static void vgicEnqueueVirqState(VirqStateList *list, VirqState *elem)
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{
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VirqState *pos;
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if (vgicIsStateQueued(elem)) {
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PANIC("vgicEnqueueVirqState: unsanitized argument idx=%u previd=%u nextid=%u\n", (u32)vgicGetVirqStateIndex(elem), elem->listPrev, elem->listNext);
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}
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ENSURE(!vgicIsStateQueued(elem));
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for (pos = list->first; pos != vgicGetQueueEnd(); pos = vgicGetNextQueuedVirqState(pos)) {
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// Sort predicate should be stable
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@@ -256,9 +254,7 @@ static void vgicDequeueVirqState(VirqStateList *list, VirqState *elem)
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VirqState *prev = vgicGetPrevQueuedVirqState(elem);
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VirqState *next = vgicGetNextQueuedVirqState(elem);
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if (!vgicIsStateQueued(elem)) {
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PANIC("vgicDequeueVirqState: invalid id %x\n", vgicGetVirqStateIndex(elem));
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}
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ENSURE(vgicIsStateQueued(elem));
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--list->size;
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if (prev != vgicGetQueueEnd()) {
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@@ -873,9 +869,7 @@ static bool vgicUpdateListRegister(volatile ArmGicV2ListRegister *lr)
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u32 srcCoreId = state->coreId;
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u32 coreId = currentCoreCtx->coreId;
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if (!state->handled) {
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PANIC("vgicUpdateListRegister: improper previous state for now pending irq idx %u, active=%d\n", vgicGetVirqStateIndex(state), (int)state->active);
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}
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ENSURE(state->handled);
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state->active = lrCopy.active;
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@@ -995,10 +989,6 @@ void vgicMaintenanceInterruptHandler(void)
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DEBUG("EL2 [core %d]: Group 1 disabled maintenance interrupt\n", (int)currentCoreCtx->coreId);
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}
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if (misr.lrenp) {
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PANIC("EL2 [core %d]: List Register Entry Not Present maintenance interrupt!\n", currentCoreCtx->coreId);
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}
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if (misr.eoi) {
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//DEBUG("EL2 [core %d]: SGI EOI maintenance interrupt\n", currentCoreCtx->coreId);
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}
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@@ -1007,6 +997,8 @@ void vgicMaintenanceInterruptHandler(void)
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//DEBUG("EL2 [core %d]: Underflow maintenance interrupt\n", currentCoreCtx->coreId);
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}
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ENSURE2(!misr.lrenp, "List Register Entry Not Present maintenance interrupt!\n");
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// The rest should be handled by the main loop...
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}
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