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fusee: SDMMC driver re-design:

Browse Source 
- Based on hekate's, linux's and u-boot's source code;
- Full support for SD and MMC;
- Fixes multiple issues;
- Deployed first in fusee-primary.

fusee: Code cleanup and style fixes.
This commit is contained in:
hexkyz
2018-07-04 21:55:27 +01:00
parent 83c9747e5f
commit ddbbb0b758
30 changed files with 5077 additions and 4709 deletions
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55
fusee/fusee-primary/src/gpio.c
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@@ -3,18 +3,9 @@
#include <errno.h>
#include "gpio.h"
#include "utils.h"
#include "lib/printk.h"
enum tegra_gpio_shifts {
GPIO_BANK_SHIFT = 5,
GPIO_PORT_SHIFT = 3,
};
enum tegra_gpio_masks {
GPIO_PORT_MASK = 0x3,
GPIO_PIN_MASK = 0x7,
};
/**
* Returns a GPIO bank object that corresponds to the given GPIO pin,
* which can be created using the TEGRA_GPIO macro or passed from the name macro.
@@ -22,35 +13,31 @@ enum tegra_gpio_masks {
* @param pin The GPIO to get the bank for.
* @return The GPIO bank object to use for working with the given bank.
*/
static volatile struct tegra_gpio_bank *gpio_get_bank(enum tegra_named_gpio pin)
static volatile tegra_gpio_bank_t *gpio_get_bank(uint32_t pin)
{
volatile struct tegra_gpio *gpio = gpio_get_regs();
int bank_number = pin >> GPIO_BANK_SHIFT;
volatile tegra_gpio_t *gpio = gpio_get_regs();
uint32_t bank_number = pin >> GPIO_BANK_SHIFT;
return &gpio->bank[bank_number];
}
/**
* @return the port number for working with the given GPIO.
*/
static volatile int gpio_get_port(enum tegra_named_gpio pin)
static volatile uint32_t gpio_get_port(uint32_t pin)
{
return (pin >> GPIO_PORT_SHIFT) & GPIO_PORT_MASK;
}
/**
* @return a mask to be used to work with the given GPIO
*/
static volatile uint32_t gpio_get_mask(enum tegra_named_gpio pin)
static volatile uint32_t gpio_get_mask(uint32_t pin)
{
uint32_t pin_number = pin & GPIO_PIN_MASK;
return (1 << pin_number);
}
/**
* Performs a simple GPIO configuration operation.
*
@@ -58,7 +45,7 @@ static volatile uint32_t gpio_get_mask(enum tegra_named_gpio pin)
* @param should_be_set True iff the relevant bit should be set; or false if it should be cleared.
* @param offset The offset into a gpio_bank structure
*/
static void gpio_simple_register_set(enum tegra_named_gpio pin, bool should_be_set, size_t offset)
static void gpio_simple_register_set(uint32_t pin, bool should_be_set, uint32_t offset)
{
// Retrieve the register set that corresponds to the given pin and offset.
uintptr_t cluster_addr = (uintptr_t)gpio_get_bank(pin) + offset;
@@ -66,10 +53,9 @@ static void gpio_simple_register_set(enum tegra_named_gpio pin, bool should_be_s
// Figure out the offset into the cluster,
// and the mask to be used.
int port = gpio_get_port(pin);
uint32_t port = gpio_get_port(pin);
uint32_t mask = gpio_get_mask(pin);
// Set or clear the bit, as appropriate.
if (should_be_set)
cluster[port] |= mask;
@@ -77,7 +63,6 @@ static void gpio_simple_register_set(enum tegra_named_gpio pin, bool should_be_s
cluster[port] &= ~mask;
}
/**
* Performs a simple GPIO configuration operation.
*
@@ -85,7 +70,7 @@ static void gpio_simple_register_set(enum tegra_named_gpio pin, bool should_be_s
* @param should_be_set True iff the relevant bit should be set; or false if it should be cleared.
* @param offset The offset into a gpio_bank structure
*/
static bool gpio_simple_register_get(enum tegra_named_gpio pin, size_t offset)
static bool gpio_simple_register_get(uint32_t pin, uint32_t offset)
{
// Retrieve the register set that corresponds to the given pin and offset.
uintptr_t cluster_addr = (uintptr_t)gpio_get_bank(pin) + offset;
@@ -93,57 +78,53 @@ static bool gpio_simple_register_get(enum tegra_named_gpio pin, size_t offset)
// Figure out the offset into the cluster,
// and the mask to be used.
int port = gpio_get_port(pin);
uint32_t port = gpio_get_port(pin);
uint32_t mask = gpio_get_mask(pin);
// Convert the given value to a boolean.
return !!(cluster[port] & mask);
}
/**
* Configures a given pin as either GPIO or SFIO.
*
* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
* @param mode The relevant mode.
*/
void gpio_configure_mode(enum tegra_named_gpio pin, enum tegra_gpio_mode mode)
void gpio_configure_mode(uint32_t pin, uint32_t mode)
{
gpio_simple_register_set(pin, mode == GPIO_MODE_GPIO, offsetof(struct tegra_gpio_bank, config));
gpio_simple_register_set(pin, mode == GPIO_MODE_GPIO, offsetof(tegra_gpio_bank_t, config));
}
/**
* Configures a given pin as either INPUT or OUPUT.
*
* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
* @param direction The relevant direction.
*/
void gpio_configure_direction(enum tegra_named_gpio pin, enum tegra_gpio_direction dir)
void gpio_configure_direction(uint32_t pin, uint32_t dir)
{
gpio_simple_register_set(pin, dir == GPIO_DIRECTION_OUTPUT, offsetof(struct tegra_gpio_bank, direction));
gpio_simple_register_set(pin, dir == GPIO_DIRECTION_OUTPUT, offsetof(tegra_gpio_bank_t, direction));
}
/**
* Drives a relevant GPIO pin as either HIGH or LOW.
*
* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
* @param mode The relevant mode.
*/
void gpio_write(enum tegra_named_gpio pin, enum tegra_gpio_value value)
void gpio_write(uint32_t pin, uint32_t value)
{
gpio_simple_register_set(pin, value == GPIO_LEVEL_HIGH, offsetof(struct tegra_gpio_bank, out));
gpio_simple_register_set(pin, value == GPIO_LEVEL_HIGH, offsetof(tegra_gpio_bank_t, out));
}
/**
* Drives a relevant GPIO pin as either HIGH or LOW.
*
* @param pin The GPIO pin to work with, as created with TEGRA_GPIO, or a named GPIO.
* @param mode The relevant mode.
*/
enum tegra_gpio_value gpio_read(enum tegra_named_gpio pin)
uint32_t gpio_read(uint32_t pin)
{
return gpio_simple_register_get(pin, offsetof(struct tegra_gpio_bank, in));
return gpio_simple_register_get(pin, offsetof(tegra_gpio_bank_t, in));
}