kern: swap tpidr_el1/cntv_cval_el0 as scratch vs exception stack

mesosphere/kernel/source/arch/arm64/init/kern_init_core.cpp

@@ -125,9 +125,6 @@ namespace ams::kern::init {
         /* Ensure our first argument is page aligned (as we will map it if it is non-zero). */
         MESOSPHERE_INIT_ABORT_UNLESS(util::IsAligned(misc_unk_debug_phys_addr, PageSize));
 
-        /* Clear TPIDR_EL1 to zero. */
-        cpu::ThreadIdRegisterAccessor(0).Store();
-
         /* Restore the page allocator state setup by kernel loader. */
         g_initial_page_allocator.InitializeFromState(initial_page_allocator_state);
 
@@ -476,6 +473,7 @@ namespace ams::kern::init {
 
     void InitializeExceptionVectors() {
         cpu::SetVbarEl1(reinterpret_cast<uintptr_t>(::ams::kern::ExceptionVectors));
+        cpu::SetTpidrEl1(0);
         cpu::SetExceptionThreadStackTop(0);
         cpu::EnsureInstructionConsistency();
     }

mesosphere/kernel/source/arch/arm64/init/start.s

@@ -227,9 +227,9 @@ _ZN3ams4kern4init16InvokeEntrypointEPKNS1_14KInitArgumentsE:
     /* Ensure that the exception vectors are setup. */
     bl _ZN3ams4kern4init26InitializeExceptionVectorsEv
 
-    /* Setup the exception stack in tpidr_el1. */
+    /* Setup the exception stack in cntv_cval_el0. */
     ldr x1, [x20, #0x58]
-    msr tpidr_el1, x1
+    msr cntv_cval_el0, x1
 
     /* Jump to the entrypoint. */
     ldr x1, [x20, #0x40]