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thermosphere: rewrite sysreg trapping code, add skeleton code for timer val trap handling; support A32 EL1 once again

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This commit is contained in:
TuxSH
2020-01-07 02:17:05 +00:00
parent d42d9e60b9
commit b9d07fccd6
9 changed files with 217 additions and 74 deletions
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8
thermosphere/src/single_step.c
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@@ -22,7 +22,7 @@
SingleStepState singleStepGetNextState(ExceptionStackFrame *frame)
{
u64 mdscr = GET_SYSREG(mdscr_el1);
bool mdscrSS = (mdscr & MDSCR_EL1_SS) != 0;
bool mdscrSS = (mdscr & MDSCR_SS) != 0;
bool pstateSS = (frame->spsr_el2 & PSTATE_SS) != 0;
if (!mdscrSS) {
@@ -39,16 +39,16 @@ void singleStepSetNextState(ExceptionStackFrame *frame, SingleStepState state)
switch (state) {
case SingleStepState_Inactive:
// Unset mdscr_el1.ss
mdscr &= ~MDSCR_EL1_SS;
mdscr &= ~MDSCR_SS;
break;
case SingleStepState_ActivePending:
// Set mdscr_el1.ss and pstate.ss
mdscr |= MDSCR_EL1_SS;
mdscr |= MDSCR_SS;
frame->spsr_el2 |= PSTATE_SS;
break;
case SingleStepState_ActiveNotPending:
// Set mdscr_el1.ss and unset pstate.ss
mdscr |= MDSCR_EL1_SS;
mdscr |= MDSCR_SS;
frame->spsr_el2 |= PSTATE_SS;
break;
default: