ENUMs for APB Slave Security Enable registers (#67)
Exosphere: add enums for the APB_MISC_SECURE registers.
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@@ -85,22 +85,22 @@ void bootup_misc_mmio(void) {
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/* Mark registers secure world only. */
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/* Mark SATA_AUX, DTV, QSPI, SE, SATA, LA secure only. */
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 = 0x504244;
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 = APB_SSER0_SATA_AUX | APB_SSER0_DTV | APB_SSER0_QSPI | APB_SSER0_SE | APB_SSER0_SATA | APB_SSER0_LA;
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/* By default, mark SPI1, SPI2, SPI3, SPI5, SPI6, I2C6 secure only. */
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uint32_t sec_disable_1 = 0x83700000;
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uint32_t sec_disable_1 = APB_SSER1_SPI1 | APB_SSER1_SPI2 | APB_SSER1_SPI3 | APB_SSER1_SPI5 | APB_SSER1_SPI6 | APB_SSER1_I2C6;
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/* By default, mark SDMMC3, DDS, DP2 secure only. */
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uint32_t sec_disable_2 = 0x304;
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uint32_t sec_disable_2 = APB_SSER2_SDMMC3 | APB_SSER2_DDS | APB_SSER2_DP2;
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uint64_t hardware_type = configitem_get_hardware_type();
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if (hardware_type != 1) {
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/* Also mark I2C5 secure only, */
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sec_disable_1 |= 0x20000000;
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/* Also mark I2C4 secure only, */
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sec_disable_1 |= APB_SSER1_I2C4;
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}
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if (hardware_type != 0 && exosphere_get_target_firmware() >= EXOSPHERE_TARGET_FIRMWARE_400) {
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/* Starting on 4.x on non-dev units, mark UARTB, UARTC, SPI4, I2C3 secure only. */
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sec_disable_1 |= 0x10806000;
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sec_disable_1 |= APB_SSER1_UART_B | APB_SSER1_UART_C | APB_SSER1_SPI4 | APB_SSER1_I2C3;
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/* Starting on 4.x on non-dev units, mark SDMMC1 secure only. */
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sec_disable_2 |= 1;
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sec_disable_2 |= APB_SSER2_SDMMC1;
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}
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 = sec_disable_1;
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG2_0 = sec_disable_2;
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@@ -283,8 +283,8 @@ void identity_unmap_iram_cd_tzram(void) {
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void secure_additional_devices(void) {
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if (exosphere_get_target_firmware() >= EXOSPHERE_TARGET_FIRMWARE_400) {
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 |= 0x2000; /* make PMC secure-only (2.x+ but see note below) */
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 |= 0X510; /* make MC0, MC1, MCB secure-only (4.x+) */
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG0_0 |= APB_SSER0_PMC; /* make PMC secure-only (2.x+ but see note below) */
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APB_MISC_SECURE_REGS_APB_SLAVE_SECURITY_ENABLE_REG1_0 |= APB_SSER1_MC0 | APB_SSER1_MC1 | APB_SSER1_MCB; /* make MC0, MC1, MCB secure-only (4.x+) */
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} else {
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/* TODO: Detect 1.x */
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}
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