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Refactor 32-bit register definitions

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This commit is contained in:
TuxSH
2018-03-03 20:23:13 +01:00
parent c0f99fcd1c
commit a6c7a2c57e
26 changed files with 126 additions and 98 deletions
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22
exosphere/src/warmboot_init.c
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@@ -33,35 +33,35 @@ void init_dma_controllers(void) {
/* TODO: 4.x does slightly different init. How should we handle this? We can't detect master key revision yet. */
/* SYSCTR0_CNTCR_0 = ENABLE | HALT_ON_DEBUG (write-once init) */
(*((volatile uint32_t *)(0x700F0000))) = 3;
MAKE_REG32(0x700F0000) = 3;
/* Set some unknown registers in HOST1X. */
(*((volatile uint32_t *)(0x500038F8))) &= 0xFFFFFFFE;
(*((volatile uint32_t *)(0x50003300))) = 0;
MAKE_REG32(0x500038F8) &= 0xFFFFFFFE;
MAKE_REG32(0x50003300) = 0;
/* AHB_MASTER_SWID_0 */
(*((volatile uint32_t *)(0x6000C018))) = 0;
MAKE_REG32(0x6000C018) = 0;
/* AHB_MASTER_SWID_1 - Makes USB1/USB2 use SWID[1] */
(*((volatile uint32_t *)(0x6000C038))) = 0x40040;
MAKE_REG32(0x6000C038) = 0x40040;
/* APBDMA_CHANNEL_SWID_0 = ~0 (SWID = 1 for all APB-DMA channels) */
(*((volatile uint32_t *)(0x6002003C))) = 0xFFFFFFFF;
MAKE_REG32(0x6002003C) = 0xFFFFFFFF;
/* APBDMA_CHANNEL_SWID1_0 = 0 (See above) */
(*((volatile uint32_t *)(0x60020054))) = 0;
MAKE_REG32(0x60020054) = 0;
/* APBDMA_SECURITY_REG_0 = 0 (All APB-DMA channels non-secure) */
(*((volatile uint32_t *)(0x60020038))) = 0;
MAKE_REG32(0x60020038) = 0;
/* MSELECT_CONFIG_0 |= WRAP_TO_INCR_SLAVE0(APC) | WRAP_TO_INCR_SLAVE1(PCIe) | WRAP_TO_INCR_SLAVE2(GPU) */
(*((volatile uint32_t *)(0x50060000))) |= 0x38000000;
MAKE_REG32(0x50060000) |= 0x38000000;
/* AHB_ARBITRATION_PRIORITY_CTRL_0 - Select high prio group with prio 7 */
(*((volatile uint32_t *)(0x6000C008))) = 0xE0000001;
MAKE_REG32(0x6000C008) = 0xE0000001;
/* AHB_GIZMO_TZRAM_0 |= DONT_SPLIT_AHB_WR */
(*((volatile uint32_t *)(0x6000C054))) = 0x80;
MAKE_REG32(0x6000C054) = 0x80;
}
void set_memory_registers_enable_mmu(void) {