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Cleanup and re-write uart code

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This commit is contained in:
hexkyz
2019-07-21 19:18:15 +01:00
parent f9c1d5fc1b
commit 7cee36544c
23 changed files with 971 additions and 242 deletions
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103
exosphere/src/uart.c
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@@ -15,66 +15,103 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "timers.h"
#include "uart.h"
#include "misc.h"
#include "timers.h"
#include "pinmux.h"
void uart_select(UartDevice dev) {
unsigned int id = (unsigned int)dev;
PINMUX_AUX_UARTn_TX_0(id) = 0; /* UART */
PINMUX_AUX_UARTn_RX_0(id) = 0x48; /* UART, enable, pull up */
PINMUX_AUX_UARTn_RTS_0(id) = 0; /* UART */
PINMUX_AUX_UARTn_CTS_0(id) = 0x44; /* UART, enable, pull down */
void uart_config(UartDevice dev) {
volatile tegra_pinmux_t *pinmux = pinmux_get_regs();
switch (dev) {
case UART_A:
pinmux->uart1_rx = 0;
pinmux->uart1_tx = (PINMUX_INPUT | PINMUX_PULL_UP);
pinmux->uart1_rts = 0;
pinmux->uart1_cts = (PINMUX_INPUT | PINMUX_PULL_DOWN);
break;
case UART_B:
pinmux->uart2_rx = 0;
pinmux->uart2_tx = (PINMUX_INPUT | PINMUX_PULL_UP);
pinmux->uart2_rts = 0;
pinmux->uart2_cts = (PINMUX_INPUT | PINMUX_PULL_DOWN);
break;
case UART_C:
pinmux->uart3_rx = 0;
pinmux->uart3_tx = (PINMUX_INPUT | PINMUX_PULL_UP);
pinmux->uart3_rts = 0;
pinmux->uart3_cts = (PINMUX_INPUT | PINMUX_PULL_DOWN);
break;
case UART_D:
pinmux->uart4_rx = 0;
pinmux->uart4_tx = (PINMUX_INPUT | PINMUX_PULL_UP);
pinmux->uart4_rts = 0;
pinmux->uart4_cts = (PINMUX_INPUT | PINMUX_PULL_DOWN);
break;
case UART_E:
/* Unused. */
break;
default: break;
}
}
void uart_init(UartDevice dev, uint32_t baud) {
volatile uart_t *uart = get_uart_device(dev);
volatile tegra_uart_t *uart = uart_get_regs(dev);
/* Set baud rate. */
/* Wait for idle state. */
uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE);
/* Calculate baud rate. */
uint32_t rate = (8 * baud + 408000000) / (16 * baud);
uart->UART_LCR = UART_LCR_DLAB; /* Enable DLAB. */
uart->UART_THR_DLAB = (uint8_t)rate; /* Divisor latch LSB. */
uart->UART_IER_DLAB = (uint8_t)(rate >> 8); /* Divisor latch MSB. */
uart->UART_LCR = 0; /* Diable DLAB. */
/* Setup UART in fifo mode. */
/* Setup UART in FIFO mode. */
uart->UART_IER_DLAB = 0;
uart->UART_IIR_FCR = UART_FCR_FCR_EN_FIFO | UART_FCR_RX_CLR | UART_FCR_TX_CLR; /* Enable and clear TX and RX FIFOs. */
uart->UART_LSR;
wait(3 * ((baud + 999999) / baud));
uart->UART_LCR = UART_LCR_WD_LENGTH_8; /* Set word length 8. */
uart->UART_MCR = 0;
uart->UART_MSR = 0;
uart->UART_IRDA_CSR = 0;
uart->UART_RX_FIFO_CFG = 1; /* Set RX_FIFO trigger level */
uart->UART_MIE = 0;
uart->UART_ASR = 0;
uart->UART_LCR = (UART_LCR_DLAB | UART_LCR_WD_LENGTH_8); /* Enable DLAB and set word length 8. */
uart->UART_THR_DLAB = (uint8_t)rate; /* Divisor latch LSB. */
uart->UART_IER_DLAB = (uint8_t)(rate >> 8); /* Divisor latch MSB. */
uart->UART_LCR &= ~(UART_LCR_DLAB); /* Disable DLAB. */
/* Flush FIFO. */
uart->UART_IIR_FCR = (UART_FCR_FCR_EN_FIFO | UART_FCR_RX_CLR | UART_FCR_TX_CLR); /* Enable and clear TX and RX FIFOs. */
wait(3 * ((baud + 999999) / baud));
/* Wait for idle state. */
uart_wait_idle(dev, UART_VENDOR_STATE_TX_IDLE | UART_VENDOR_STATE_RX_IDLE);
}
/* This function blocks until the UART device (dev) is in the desired state (status). Make sure the desired state can be reached! */
/* This function blocks until the UART device is in the desired state. */
void uart_wait_idle(UartDevice dev, UartVendorStatus status) {
while (!(get_uart_device(dev)->UART_VENDOR_STATUS & status)) {
/* Wait */
volatile tegra_uart_t *uart = uart_get_regs(dev);
if (status & UART_VENDOR_STATE_TX_IDLE) {
while (!(uart->UART_LSR & UART_LSR_TMTY)) {
/* Wait */
}
}
if (status & UART_VENDOR_STATE_RX_IDLE) {
while (uart->UART_LSR & UART_LSR_RDR) {
/* Wait */
}
}
}
void uart_send(UartDevice dev, const void *buf, size_t len) {
volatile uart_t *uart = get_uart_device(dev);
volatile tegra_uart_t *uart = uart_get_regs(dev);
for (size_t i = 0; i < len; i++) {
while (uart->UART_LSR & UART_LSR_TX_FIFO_FULL) {
/* Wait until the TX FIFO isn't full */
while (!(uart->UART_LSR & UART_LSR_THRE)) {
/* Wait until it's possible to send data. */
}
uart->UART_THR_DLAB = *((const uint8_t *)buf + i);
}
}
void uart_recv(UartDevice dev, void *buf, size_t len) {
volatile uart_t *uart = get_uart_device(dev);
volatile tegra_uart_t *uart = uart_get_regs(dev);
for (size_t i = 0; i < len; i++) {
while (uart->UART_LSR & UART_LSR_RX_FIFO_EMPTY) {
/* Wait until the RX FIFO isn't empty */
while (!(uart->UART_LSR & UART_LSR_RDR)) {
/* Wait until it's possible to receive data. */
}
*((uint8_t *)buf + i) = uart->UART_THR_DLAB;
}