thermosphere: major refactor of memory map
- use recursive stage 1 page table (thanks @fincs for this idea) - NULL now unmapped - no identity mapping - image + GICv2 now mapped at the same address for every platform - tempbss mapped just after "real" bss, can now steal unused mem from the latter - no hardcoded VAs for other MMIO devices - tegra: remove timers, use the generic timer instead
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@@ -2,14 +2,12 @@
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#include "smc.h"
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#include "core_ctx.h"
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#include "caches.h"
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#include "memory_map.h"
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// Currently in exception_vectors.s:
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extern const u32 doSmcIndirectCallImpl[];
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extern const u32 doSmcIndirectCallImplSmcInstructionOffset, doSmcIndirectCallImplSize;
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// start.s
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void start2(u64 contextId);
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void doSmcIndirectCall(ExceptionStackFrame *frame, u32 smcId)
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{
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u32 codebuf[doSmcIndirectCallImplSize / 4]; // note: potential VLA
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@@ -29,7 +27,7 @@ static void doCpuOnHook(ExceptionStackFrame *frame, u32 smcId)
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// frame->x[3] is contextId
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if (cpuId < 4) {
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g_coreCtxs[cpuId].kernelEntrypoint = ep;
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frame->x[2] = (uintptr_t)start2;
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frame->x[2] = g_loadImageLayout.startPa + 4;
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}
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}
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