Implement flush_dcache_all_tzram_pa and invalidate_icache_all_inner_shareable_tzram_pa for the crt0s
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@@ -12,7 +12,7 @@ extern const uint8_t __vectors_start__[], __vectors_end__[], __vectors_lma__[];
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/* warmboot_init.c */
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void set_memory_registers_enable_mmu(void);
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void flush_dcache_all_tzram_pa(void);
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void invalidate_icache_all_tzram_pa(void);
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void invalidate_icache_all_inner_shareable_tzram_pa(void);
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static void identity_map_all_mappings(uintptr_t *mmu_l1_tbl, uintptr_t *mmu_l3_tbl) {
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static const uintptr_t addrs[] = { TUPLE_FOLD_LEFT_0(EVAL(IDENTIY_MAPPING_ID_MAX), _MMAPID, COMMA) };
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@@ -130,7 +130,7 @@ void coldboot_init(void) {
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set_memory_registers_enable_mmu();
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flush_dcache_all_tzram_pa();
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invalidate_icache_all_tzram_pa();
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invalidate_icache_all_inner_shareable_tzram_pa();
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/* At this point we can access all the mapped segments */
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/* TODO: zero-initialize the cpu context */
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/* Nintendo clears the (emtpy) pk2ldr's BSS section here , but we embed it 0-filled in the binary */
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