thermosphere: major refactor of memory map
- use recursive stage 1 page table (thanks @fincs for this idea) - NULL now unmapped - no identity mapping - image + GICv2 now mapped at the same address for every platform - tempbss mapped just after "real" bss, can now steal unused mem from the latter - no hardcoded VAs for other MMIO devices - tegra: remove timers, use the generic timer instead
This commit is contained in:
@@ -28,16 +28,23 @@
|
||||
|
||||
//115200
|
||||
|
||||
static uintptr_t g_uartRegBase;
|
||||
|
||||
static inline volatile PL011UartRegisters *uartGetRegisters(UartDevice dev)
|
||||
{
|
||||
switch (dev) {
|
||||
case UART_A:
|
||||
return (volatile PL011UartRegisters *)0x09000000;
|
||||
return (volatile PL011UartRegisters *)g_uartRegBase;
|
||||
default:
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
void uartSetRegisterBase(uintptr_t regBase)
|
||||
{
|
||||
g_uartRegBase = regBase;
|
||||
}
|
||||
|
||||
void uartInit(UartDevice dev, u32 baudRate, u32 flags)
|
||||
{
|
||||
/* The TRM (DDI0183) reads:
|
||||
|
||||
Reference in New Issue
Block a user