boot: implement wake event configuration

This commit is contained in:
Michael Scire
2019-05-07 10:02:53 -07:00
parent 3f75a92fd2
commit 625ac5b357
6 changed files with 202 additions and 1 deletions

View File

@@ -24,6 +24,8 @@ static constexpr uintptr_t PmcBase = 0x7000E400ul;
static constexpr size_t APBDEV_PMC_CNTRL = 0x0;
static constexpr u32 PMC_CNTRL_MAIN_RST = (1 << 4);
static constexpr size_t APBDEV_PMC_SEC_DISABLE = 0x4;
static constexpr size_t APBDEV_PMC_WAKE_MASK = 0xC;
static constexpr size_t APBDEV_PMC_WAKE_LVL = 0x10;
static constexpr size_t APBDEV_PMC_DPD_PADS_ORIDE = 0x1C;
static constexpr size_t APBDEV_PMC_PWRGATE_TOGGLE = 0x30;
static constexpr size_t APBDEV_PMC_PWRGATE_STATUS = 0x38;
@@ -32,6 +34,7 @@ static constexpr size_t APBDEV_PMC_NO_IOPOWER = 0x44;
static constexpr size_t APBDEV_PMC_SCRATCH0 = 0x50;
static constexpr size_t APBDEV_PMC_SCRATCH1 = 0x54;
static constexpr size_t APBDEV_PMC_SCRATCH20 = 0xA0;
static constexpr size_t APBDEV_PMC_AUTO_WAKE_LVL_MASK = 0xDC;
static constexpr size_t APBDEV_PMC_PWR_DET_VAL = 0xE4;
static constexpr u32 PMC_PWR_DET_SDMMC1_IO_EN = (1 << 12);
static constexpr size_t APBDEV_PMC_DDR_PWR = 0xE8;
@@ -40,6 +43,9 @@ static constexpr u32 PMC_CRYPTO_OP_SE_ENABLE = 0;
static constexpr u32 PMC_CRYPTO_OP_SE_DISABLE = 1;
static constexpr size_t APBDEV_PMC_SCRATCH33 = 0x120;
static constexpr size_t APBDEV_PMC_SCRATCH40 = 0x13C;
static constexpr size_t APBDEV_PMC_WAKE2_MASK = 0x164;
static constexpr size_t APBDEV_PMC_WAKE2_LVL = 0x164;
static constexpr size_t APBDEV_PMC_AUTO_WAKE2_LVL_MASK = 0x170;
static constexpr size_t APBDEV_PMC_OSC_EDPD_OVER = 0x1A4;
static constexpr size_t APBDEV_PMC_CLK_OUT_CNTRL = 0x1A8;
static constexpr size_t APBDEV_PMC_RST_STATUS = 0x1B4;