fusee: start fleshing out nxboot for Mariko
This commit is contained in:
@@ -35,6 +35,7 @@ static inline uint32_t get_clk_source_reg(CarDevice dev) {
|
||||
case CARDEVICE_KFUSE: return 0;
|
||||
case CARDEVICE_CL_DVFS: return 0;
|
||||
case CARDEVICE_CORESIGHT: return 0x1D4;
|
||||
case CARDEVICE_MSELECT: return 0x3B4;
|
||||
case CARDEVICE_ACTMON: return 0x3E8;
|
||||
case CARDEVICE_BPMP: return 0;
|
||||
default: generic_panic();
|
||||
@@ -58,6 +59,7 @@ static inline uint32_t get_clk_source_val(CarDevice dev) {
|
||||
case CARDEVICE_KFUSE: return 0;
|
||||
case CARDEVICE_CL_DVFS: return 0;
|
||||
case CARDEVICE_CORESIGHT: return 0;
|
||||
case CARDEVICE_MSELECT: return 0;
|
||||
case CARDEVICE_ACTMON: return 6;
|
||||
case CARDEVICE_BPMP: return 0;
|
||||
default: generic_panic();
|
||||
@@ -81,6 +83,7 @@ static inline uint32_t get_clk_source_div(CarDevice dev) {
|
||||
case CARDEVICE_KFUSE: return 0;
|
||||
case CARDEVICE_CL_DVFS: return 0;
|
||||
case CARDEVICE_CORESIGHT: return 4;
|
||||
case CARDEVICE_MSELECT: return 6;
|
||||
case CARDEVICE_ACTMON: return 0;
|
||||
case CARDEVICE_BPMP: return 0;
|
||||
default: generic_panic();
|
||||
|
||||
@@ -51,6 +51,7 @@ typedef enum {
|
||||
CARDEVICE_USB2 = ((1 << 5) | 0x1A),
|
||||
CARDEVICE_CORESIGHT = ((2 << 5) | 0x9),
|
||||
CARDEVICE_TSEC = ((2 << 5) | 0x13),
|
||||
CARDEVICE_MSELECT = ((3 << 5) | 0x8),
|
||||
CARDEVICE_ACTMON = ((3 << 5) | 0x17),
|
||||
CARDEVICE_TZRAM = ((3 << 5) | 0x1E),
|
||||
CARDEVICE_SE = ((3 << 5) | 0x1F),
|
||||
|
||||
@@ -24,12 +24,14 @@
|
||||
#define I2C1234_BASE 0x7000C000
|
||||
#define I2C56_BASE 0x7000D000
|
||||
|
||||
#define MAX77621_CPU_I2C_ADDR 0x1B
|
||||
#define MAX77621_GPU_I2C_ADDR 0x1C
|
||||
#define MAX17050_I2C_ADDR 0x36
|
||||
#define MAX77620_PWR_I2C_ADDR 0x3C
|
||||
#define MAX77620_RTC_I2C_ADDR 0x68
|
||||
#define BQ24193_I2C_ADDR 0x6B
|
||||
#define MAX77621_CPU_I2C_ADDR 0x1B
|
||||
#define MAX77621_GPU_I2C_ADDR 0x1C
|
||||
#define MAX77812_PHASE31_CPU_I2C_ADDR 0x31
|
||||
#define MAX77812_PHASE211_CPU_I2C_ADDR 0x33
|
||||
#define MAX17050_I2C_ADDR 0x36
|
||||
#define MAX77620_PWR_I2C_ADDR 0x3C
|
||||
#define MAX77620_RTC_I2C_ADDR 0x68
|
||||
#define BQ24193_I2C_ADDR 0x6B
|
||||
|
||||
typedef enum {
|
||||
I2C_1 = 0,
|
||||
|
||||
81
fusee/fusee-primary/fusee-primary-main/src/max77812.h
Normal file
81
fusee/fusee-primary/fusee-primary-main/src/max77812.h
Normal file
@@ -0,0 +1,81 @@
|
||||
/*
|
||||
* Copyright (c) 2018-2020 Atmosphère-NX
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef FUSEE_MAX77812_H_
|
||||
#define FUSEE_MAX77812_H_
|
||||
|
||||
#define MAX77812_REG_RESET 0x00
|
||||
#define MAX77812_REG_INT_SRC 0x01
|
||||
#define MAX77812_REG_INT_SRC_M 0x02
|
||||
#define MAX77812_REG_TOPSYS_INT 0x03
|
||||
#define MAX77812_REG_TOPSYS_INT_M 0x04
|
||||
#define MAX77812_REG_TOPSYS_STAT 0x05
|
||||
#define MAX77812_REG_EN_CTRL 0x06
|
||||
#define MAX77812_REG_STUP_DLY1 0x07
|
||||
#define MAX77812_REG_STUP_DLY2 0x08
|
||||
#define MAX77812_REG_STUP_DLY3 0x09
|
||||
#define MAX77812_REG_SHDN_DLY1 0x0A
|
||||
#define MAX77812_REG_SHDN_DLY2 0x0B
|
||||
#define MAX77812_REG_SHDN_DLY3 0x0C
|
||||
#define MAX77812_REG_SHDN_DLY4 0x0D
|
||||
#define MAX77812_REG_WDTRSTB_DEB 0x0E
|
||||
#define MAX77812_REG_GPI_FUNC 0x0F
|
||||
#define MAX77812_REG_GPI_DEB1 0x10
|
||||
#define MAX77812_REG_GPI_DEB2 0x11
|
||||
#define MAX77812_REG_GPI_PD_CTRL 0x12
|
||||
#define MAX77812_REG_PROT_CFG 0x13
|
||||
#define MAX77812_REG_I2C_CFG 0x15
|
||||
#define MAX77812_REG_BUCK_INT 0x20
|
||||
#define MAX77812_REG_BUCK_INT_M 0x21
|
||||
#define MAX77812_REG_BUCK_STAT 0x22
|
||||
#define MAX77812_REG_M1_VOUT 0x23
|
||||
#define MAX77812_REG_M2_VOUT 0x24
|
||||
#define MAX77812_REG_M3_VOUT 0x25
|
||||
#define MAX77812_REG_M4_VOUT 0x26
|
||||
#define MAX77812_REG_M1_VOUT_D 0x27
|
||||
#define MAX77812_REG_M2_VOUT_D 0x28
|
||||
#define MAX77812_REG_M3_VOUT_D 0x29
|
||||
#define MAX77812_REG_M4_VOUT_D 0x2A
|
||||
#define MAX77812_REG_M1_VOUT_S 0x2B
|
||||
#define MAX77812_REG_M2_VOUT_S 0x2C
|
||||
#define MAX77812_REG_M3_VOUT_S 0x2D
|
||||
#define MAX77812_REG_M4_VOUT_S 0x2E
|
||||
#define MAX77812_REG_M1_CGF 0x2F
|
||||
#define MAX77812_REG_M2_CGF 0x30
|
||||
#define MAX77812_REG_M3_CGF 0x31
|
||||
#define MAX77812_REG_M4_CGF 0x32
|
||||
#define MAX77812_REG_GLB_CFG1 0x33
|
||||
#define MAX77812_REG_GLB_CFG2 0x34
|
||||
#define MAX77812_REG_GLB_CFG3 0x35
|
||||
|
||||
#define MAX77812_REG_EN_CTRL_MASK(n) BIT(n)
|
||||
#define MAX77812_START_SLEW_RATE_MASK 0x07
|
||||
#define MAX77812_SHDN_SLEW_RATE_MASK 0x70
|
||||
#define MAX77812_RAMPDOWN_SLEW_RATE_MASK 0x07
|
||||
#define MAX77812_RAMPUP_SLEW_RATE_MASK 0x70
|
||||
|
||||
#define MAX77812_VOUT_MASK 0xFF
|
||||
#define MAX77812_VOUT_N_VOLTAGE 0xFF
|
||||
#define MAX77812_VOUT_VMIN 250000
|
||||
#define MAX77812_VOUT_VMAX 1525000
|
||||
#define MAX77812_VOUT_STEP 5000
|
||||
|
||||
#define MAX77812_REGULATOR_ID_M1 0
|
||||
#define MAX77812_REGULATOR_ID_M2 1
|
||||
#define MAX77812_REGULATOR_ID_M3 2
|
||||
#define MAX77812_REGULATOR_ID_M4 3
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user