fusee_cpp: implement cpu startup
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@@ -475,8 +475,8 @@ namespace ams::secmon {
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/* Lock cluster switching, to prevent usage of the A53 cores. */
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reg::Write(FLOW_CTLR + FLOW_CTLR_BPMP_CLUSTER_CONTROL, FLOW_REG_BITS_ENUM(BPMP_CLUSTER_CONTROL_ACTIVE_CLUSTER_LOCK, ENABLE),
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FLOW_REG_BITS_ENUM(BPMP_CLUSTER_CONTROL_CLUSTER_SWITCH_ENABLE, DISABLE),
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FLOW_REG_BITS_ENUM(BPMP_CLUSTER_CONTROL_ACTIVE_CLUSTER, FAST));
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FLOW_REG_BITS_ENUM(BPMP_CLUSTER_CONTROL_CLUSTER_SWITCH_ENABLE, DISABLE),
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FLOW_REG_BITS_ENUM(BPMP_CLUSTER_CONTROL_ACTIVE_CLUSTER, FAST));
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/* Enable flow controller debug qualifier for legacy FIQs. */
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reg::Write(FLOW_CTLR + FLOW_CTLR_FLOW_DBG_QUAL, FLOW_REG_BITS_ENUM(FLOW_DBG_QUAL_FIQ2CCPLEX_ENABLE, ENABLE));
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@@ -600,8 +600,8 @@ namespace ams::secmon {
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g_kernel_carveouts[0].size = 200 * 128_KB;
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}
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/* Configure the two kernel carveouts. */
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SetupKernelCarveouts();
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/* NOTE: Here Nintendo configures the two kernel carveouts; we will do this later, to allow fusee to continue using AVP_CACHE. */
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/* SetupKernelCarveouts(); */
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/* Configure slave register security. */
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ConfigureSlaveSecurity();
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@@ -833,7 +833,7 @@ namespace ams::secmon {
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#define MC_ENABLE_CLIENT_ACCESS(INDEX, WHICH) MC_REG_BITS_ENUM(CLIENT_ACCESS##INDEX##_##WHICH, ENABLE)
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constexpr u32 WarmbootCarveoutClientAccess0 = reg::Encode(MC_ENABLE_CLIENT_ACCESS(0, AVPCARM7R),
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MC_ENABLE_CLIENT_ACCESS(0, PPCSAHBSLVR));
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MC_ENABLE_CLIENT_ACCESS(0, PPCSAHBSLVR));
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constexpr u32 WarmbootCarveoutClientAccess1 = reg::Encode(MC_ENABLE_CLIENT_ACCESS(1, AVPCARM7W));
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@@ -1164,6 +1164,9 @@ namespace ams::secmon {
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/* Setup the GPU carveout. */
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SetupGpuCarveout();
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/* Configure the two kernel carveouts. */
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SetupKernelCarveouts();
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/* Disable the ARC. */
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DisableArc();
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