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fusee: Move nxboot hand-off to IRAM.

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fusee/exosphere: Minor cleanup.
This commit is contained in:
hexkyz
2018-09-15 21:08:58 +01:00
parent d61ec20679
commit 39d812f434
19 changed files with 370 additions and 290 deletions
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6
fusee/fusee-primary/src/i2c.c
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@@ -175,8 +175,7 @@ bool i2c_write(volatile tegra_i2c_t *regs, uint8_t device, void *src, size_t src
i2c_load_config(regs);
/* Config |= SEND; */
regs->I2C_I2C_CNFG_0 |= 0x200;
regs->I2C_I2C_CNFG_0 = ((regs->I2C_I2C_CNFG_0 & 0xFFFFFDFF) | 0x200);
while (regs->I2C_I2C_STATUS_0 & 0x100) {
/* Wait until not busy. */
@@ -203,8 +202,7 @@ bool i2c_read(volatile tegra_i2c_t *regs, uint8_t device, void *dst, size_t dst_
i2c_load_config(regs);
/* Config |= SEND; */
regs->I2C_I2C_CNFG_0 |= 0x200;
regs->I2C_I2C_CNFG_0 = ((regs->I2C_I2C_CNFG_0 & 0xFFFFFDFF) | 0x200);
while (regs->I2C_I2C_STATUS_0 & 0x100) {
/* Wait until not busy. */

12
fusee/fusee-primary/src/i2c.h
View File

@@ -21,8 +21,8 @@
#include <stdint.h>
#include <string.h>
#define I2C234_BASE 0x7000C000
#define I2C56_BASE 0x7000D000
#define I2C1234_BASE 0x7000C000
#define I2C56_BASE 0x7000D000
#define I2C_1 0
#define I2C_2 1
@@ -82,10 +82,10 @@ typedef struct {
uint32_t I2C_I2C_HS_INTERFACE_TIMING_1_0;
} tegra_i2c_t;
#define I2C1_REGS ((volatile tegra_i2c_t *)(I2C234_BASE + 0x000))
#define I2C2_REGS ((volatile tegra_i2c_t *)(I2C234_BASE + 0x400))
#define I2C3_REGS ((volatile tegra_i2c_t *)(I2C234_BASE + 0x500))
#define I2C4_REGS ((volatile tegra_i2c_t *)(I2C234_BASE + 0x700))
#define I2C1_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x000))
#define I2C2_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x400))
#define I2C3_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x500))
#define I2C4_REGS ((volatile tegra_i2c_t *)(I2C1234_BASE + 0x700))
#define I2C5_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x000))
#define I2C6_REGS ((volatile tegra_i2c_t *)(I2C56_BASE + 0x100))

18
fusee/fusee-primary/src/se.c
View File

@@ -39,8 +39,7 @@ void NOINLINE ll_init(volatile se_ll_t *ll, void *buffer, size_t size) {
}
void se_check_error_status_reg(void) {
volatile tegra_se_t *se = se_get_regs();
if (se->ERR_STATUS_REG) {
if (se_get_regs()->ERR_STATUS_REG) {
generic_panic();
}
}
@@ -53,8 +52,7 @@ void se_check_for_error(void) {
}
void se_verify_flags_cleared(void) {
volatile tegra_se_t *se = se_get_regs();
if (se->FLAGS_REG & 3) {
if (se_get_regs()->FLAGS_REG & 3) {
generic_panic();
}
}
@@ -193,9 +191,8 @@ void clear_aes_keyslot_iv(unsigned int keyslot) {
}
void set_se_ctr(const void *ctr) {
volatile tegra_se_t *se = se_get_regs();
for (unsigned int i = 0; i < 4; i++) {
se->CRYPTO_CTR_REG[i] = read32le(ctr, i * 4);
se_get_regs()->CRYPTO_CTR_REG[i] = read32le(ctr, i * 4);
}
}
@@ -237,7 +234,6 @@ void se_synchronous_exp_mod(unsigned int keyslot, void *dst, size_t dst_size, co
}
void se_get_exp_mod_output(void *buf, size_t size) {
volatile tegra_se_t *se = se_get_regs();
size_t num_dwords = (size >> 2);
if (num_dwords < 1) {
@@ -249,7 +245,7 @@ void se_get_exp_mod_output(void *buf, size_t size) {
/* Copy endian swapped output. */
while (num_dwords) {
*p_out = read32be(se->RSA_OUTPUT, offset);
*p_out = read32be(se_get_regs()->RSA_OUTPUT, offset);
offset += 4;
p_out--;
num_dwords--;
@@ -330,10 +326,8 @@ void trigger_se_blocking_op(unsigned int op, void *dst, size_t dst_size, const v
se_check_for_error();
}
/* Secure AES Functionality. */
void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src, size_t src_size) {
volatile tegra_se_t *se = se_get_regs();
uint8_t block[0x10] = {0};
if (src_size > sizeof(block) || dst_size > sizeof(block)) {
@@ -346,7 +340,7 @@ void se_perform_aes_block_operation(void *dst, size_t dst_size, const void *src,
}
/* Trigger AES operation. */
se->BLOCK_COUNT_REG = 0;
se_get_regs()->BLOCK_COUNT_REG = 0;
trigger_se_blocking_op(OP_START, block, sizeof(block), block, sizeof(block));
/* Copy output data into dst. */
@@ -407,7 +401,6 @@ void se_aes_256_ecb_encrypt_block(unsigned int keyslot, void *dst, size_t dst_si
se_aes_ecb_encrypt_block(keyslot, dst, dst_size, src, src_size, 0x202);
}
void se_aes_ecb_decrypt_block(unsigned int keyslot, void *dst, size_t dst_size, const void *src, size_t src_size) {
volatile tegra_se_t *se = se_get_regs();
@@ -535,7 +528,6 @@ void se_compute_aes_cmac(unsigned int keyslot, void *cmac, size_t cmac_size, con
se->CRYPTO_REG = (keyslot << 24) | (0x145);
clear_aes_keyslot_iv(keyslot);
unsigned int num_blocks = (data_size + 0xF) >> 4;
/* Handle aligned blocks. */
if (num_blocks > 1) {

7
fusee/fusee-primary/src/se.h
View File

@@ -34,6 +34,9 @@
#define KEYSLOT_SWITCH_4XNEWCONSOLEKEYGENKEY 0xE
#define KEYSLOT_SWITCH_4XOLDDEVICEKEY 0xF
/* This keyslot was added in 5.0.0. */
#define KEYSLOT_SWITCH_5XNEWDEVICEKEYGENKEY 0xA
#define KEYSLOT_AES_MAX 0x10
#define KEYSLOT_RSA_MAX 0x2
@@ -88,7 +91,7 @@
#define RSA_2048_BYTES 0x100
typedef struct security_engine {
typedef struct {
uint32_t _0x0;
uint32_t _0x4;
uint32_t OPERATION_REG;
@@ -170,8 +173,6 @@ static inline volatile tegra_se_t *se_get_regs(void) {
return (volatile tegra_se_t *)SE_BASE;
}
/* This function MUST be registered to fire on the appropriate interrupt. */
void se_check_error_status_reg(void);
void se_check_for_error(void);
void se_trigger_interrupt(void);