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Add coldboot mmio init (for non 4.x), required for FLOW writes to succeed.

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This commit is contained in:
Michael Scire
2018-03-02 12:45:37 -08:00
parent e7e62ef90b
commit 3388198a26
3 changed files with 38 additions and 1 deletions
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30
exosphere/src/coldboot_init.c
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@@ -122,7 +122,34 @@ uintptr_t get_coldboot_crt0_stack_address(void) {
return TZRAM_GET_SEGMENT_PA(TZRAM_SEGMENT_ID_CORE3_STACK) + 0x800;
}
void coldboot_init_dma_controllers(void) {
/* SYSCTR0_CNTCR_0 = ENABLE | HALT_ON_DEBUG (write-once init) */
(*((volatile uint32_t *)(0x700F0000))) = 3;
/* AHB_MASTER_SWID_0 */
(*((volatile uint32_t *)(0x6000C018))) = 0;
/* AHB_MASTER_SWID_1 - Makes USB1/USB2 use SWID[1] */
(*((volatile uint32_t *)(0x6000C038))) = 0x40040;
/* APBDMA_CHANNEL_SWID_0 = ~0 (SWID = 1 for all APB-DMA channels) */
(*((volatile uint32_t *)(0x6002003C))) = 0xFFFFFFFF;
/* APBDMA_CHANNEL_SWID1_0 = 0 (See above) */
(*((volatile uint32_t *)(0x60020054))) = 0;
/* APBDMA_SECURITY_REG_0 = 0 (All APB-DMA channels non-secure) */
(*((volatile uint32_t *)(0x60020038))) = 0;
/* MSELECT_CONFIG_0 |= WRAP_TO_INCR_SLAVE0(APC) | WRAP_TO_INCR_SLAVE1(PCIe) | WRAP_TO_INCR_SLAVE2(GPU) */
(*((volatile uint32_t *)(0x50060000))) |= 0x38000000;
/* AHB_ARBITRATION_PRIORITY_CTRL_0 - Select high prio group with prio 7 */
(*((volatile uint32_t *)(0x6000C008))) = 0xE0000001;
/* AHB_GIZMO_TZRAM_0 |= DONT_SPLIT_AHB_WR */
(*((volatile uint32_t *)(0x6000C054))) = 0x80;
}
void coldboot_init(coldboot_crt0_reloc_list_t *reloc_list, boot_func_list_t *func_list) {
/* Custom approach */
@@ -137,6 +164,9 @@ void coldboot_init(coldboot_crt0_reloc_list_t *reloc_list, boot_func_list_t *fun
/* At this point, we can (and will) access functions located in .warm_crt0 */
translate_warmboot_func_list(reloc_list, func_list);
/* TODO: 4.x does slightly different init. How should we handle this? We can't detect master key revision yet. */
coldboot_init_dma_controllers();
/* TODO: initialize DMA controllers, etc. */
configure_ttbls();
func_list->funcs.set_memory_registers_enable_mmu();